linux/drivers/net/ethernet/intel/ixgbevf/ixgbevf.h
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   1/*******************************************************************************
   2
   3  Intel 82599 Virtual Function driver
   4  Copyright(c) 1999 - 2012 Intel Corporation.
   5
   6  This program is free software; you can redistribute it and/or modify it
   7  under the terms and conditions of the GNU General Public License,
   8  version 2, as published by the Free Software Foundation.
   9
  10  This program is distributed in the hope it will be useful, but WITHOUT
  11  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13  more details.
  14
  15  You should have received a copy of the GNU General Public License along with
  16  this program; if not, write to the Free Software Foundation, Inc.,
  17  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19  The full GNU General Public License is included in this distribution in
  20  the file called "COPYING".
  21
  22  Contact Information:
  23  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26*******************************************************************************/
  27
  28#ifndef _IXGBEVF_H_
  29#define _IXGBEVF_H_
  30
  31#include <linux/types.h>
  32#include <linux/bitops.h>
  33#include <linux/timer.h>
  34#include <linux/io.h>
  35#include <linux/netdevice.h>
  36#include <linux/if_vlan.h>
  37#include <linux/u64_stats_sync.h>
  38
  39#include "vf.h"
  40
  41/* wrapper around a pointer to a socket buffer,
  42 * so a DMA handle can be stored along with the buffer */
  43struct ixgbevf_tx_buffer {
  44        struct sk_buff *skb;
  45        dma_addr_t dma;
  46        unsigned long time_stamp;
  47        union ixgbe_adv_tx_desc *next_to_watch;
  48        u16 length;
  49        u16 mapped_as_page;
  50};
  51
  52struct ixgbevf_rx_buffer {
  53        struct sk_buff *skb;
  54        dma_addr_t dma;
  55};
  56
  57struct ixgbevf_ring {
  58        struct ixgbevf_ring *next;
  59        struct net_device *netdev;
  60        struct device *dev;
  61        void *desc;                     /* descriptor ring memory */
  62        dma_addr_t dma;                 /* phys. address of descriptor ring */
  63        unsigned int size;              /* length in bytes */
  64        unsigned int count;             /* amount of descriptors */
  65        unsigned int next_to_use;
  66        unsigned int next_to_clean;
  67
  68        int queue_index; /* needed for multiqueue queue management */
  69        union {
  70                struct ixgbevf_tx_buffer *tx_buffer_info;
  71                struct ixgbevf_rx_buffer *rx_buffer_info;
  72        };
  73
  74        u64                     total_bytes;
  75        u64                     total_packets;
  76        struct u64_stats_sync   syncp;
  77        u64 hw_csum_rx_error;
  78        u64 hw_csum_rx_good;
  79
  80        u16 head;
  81        u16 tail;
  82
  83        u16 reg_idx; /* holds the special value that gets the hardware register
  84                      * offset associated with this ring, which is different
  85                      * for DCB and RSS modes */
  86
  87        u16 rx_buf_len;
  88};
  89
  90/* How many Rx Buffers do we bundle into one write to the hardware ? */
  91#define IXGBEVF_RX_BUFFER_WRITE 16      /* Must be power of 2 */
  92
  93#define MAX_RX_QUEUES IXGBE_VF_MAX_RX_QUEUES
  94#define MAX_TX_QUEUES IXGBE_VF_MAX_TX_QUEUES
  95
  96#define IXGBEVF_DEFAULT_TXD   1024
  97#define IXGBEVF_DEFAULT_RXD   512
  98#define IXGBEVF_MAX_TXD       4096
  99#define IXGBEVF_MIN_TXD       64
 100#define IXGBEVF_MAX_RXD       4096
 101#define IXGBEVF_MIN_RXD       64
 102
 103/* Supported Rx Buffer Sizes */
 104#define IXGBEVF_RXBUFFER_256   256    /* Used for packet split */
 105#define IXGBEVF_RXBUFFER_2K    2048
 106#define IXGBEVF_RXBUFFER_4K    4096
 107#define IXGBEVF_RXBUFFER_8K    8192
 108#define IXGBEVF_RXBUFFER_10K   10240
 109
 110#define IXGBEVF_RX_HDR_SIZE IXGBEVF_RXBUFFER_256
 111
 112#define MAXIMUM_ETHERNET_VLAN_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)
 113
 114#define IXGBE_TX_FLAGS_CSUM             (u32)(1)
 115#define IXGBE_TX_FLAGS_VLAN             (u32)(1 << 1)
 116#define IXGBE_TX_FLAGS_TSO              (u32)(1 << 2)
 117#define IXGBE_TX_FLAGS_IPV4             (u32)(1 << 3)
 118#define IXGBE_TX_FLAGS_FCOE             (u32)(1 << 4)
 119#define IXGBE_TX_FLAGS_FSO              (u32)(1 << 5)
 120#define IXGBE_TX_FLAGS_VLAN_MASK        0xffff0000
 121#define IXGBE_TX_FLAGS_VLAN_PRIO_MASK   0x0000e000
 122#define IXGBE_TX_FLAGS_VLAN_SHIFT       16
 123
 124struct ixgbevf_ring_container {
 125        struct ixgbevf_ring *ring;      /* pointer to linked list of rings */
 126        unsigned int total_bytes;       /* total bytes processed this int */
 127        unsigned int total_packets;     /* total packets processed this int */
 128        u8 count;                       /* total number of rings in vector */
 129        u8 itr;                         /* current ITR setting for ring */
 130};
 131
 132/* iterator for handling rings in ring container */
 133#define ixgbevf_for_each_ring(pos, head) \
 134        for (pos = (head).ring; pos != NULL; pos = pos->next)
 135
 136/* MAX_MSIX_Q_VECTORS of these are allocated,
 137 * but we only use one per queue-specific vector.
 138 */
 139struct ixgbevf_q_vector {
 140        struct ixgbevf_adapter *adapter;
 141        u16 v_idx;              /* index of q_vector within array, also used for
 142                                 * finding the bit in EICR and friends that
 143                                 * represents the vector for this ring */
 144        u16 itr;                /* Interrupt throttle rate written to EITR */
 145        struct napi_struct napi;
 146        struct ixgbevf_ring_container rx, tx;
 147        char name[IFNAMSIZ + 9];
 148};
 149
 150/*
 151 * microsecond values for various ITR rates shifted by 2 to fit itr register
 152 * with the first 3 bits reserved 0
 153 */
 154#define IXGBE_MIN_RSC_ITR       24
 155#define IXGBE_100K_ITR          40
 156#define IXGBE_20K_ITR           200
 157#define IXGBE_10K_ITR           400
 158#define IXGBE_8K_ITR            500
 159
 160/* Helper macros to switch between ints/sec and what the register uses.
 161 * And yes, it's the same math going both ways.  The lowest value
 162 * supported by all of the ixgbe hardware is 8.
 163 */
 164#define EITR_INTS_PER_SEC_TO_REG(_eitr) \
 165        ((_eitr) ? (1000000000 / ((_eitr) * 256)) : 8)
 166#define EITR_REG_TO_INTS_PER_SEC EITR_INTS_PER_SEC_TO_REG
 167
 168#define IXGBE_DESC_UNUSED(R) \
 169        ((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \
 170        (R)->next_to_clean - (R)->next_to_use - 1)
 171
 172#define IXGBEVF_RX_DESC(R, i)       \
 173        (&(((union ixgbe_adv_rx_desc *)((R)->desc))[i]))
 174#define IXGBEVF_TX_DESC(R, i)       \
 175        (&(((union ixgbe_adv_tx_desc *)((R)->desc))[i]))
 176#define IXGBEVF_TX_CTXTDESC(R, i)           \
 177        (&(((struct ixgbe_adv_tx_context_desc *)((R)->desc))[i]))
 178
 179#define IXGBE_MAX_JUMBO_FRAME_SIZE      9728 /* Maximum Supported Size 9.5KB */
 180
 181#define OTHER_VECTOR 1
 182#define NON_Q_VECTORS (OTHER_VECTOR)
 183
 184#define MAX_MSIX_Q_VECTORS 2
 185
 186#define MIN_MSIX_Q_VECTORS 1
 187#define MIN_MSIX_COUNT (MIN_MSIX_Q_VECTORS + NON_Q_VECTORS)
 188
 189/* board specific private data structure */
 190struct ixgbevf_adapter {
 191        struct timer_list watchdog_timer;
 192        unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
 193        u16 bd_number;
 194        struct work_struct reset_task;
 195        struct ixgbevf_q_vector *q_vector[MAX_MSIX_Q_VECTORS];
 196
 197        /* Interrupt Throttle Rate */
 198        u16 rx_itr_setting;
 199        u16 tx_itr_setting;
 200
 201        /* interrupt masks */
 202        u32 eims_enable_mask;
 203        u32 eims_other;
 204
 205        /* TX */
 206        struct ixgbevf_ring *tx_ring;   /* One per active queue */
 207        int num_tx_queues;
 208        u64 restart_queue;
 209        u64 hw_csum_tx_good;
 210        u64 lsc_int;
 211        u64 hw_tso_ctxt;
 212        u64 hw_tso6_ctxt;
 213        u32 tx_timeout_count;
 214
 215        /* RX */
 216        struct ixgbevf_ring *rx_ring;   /* One per active queue */
 217        int num_rx_queues;
 218        u64 hw_csum_rx_error;
 219        u64 hw_rx_no_dma_resources;
 220        u64 hw_csum_rx_good;
 221        u64 non_eop_descs;
 222        int num_msix_vectors;
 223        struct msix_entry *msix_entries;
 224
 225        u32 alloc_rx_page_failed;
 226        u32 alloc_rx_buff_failed;
 227
 228        /* Some features need tri-state capability,
 229         * thus the additional *_CAPABLE flags.
 230         */
 231        u32 flags;
 232#define IXGBE_FLAG_IN_WATCHDOG_TASK             (u32)(1)
 233#define IXGBE_FLAG_IN_NETPOLL                   (u32)(1 << 1)
 234
 235        /* OS defined structs */
 236        struct net_device *netdev;
 237        struct pci_dev *pdev;
 238
 239        /* structs defined in ixgbe_vf.h */
 240        struct ixgbe_hw hw;
 241        u16 msg_enable;
 242        struct ixgbevf_hw_stats stats;
 243        u64 zero_base;
 244        /* Interrupt Throttle Rate */
 245        u32 eitr_param;
 246
 247        unsigned long state;
 248        u64 tx_busy;
 249        unsigned int tx_ring_count;
 250        unsigned int rx_ring_count;
 251
 252        u32 link_speed;
 253        bool link_up;
 254
 255        struct work_struct watchdog_task;
 256
 257        spinlock_t mbx_lock;
 258};
 259
 260enum ixbgevf_state_t {
 261        __IXGBEVF_TESTING,
 262        __IXGBEVF_RESETTING,
 263        __IXGBEVF_DOWN
 264};
 265
 266struct ixgbevf_cb {
 267        struct sk_buff *prev;
 268};
 269#define IXGBE_CB(skb) ((struct ixgbevf_cb *)(skb)->cb)
 270
 271enum ixgbevf_boards {
 272        board_82599_vf,
 273        board_X540_vf,
 274};
 275
 276extern const struct ixgbevf_info ixgbevf_82599_vf_info;
 277extern const struct ixgbevf_info ixgbevf_X540_vf_info;
 278extern const struct ixgbe_mbx_operations ixgbevf_mbx_ops;
 279
 280/* needed by ethtool.c */
 281extern const char ixgbevf_driver_name[];
 282extern const char ixgbevf_driver_version[];
 283
 284extern void ixgbevf_up(struct ixgbevf_adapter *adapter);
 285extern void ixgbevf_down(struct ixgbevf_adapter *adapter);
 286extern void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter);
 287extern void ixgbevf_reset(struct ixgbevf_adapter *adapter);
 288extern void ixgbevf_set_ethtool_ops(struct net_device *netdev);
 289extern int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *,
 290                                      struct ixgbevf_ring *);
 291extern int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *,
 292                                      struct ixgbevf_ring *);
 293extern void ixgbevf_free_rx_resources(struct ixgbevf_adapter *,
 294                                      struct ixgbevf_ring *);
 295extern void ixgbevf_free_tx_resources(struct ixgbevf_adapter *,
 296                                      struct ixgbevf_ring *);
 297extern void ixgbevf_update_stats(struct ixgbevf_adapter *adapter);
 298extern int ethtool_ioctl(struct ifreq *ifr);
 299
 300extern void ixgbe_napi_add_all(struct ixgbevf_adapter *adapter);
 301extern void ixgbe_napi_del_all(struct ixgbevf_adapter *adapter);
 302
 303#ifdef DEBUG
 304extern char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw);
 305#define hw_dbg(hw, format, arg...) \
 306        printk(KERN_DEBUG "%s: " format, ixgbevf_get_hw_dev_name(hw), ##arg)
 307#else
 308#define hw_dbg(hw, format, arg...) do {} while (0)
 309#endif
 310
 311#endif /* _IXGBEVF_H_ */
 312