linux/drivers/net/ethernet/mellanox/mlx4/en_rx.c
<<
>>
Prefs
   1/*
   2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
   3 *
   4 * This software is available to you under a choice of one of two
   5 * licenses.  You may choose to be licensed under the terms of the GNU
   6 * General Public License (GPL) Version 2, available from the file
   7 * COPYING in the main directory of this source tree, or the
   8 * OpenIB.org BSD license below:
   9 *
  10 *     Redistribution and use in source and binary forms, with or
  11 *     without modification, are permitted provided that the following
  12 *     conditions are met:
  13 *
  14 *      - Redistributions of source code must retain the above
  15 *        copyright notice, this list of conditions and the following
  16 *        disclaimer.
  17 *
  18 *      - Redistributions in binary form must reproduce the above
  19 *        copyright notice, this list of conditions and the following
  20 *        disclaimer in the documentation and/or other materials
  21 *        provided with the distribution.
  22 *
  23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30 * SOFTWARE.
  31 *
  32 */
  33
  34#include <net/busy_poll.h>
  35#include <linux/mlx4/cq.h>
  36#include <linux/slab.h>
  37#include <linux/mlx4/qp.h>
  38#include <linux/skbuff.h>
  39#include <linux/rculist.h>
  40#include <linux/if_ether.h>
  41#include <linux/if_vlan.h>
  42#include <linux/vmalloc.h>
  43
  44#include "mlx4_en.h"
  45
  46static int mlx4_alloc_pages(struct mlx4_en_priv *priv,
  47                            struct mlx4_en_rx_alloc *page_alloc,
  48                            const struct mlx4_en_frag_info *frag_info,
  49                            gfp_t _gfp)
  50{
  51        int order;
  52        struct page *page;
  53        dma_addr_t dma;
  54
  55        for (order = MLX4_EN_ALLOC_PREFER_ORDER; ;) {
  56                gfp_t gfp = _gfp;
  57
  58                if (order)
  59                        gfp |= __GFP_COMP | __GFP_NOWARN;
  60                page = alloc_pages(gfp, order);
  61                if (likely(page))
  62                        break;
  63                if (--order < 0 ||
  64                    ((PAGE_SIZE << order) < frag_info->frag_size))
  65                        return -ENOMEM;
  66        }
  67        dma = dma_map_page(priv->ddev, page, 0, PAGE_SIZE << order,
  68                           PCI_DMA_FROMDEVICE);
  69        if (dma_mapping_error(priv->ddev, dma)) {
  70                put_page(page);
  71                return -ENOMEM;
  72        }
  73        page_alloc->page_size = PAGE_SIZE << order;
  74        page_alloc->page = page;
  75        page_alloc->dma = dma;
  76        page_alloc->page_offset = frag_info->frag_align;
  77        /* Not doing get_page() for each frag is a big win
  78         * on asymetric workloads.
  79         */
  80        atomic_set(&page->_count,
  81                   page_alloc->page_size / frag_info->frag_stride);
  82        return 0;
  83}
  84
  85static int mlx4_en_alloc_frags(struct mlx4_en_priv *priv,
  86                               struct mlx4_en_rx_desc *rx_desc,
  87                               struct mlx4_en_rx_alloc *frags,
  88                               struct mlx4_en_rx_alloc *ring_alloc,
  89                               gfp_t gfp)
  90{
  91        struct mlx4_en_rx_alloc page_alloc[MLX4_EN_MAX_RX_FRAGS];
  92        const struct mlx4_en_frag_info *frag_info;
  93        struct page *page;
  94        dma_addr_t dma;
  95        int i;
  96
  97        for (i = 0; i < priv->num_frags; i++) {
  98                frag_info = &priv->frag_info[i];
  99                page_alloc[i] = ring_alloc[i];
 100                page_alloc[i].page_offset += frag_info->frag_stride;
 101
 102                if (page_alloc[i].page_offset + frag_info->frag_stride <=
 103                    ring_alloc[i].page_size)
 104                        continue;
 105
 106                if (mlx4_alloc_pages(priv, &page_alloc[i], frag_info, gfp))
 107                        goto out;
 108        }
 109
 110        for (i = 0; i < priv->num_frags; i++) {
 111                frags[i] = ring_alloc[i];
 112                dma = ring_alloc[i].dma + ring_alloc[i].page_offset;
 113                ring_alloc[i] = page_alloc[i];
 114                rx_desc->data[i].addr = cpu_to_be64(dma);
 115        }
 116
 117        return 0;
 118
 119out:
 120        while (i--) {
 121                frag_info = &priv->frag_info[i];
 122                if (page_alloc[i].page != ring_alloc[i].page) {
 123                        dma_unmap_page(priv->ddev, page_alloc[i].dma,
 124                                page_alloc[i].page_size, PCI_DMA_FROMDEVICE);
 125                        page = page_alloc[i].page;
 126                        atomic_set(&page->_count, 1);
 127                        put_page(page);
 128                }
 129        }
 130        return -ENOMEM;
 131}
 132
 133static void mlx4_en_free_frag(struct mlx4_en_priv *priv,
 134                              struct mlx4_en_rx_alloc *frags,
 135                              int i)
 136{
 137        const struct mlx4_en_frag_info *frag_info = &priv->frag_info[i];
 138        u32 next_frag_end = frags[i].page_offset + 2 * frag_info->frag_stride;
 139
 140
 141        if (next_frag_end > frags[i].page_size)
 142                dma_unmap_page(priv->ddev, frags[i].dma, frags[i].page_size,
 143                               PCI_DMA_FROMDEVICE);
 144
 145        if (frags[i].page)
 146                put_page(frags[i].page);
 147}
 148
 149static int mlx4_en_init_allocator(struct mlx4_en_priv *priv,
 150                                  struct mlx4_en_rx_ring *ring)
 151{
 152        int i;
 153        struct mlx4_en_rx_alloc *page_alloc;
 154
 155        for (i = 0; i < priv->num_frags; i++) {
 156                const struct mlx4_en_frag_info *frag_info = &priv->frag_info[i];
 157
 158                if (mlx4_alloc_pages(priv, &ring->page_alloc[i],
 159                                     frag_info, GFP_KERNEL))
 160                        goto out;
 161        }
 162        return 0;
 163
 164out:
 165        while (i--) {
 166                struct page *page;
 167
 168                page_alloc = &ring->page_alloc[i];
 169                dma_unmap_page(priv->ddev, page_alloc->dma,
 170                               page_alloc->page_size, PCI_DMA_FROMDEVICE);
 171                page = page_alloc->page;
 172                atomic_set(&page->_count, 1);
 173                put_page(page);
 174                page_alloc->page = NULL;
 175        }
 176        return -ENOMEM;
 177}
 178
 179static void mlx4_en_destroy_allocator(struct mlx4_en_priv *priv,
 180                                      struct mlx4_en_rx_ring *ring)
 181{
 182        struct mlx4_en_rx_alloc *page_alloc;
 183        int i;
 184
 185        for (i = 0; i < priv->num_frags; i++) {
 186                const struct mlx4_en_frag_info *frag_info = &priv->frag_info[i];
 187
 188                page_alloc = &ring->page_alloc[i];
 189                en_dbg(DRV, priv, "Freeing allocator:%d count:%d\n",
 190                       i, page_count(page_alloc->page));
 191
 192                dma_unmap_page(priv->ddev, page_alloc->dma,
 193                                page_alloc->page_size, PCI_DMA_FROMDEVICE);
 194                while (page_alloc->page_offset + frag_info->frag_stride <
 195                       page_alloc->page_size) {
 196                        put_page(page_alloc->page);
 197                        page_alloc->page_offset += frag_info->frag_stride;
 198                }
 199                page_alloc->page = NULL;
 200        }
 201}
 202
 203static void mlx4_en_init_rx_desc(struct mlx4_en_priv *priv,
 204                                 struct mlx4_en_rx_ring *ring, int index)
 205{
 206        struct mlx4_en_rx_desc *rx_desc = ring->buf + ring->stride * index;
 207        int possible_frags;
 208        int i;
 209
 210        /* Set size and memtype fields */
 211        for (i = 0; i < priv->num_frags; i++) {
 212                rx_desc->data[i].byte_count =
 213                        cpu_to_be32(priv->frag_info[i].frag_size);
 214                rx_desc->data[i].lkey = cpu_to_be32(priv->mdev->mr.key);
 215        }
 216
 217        /* If the number of used fragments does not fill up the ring stride,
 218         * remaining (unused) fragments must be padded with null address/size
 219         * and a special memory key */
 220        possible_frags = (ring->stride - sizeof(struct mlx4_en_rx_desc)) / DS_SIZE;
 221        for (i = priv->num_frags; i < possible_frags; i++) {
 222                rx_desc->data[i].byte_count = 0;
 223                rx_desc->data[i].lkey = cpu_to_be32(MLX4_EN_MEMTYPE_PAD);
 224                rx_desc->data[i].addr = 0;
 225        }
 226}
 227
 228static int mlx4_en_prepare_rx_desc(struct mlx4_en_priv *priv,
 229                                   struct mlx4_en_rx_ring *ring, int index,
 230                                   gfp_t gfp)
 231{
 232        struct mlx4_en_rx_desc *rx_desc = ring->buf + (index * ring->stride);
 233        struct mlx4_en_rx_alloc *frags = ring->rx_info +
 234                                        (index << priv->log_rx_info);
 235
 236        return mlx4_en_alloc_frags(priv, rx_desc, frags, ring->page_alloc, gfp);
 237}
 238
 239static inline void mlx4_en_update_rx_prod_db(struct mlx4_en_rx_ring *ring)
 240{
 241        *ring->wqres.db.db = cpu_to_be32(ring->prod & 0xffff);
 242}
 243
 244static void mlx4_en_free_rx_desc(struct mlx4_en_priv *priv,
 245                                 struct mlx4_en_rx_ring *ring,
 246                                 int index)
 247{
 248        struct mlx4_en_rx_alloc *frags;
 249        int nr;
 250
 251        frags = ring->rx_info + (index << priv->log_rx_info);
 252        for (nr = 0; nr < priv->num_frags; nr++) {
 253                en_dbg(DRV, priv, "Freeing fragment:%d\n", nr);
 254                mlx4_en_free_frag(priv, frags, nr);
 255        }
 256}
 257
 258static int mlx4_en_fill_rx_buffers(struct mlx4_en_priv *priv)
 259{
 260        struct mlx4_en_rx_ring *ring;
 261        int ring_ind;
 262        int buf_ind;
 263        int new_size;
 264
 265        for (buf_ind = 0; buf_ind < priv->prof->rx_ring_size; buf_ind++) {
 266                for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
 267                        ring = &priv->rx_ring[ring_ind];
 268
 269                        if (mlx4_en_prepare_rx_desc(priv, ring,
 270                                                    ring->actual_size,
 271                                                    GFP_KERNEL)) {
 272                                if (ring->actual_size < MLX4_EN_MIN_RX_SIZE) {
 273                                        en_err(priv, "Failed to allocate "
 274                                                     "enough rx buffers\n");
 275                                        return -ENOMEM;
 276                                } else {
 277                                        new_size = rounddown_pow_of_two(ring->actual_size);
 278                                        en_warn(priv, "Only %d buffers allocated "
 279                                                      "reducing ring size to %d",
 280                                                ring->actual_size, new_size);
 281                                        goto reduce_rings;
 282                                }
 283                        }
 284                        ring->actual_size++;
 285                        ring->prod++;
 286                }
 287        }
 288        return 0;
 289
 290reduce_rings:
 291        for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
 292                ring = &priv->rx_ring[ring_ind];
 293                while (ring->actual_size > new_size) {
 294                        ring->actual_size--;
 295                        ring->prod--;
 296                        mlx4_en_free_rx_desc(priv, ring, ring->actual_size);
 297                }
 298        }
 299
 300        return 0;
 301}
 302
 303static void mlx4_en_free_rx_buf(struct mlx4_en_priv *priv,
 304                                struct mlx4_en_rx_ring *ring)
 305{
 306        int index;
 307
 308        en_dbg(DRV, priv, "Freeing Rx buf - cons:%d prod:%d\n",
 309               ring->cons, ring->prod);
 310
 311        /* Unmap and free Rx buffers */
 312        BUG_ON((u32) (ring->prod - ring->cons) > ring->actual_size);
 313        while (ring->cons != ring->prod) {
 314                index = ring->cons & ring->size_mask;
 315                en_dbg(DRV, priv, "Processing descriptor:%d\n", index);
 316                mlx4_en_free_rx_desc(priv, ring, index);
 317                ++ring->cons;
 318        }
 319}
 320
 321int mlx4_en_create_rx_ring(struct mlx4_en_priv *priv,
 322                           struct mlx4_en_rx_ring *ring, u32 size, u16 stride)
 323{
 324        struct mlx4_en_dev *mdev = priv->mdev;
 325        int err = -ENOMEM;
 326        int tmp;
 327
 328        ring->prod = 0;
 329        ring->cons = 0;
 330        ring->size = size;
 331        ring->size_mask = size - 1;
 332        ring->stride = stride;
 333        ring->log_stride = ffs(ring->stride) - 1;
 334        ring->buf_size = ring->size * ring->stride + TXBB_SIZE;
 335
 336        tmp = size * roundup_pow_of_two(MLX4_EN_MAX_RX_FRAGS *
 337                                        sizeof(struct mlx4_en_rx_alloc));
 338        ring->rx_info = vmalloc(tmp);
 339        if (!ring->rx_info)
 340                return -ENOMEM;
 341
 342        en_dbg(DRV, priv, "Allocated rx_info ring at addr:%p size:%d\n",
 343                 ring->rx_info, tmp);
 344
 345        err = mlx4_alloc_hwq_res(mdev->dev, &ring->wqres,
 346                                 ring->buf_size, 2 * PAGE_SIZE);
 347        if (err)
 348                goto err_ring;
 349
 350        err = mlx4_en_map_buffer(&ring->wqres.buf);
 351        if (err) {
 352                en_err(priv, "Failed to map RX buffer\n");
 353                goto err_hwq;
 354        }
 355        ring->buf = ring->wqres.buf.direct.buf;
 356
 357        ring->hwtstamp_rx_filter = priv->hwtstamp_config.rx_filter;
 358
 359        return 0;
 360
 361err_hwq:
 362        mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size);
 363err_ring:
 364        vfree(ring->rx_info);
 365        ring->rx_info = NULL;
 366        return err;
 367}
 368
 369int mlx4_en_activate_rx_rings(struct mlx4_en_priv *priv)
 370{
 371        struct mlx4_en_rx_ring *ring;
 372        int i;
 373        int ring_ind;
 374        int err;
 375        int stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
 376                                        DS_SIZE * priv->num_frags);
 377
 378        for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
 379                ring = &priv->rx_ring[ring_ind];
 380
 381                ring->prod = 0;
 382                ring->cons = 0;
 383                ring->actual_size = 0;
 384                ring->cqn = priv->rx_cq[ring_ind].mcq.cqn;
 385
 386                ring->stride = stride;
 387                if (ring->stride <= TXBB_SIZE)
 388                        ring->buf += TXBB_SIZE;
 389
 390                ring->log_stride = ffs(ring->stride) - 1;
 391                ring->buf_size = ring->size * ring->stride;
 392
 393                memset(ring->buf, 0, ring->buf_size);
 394                mlx4_en_update_rx_prod_db(ring);
 395
 396                /* Initialize all descriptors */
 397                for (i = 0; i < ring->size; i++)
 398                        mlx4_en_init_rx_desc(priv, ring, i);
 399
 400                /* Initialize page allocators */
 401                err = mlx4_en_init_allocator(priv, ring);
 402                if (err) {
 403                        en_err(priv, "Failed initializing ring allocator\n");
 404                        if (ring->stride <= TXBB_SIZE)
 405                                ring->buf -= TXBB_SIZE;
 406                        ring_ind--;
 407                        goto err_allocator;
 408                }
 409        }
 410        err = mlx4_en_fill_rx_buffers(priv);
 411        if (err)
 412                goto err_buffers;
 413
 414        for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
 415                ring = &priv->rx_ring[ring_ind];
 416
 417                ring->size_mask = ring->actual_size - 1;
 418                mlx4_en_update_rx_prod_db(ring);
 419        }
 420
 421        return 0;
 422
 423err_buffers:
 424        for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++)
 425                mlx4_en_free_rx_buf(priv, &priv->rx_ring[ring_ind]);
 426
 427        ring_ind = priv->rx_ring_num - 1;
 428err_allocator:
 429        while (ring_ind >= 0) {
 430                if (priv->rx_ring[ring_ind].stride <= TXBB_SIZE)
 431                        priv->rx_ring[ring_ind].buf -= TXBB_SIZE;
 432                mlx4_en_destroy_allocator(priv, &priv->rx_ring[ring_ind]);
 433                ring_ind--;
 434        }
 435        return err;
 436}
 437
 438void mlx4_en_destroy_rx_ring(struct mlx4_en_priv *priv,
 439                             struct mlx4_en_rx_ring *ring, u32 size, u16 stride)
 440{
 441        struct mlx4_en_dev *mdev = priv->mdev;
 442
 443        mlx4_en_unmap_buffer(&ring->wqres.buf);
 444        mlx4_free_hwq_res(mdev->dev, &ring->wqres, size * stride + TXBB_SIZE);
 445        vfree(ring->rx_info);
 446        ring->rx_info = NULL;
 447#ifdef CONFIG_RFS_ACCEL
 448        mlx4_en_cleanup_filters(priv, ring);
 449#endif
 450}
 451
 452void mlx4_en_deactivate_rx_ring(struct mlx4_en_priv *priv,
 453                                struct mlx4_en_rx_ring *ring)
 454{
 455        mlx4_en_free_rx_buf(priv, ring);
 456        if (ring->stride <= TXBB_SIZE)
 457                ring->buf -= TXBB_SIZE;
 458        mlx4_en_destroy_allocator(priv, ring);
 459}
 460
 461
 462static int mlx4_en_complete_rx_desc(struct mlx4_en_priv *priv,
 463                                    struct mlx4_en_rx_desc *rx_desc,
 464                                    struct mlx4_en_rx_alloc *frags,
 465                                    struct sk_buff *skb,
 466                                    int length)
 467{
 468        struct skb_frag_struct *skb_frags_rx = skb_shinfo(skb)->frags;
 469        struct mlx4_en_frag_info *frag_info;
 470        int nr;
 471        dma_addr_t dma;
 472
 473        /* Collect used fragments while replacing them in the HW descriptors */
 474        for (nr = 0; nr < priv->num_frags; nr++) {
 475                frag_info = &priv->frag_info[nr];
 476                if (length <= frag_info->frag_prefix_size)
 477                        break;
 478                if (!frags[nr].page)
 479                        goto fail;
 480
 481                dma = be64_to_cpu(rx_desc->data[nr].addr);
 482                dma_sync_single_for_cpu(priv->ddev, dma, frag_info->frag_size,
 483                                        DMA_FROM_DEVICE);
 484
 485                /* Save page reference in skb */
 486                __skb_frag_set_page(&skb_frags_rx[nr], frags[nr].page);
 487                skb_frag_size_set(&skb_frags_rx[nr], frag_info->frag_size);
 488                skb_frags_rx[nr].page_offset = frags[nr].page_offset;
 489                skb->truesize += frag_info->frag_stride;
 490                frags[nr].page = NULL;
 491        }
 492        /* Adjust size of last fragment to match actual length */
 493        if (nr > 0)
 494                skb_frag_size_set(&skb_frags_rx[nr - 1],
 495                        length - priv->frag_info[nr - 1].frag_prefix_size);
 496        return nr;
 497
 498fail:
 499        while (nr > 0) {
 500                nr--;
 501                __skb_frag_unref(&skb_frags_rx[nr]);
 502        }
 503        return 0;
 504}
 505
 506
 507static struct sk_buff *mlx4_en_rx_skb(struct mlx4_en_priv *priv,
 508                                      struct mlx4_en_rx_desc *rx_desc,
 509                                      struct mlx4_en_rx_alloc *frags,
 510                                      unsigned int length)
 511{
 512        struct sk_buff *skb;
 513        void *va;
 514        int used_frags;
 515        dma_addr_t dma;
 516
 517        skb = netdev_alloc_skb(priv->dev, SMALL_PACKET_SIZE + NET_IP_ALIGN);
 518        if (!skb) {
 519                en_dbg(RX_ERR, priv, "Failed allocating skb\n");
 520                return NULL;
 521        }
 522        skb_reserve(skb, NET_IP_ALIGN);
 523        skb->len = length;
 524
 525        /* Get pointer to first fragment so we could copy the headers into the
 526         * (linear part of the) skb */
 527        va = page_address(frags[0].page) + frags[0].page_offset;
 528
 529        if (length <= SMALL_PACKET_SIZE) {
 530                /* We are copying all relevant data to the skb - temporarily
 531                 * sync buffers for the copy */
 532                dma = be64_to_cpu(rx_desc->data[0].addr);
 533                dma_sync_single_for_cpu(priv->ddev, dma, length,
 534                                        DMA_FROM_DEVICE);
 535                skb_copy_to_linear_data(skb, va, length);
 536                skb->tail += length;
 537        } else {
 538                /* Move relevant fragments to skb */
 539                used_frags = mlx4_en_complete_rx_desc(priv, rx_desc, frags,
 540                                                        skb, length);
 541                if (unlikely(!used_frags)) {
 542                        kfree_skb(skb);
 543                        return NULL;
 544                }
 545                skb_shinfo(skb)->nr_frags = used_frags;
 546
 547                /* Copy headers into the skb linear buffer */
 548                memcpy(skb->data, va, HEADER_COPY_SIZE);
 549                skb->tail += HEADER_COPY_SIZE;
 550
 551                /* Skip headers in first fragment */
 552                skb_shinfo(skb)->frags[0].page_offset += HEADER_COPY_SIZE;
 553
 554                /* Adjust size of first fragment */
 555                skb_frag_size_sub(&skb_shinfo(skb)->frags[0], HEADER_COPY_SIZE);
 556                skb->data_len = length - HEADER_COPY_SIZE;
 557        }
 558        return skb;
 559}
 560
 561static void validate_loopback(struct mlx4_en_priv *priv, struct sk_buff *skb)
 562{
 563        int i;
 564        int offset = ETH_HLEN;
 565
 566        for (i = 0; i < MLX4_LOOPBACK_TEST_PAYLOAD; i++, offset++) {
 567                if (*(skb->data + offset) != (unsigned char) (i & 0xff))
 568                        goto out_loopback;
 569        }
 570        /* Loopback found */
 571        priv->loopback_ok = 1;
 572
 573out_loopback:
 574        dev_kfree_skb_any(skb);
 575}
 576
 577static void mlx4_en_refill_rx_buffers(struct mlx4_en_priv *priv,
 578                                     struct mlx4_en_rx_ring *ring)
 579{
 580        int index = ring->prod & ring->size_mask;
 581
 582        while ((u32) (ring->prod - ring->cons) < ring->actual_size) {
 583                if (mlx4_en_prepare_rx_desc(priv, ring, index, GFP_ATOMIC))
 584                        break;
 585                ring->prod++;
 586                index = ring->prod & ring->size_mask;
 587        }
 588}
 589
 590int mlx4_en_process_rx_cq(struct net_device *dev, struct mlx4_en_cq *cq, int budget)
 591{
 592        struct mlx4_en_priv *priv = netdev_priv(dev);
 593        struct mlx4_en_dev *mdev = priv->mdev;
 594        struct mlx4_cqe *cqe;
 595        struct mlx4_en_rx_ring *ring = &priv->rx_ring[cq->ring];
 596        struct mlx4_en_rx_alloc *frags;
 597        struct mlx4_en_rx_desc *rx_desc;
 598        struct sk_buff *skb;
 599        int index;
 600        int nr;
 601        unsigned int length;
 602        int polled = 0;
 603        int ip_summed;
 604        int factor = priv->cqe_factor;
 605        u64 timestamp;
 606
 607        if (!priv->port_up)
 608                return 0;
 609
 610        /* We assume a 1:1 mapping between CQEs and Rx descriptors, so Rx
 611         * descriptor offset can be deduced from the CQE index instead of
 612         * reading 'cqe->index' */
 613        index = cq->mcq.cons_index & ring->size_mask;
 614        cqe = &cq->buf[(index << factor) + factor];
 615
 616        /* Process all completed CQEs */
 617        while (XNOR(cqe->owner_sr_opcode & MLX4_CQE_OWNER_MASK,
 618                    cq->mcq.cons_index & cq->size)) {
 619
 620                frags = ring->rx_info + (index << priv->log_rx_info);
 621                rx_desc = ring->buf + (index << ring->log_stride);
 622
 623                /*
 624                 * make sure we read the CQE after we read the ownership bit
 625                 */
 626                rmb();
 627
 628                /* Drop packet on bad receive or bad checksum */
 629                if (unlikely((cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) ==
 630                                                MLX4_CQE_OPCODE_ERROR)) {
 631                        en_err(priv, "CQE completed in error - vendor "
 632                                  "syndrom:%d syndrom:%d\n",
 633                                  ((struct mlx4_err_cqe *) cqe)->vendor_err_syndrome,
 634                                  ((struct mlx4_err_cqe *) cqe)->syndrome);
 635                        goto next;
 636                }
 637                if (unlikely(cqe->badfcs_enc & MLX4_CQE_BAD_FCS)) {
 638                        en_dbg(RX_ERR, priv, "Accepted frame with bad FCS\n");
 639                        goto next;
 640                }
 641
 642                /* Check if we need to drop the packet if SRIOV is not enabled
 643                 * and not performing the selftest or flb disabled
 644                 */
 645                if (priv->flags & MLX4_EN_FLAG_RX_FILTER_NEEDED) {
 646                        struct ethhdr *ethh;
 647                        dma_addr_t dma;
 648                        /* Get pointer to first fragment since we haven't
 649                         * skb yet and cast it to ethhdr struct
 650                         */
 651                        dma = be64_to_cpu(rx_desc->data[0].addr);
 652                        dma_sync_single_for_cpu(priv->ddev, dma, sizeof(*ethh),
 653                                                DMA_FROM_DEVICE);
 654                        ethh = (struct ethhdr *)(page_address(frags[0].page) +
 655                                                 frags[0].page_offset);
 656
 657                        if (is_multicast_ether_addr(ethh->h_dest)) {
 658                                struct mlx4_mac_entry *entry;
 659                                struct hlist_head *bucket;
 660                                unsigned int mac_hash;
 661
 662                                /* Drop the packet, since HW loopback-ed it */
 663                                mac_hash = ethh->h_source[MLX4_EN_MAC_HASH_IDX];
 664                                bucket = &priv->mac_hash[mac_hash];
 665                                rcu_read_lock();
 666                                hlist_for_each_entry_rcu(entry, bucket, hlist) {
 667                                        if (ether_addr_equal_64bits(entry->mac,
 668                                                                    ethh->h_source)) {
 669                                                rcu_read_unlock();
 670                                                goto next;
 671                                        }
 672                                }
 673                                rcu_read_unlock();
 674                        }
 675                }
 676
 677                /*
 678                 * Packet is OK - process it.
 679                 */
 680                length = be32_to_cpu(cqe->byte_cnt);
 681                length -= ring->fcs_del;
 682                ring->bytes += length;
 683                ring->packets++;
 684
 685                if (likely(dev->features & NETIF_F_RXCSUM)) {
 686                        if ((cqe->status & cpu_to_be16(MLX4_CQE_STATUS_IPOK)) &&
 687                            (cqe->checksum == cpu_to_be16(0xffff))) {
 688                                ring->csum_ok++;
 689                                /* This packet is eligible for GRO if it is:
 690                                 * - DIX Ethernet (type interpretation)
 691                                 * - TCP/IP (v4)
 692                                 * - without IP options
 693                                 * - not an IP fragment
 694                                 * - no LLS polling in progress
 695                                 */
 696                                if (!mlx4_en_cq_ll_polling(cq) &&
 697                                    (dev->features & NETIF_F_GRO)) {
 698                                        struct sk_buff *gro_skb = napi_get_frags(&cq->napi);
 699                                        if (!gro_skb)
 700                                                goto next;
 701
 702                                        nr = mlx4_en_complete_rx_desc(priv,
 703                                                rx_desc, frags, gro_skb,
 704                                                length);
 705                                        if (!nr)
 706                                                goto next;
 707
 708                                        skb_shinfo(gro_skb)->nr_frags = nr;
 709                                        gro_skb->len = length;
 710                                        gro_skb->data_len = length;
 711                                        gro_skb->ip_summed = CHECKSUM_UNNECESSARY;
 712
 713                                        if ((cqe->vlan_my_qpn &
 714                                            cpu_to_be32(MLX4_CQE_VLAN_PRESENT_MASK)) &&
 715                                            (dev->features & NETIF_F_HW_VLAN_CTAG_RX)) {
 716                                                u16 vid = be16_to_cpu(cqe->sl_vid);
 717
 718                                                __vlan_hwaccel_put_tag(gro_skb, htons(ETH_P_8021Q), vid);
 719                                        }
 720
 721                                        if (dev->features & NETIF_F_RXHASH)
 722                                                gro_skb->rxhash = be32_to_cpu(cqe->immed_rss_invalid);
 723
 724                                        skb_record_rx_queue(gro_skb, cq->ring);
 725
 726                                        if (ring->hwtstamp_rx_filter == HWTSTAMP_FILTER_ALL) {
 727                                                timestamp = mlx4_en_get_cqe_ts(cqe);
 728                                                mlx4_en_fill_hwtstamps(mdev,
 729                                                                       skb_hwtstamps(gro_skb),
 730                                                                       timestamp);
 731                                        }
 732
 733                                        napi_gro_frags(&cq->napi);
 734                                        goto next;
 735                                }
 736
 737                                /* GRO not possible, complete processing here */
 738                                ip_summed = CHECKSUM_UNNECESSARY;
 739                        } else {
 740                                ip_summed = CHECKSUM_NONE;
 741                                ring->csum_none++;
 742                        }
 743                } else {
 744                        ip_summed = CHECKSUM_NONE;
 745                        ring->csum_none++;
 746                }
 747
 748                skb = mlx4_en_rx_skb(priv, rx_desc, frags, length);
 749                if (!skb) {
 750                        priv->stats.rx_dropped++;
 751                        goto next;
 752                }
 753
 754                if (unlikely(priv->validate_loopback)) {
 755                        validate_loopback(priv, skb);
 756                        goto next;
 757                }
 758
 759                skb->ip_summed = ip_summed;
 760                skb->protocol = eth_type_trans(skb, dev);
 761                skb_record_rx_queue(skb, cq->ring);
 762
 763                if (dev->features & NETIF_F_RXHASH)
 764                        skb->rxhash = be32_to_cpu(cqe->immed_rss_invalid);
 765
 766                if ((be32_to_cpu(cqe->vlan_my_qpn) &
 767                    MLX4_CQE_VLAN_PRESENT_MASK) &&
 768                    (dev->features & NETIF_F_HW_VLAN_CTAG_RX))
 769                        __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), be16_to_cpu(cqe->sl_vid));
 770
 771                if (ring->hwtstamp_rx_filter == HWTSTAMP_FILTER_ALL) {
 772                        timestamp = mlx4_en_get_cqe_ts(cqe);
 773                        mlx4_en_fill_hwtstamps(mdev, skb_hwtstamps(skb),
 774                                               timestamp);
 775                }
 776
 777                skb_mark_napi_id(skb, &cq->napi);
 778
 779                /* Push it up the stack */
 780                netif_receive_skb(skb);
 781
 782next:
 783                for (nr = 0; nr < priv->num_frags; nr++)
 784                        mlx4_en_free_frag(priv, frags, nr);
 785
 786                ++cq->mcq.cons_index;
 787                index = (cq->mcq.cons_index) & ring->size_mask;
 788                cqe = &cq->buf[(index << factor) + factor];
 789                if (++polled == budget)
 790                        goto out;
 791        }
 792
 793out:
 794        AVG_PERF_COUNTER(priv->pstats.rx_coal_avg, polled);
 795        mlx4_cq_set_ci(&cq->mcq);
 796        wmb(); /* ensure HW sees CQ consumer before we post new buffers */
 797        ring->cons = cq->mcq.cons_index;
 798        mlx4_en_refill_rx_buffers(priv, ring);
 799        mlx4_en_update_rx_prod_db(ring);
 800        return polled;
 801}
 802
 803
 804void mlx4_en_rx_irq(struct mlx4_cq *mcq)
 805{
 806        struct mlx4_en_cq *cq = container_of(mcq, struct mlx4_en_cq, mcq);
 807        struct mlx4_en_priv *priv = netdev_priv(cq->dev);
 808
 809        if (priv->port_up)
 810                napi_schedule(&cq->napi);
 811        else
 812                mlx4_en_arm_cq(priv, cq);
 813}
 814
 815/* Rx CQ polling - called by NAPI */
 816int mlx4_en_poll_rx_cq(struct napi_struct *napi, int budget)
 817{
 818        struct mlx4_en_cq *cq = container_of(napi, struct mlx4_en_cq, napi);
 819        struct net_device *dev = cq->dev;
 820        struct mlx4_en_priv *priv = netdev_priv(dev);
 821        int done;
 822
 823        if (!mlx4_en_cq_lock_napi(cq))
 824                return budget;
 825
 826        done = mlx4_en_process_rx_cq(dev, cq, budget);
 827
 828        mlx4_en_cq_unlock_napi(cq);
 829
 830        /* If we used up all the quota - we're probably not done yet... */
 831        if (done == budget)
 832                INC_PERF_COUNTER(priv->pstats.napi_quota);
 833        else {
 834                /* Done for now */
 835                napi_complete(napi);
 836                mlx4_en_arm_cq(priv, cq);
 837        }
 838        return done;
 839}
 840
 841static const int frag_sizes[] = {
 842        FRAG_SZ0,
 843        FRAG_SZ1,
 844        FRAG_SZ2,
 845        FRAG_SZ3
 846};
 847
 848void mlx4_en_calc_rx_buf(struct net_device *dev)
 849{
 850        struct mlx4_en_priv *priv = netdev_priv(dev);
 851        int eff_mtu = dev->mtu + ETH_HLEN + VLAN_HLEN + ETH_LLC_SNAP_SIZE;
 852        int buf_size = 0;
 853        int i = 0;
 854
 855        while (buf_size < eff_mtu) {
 856                priv->frag_info[i].frag_size =
 857                        (eff_mtu > buf_size + frag_sizes[i]) ?
 858                                frag_sizes[i] : eff_mtu - buf_size;
 859                priv->frag_info[i].frag_prefix_size = buf_size;
 860                if (!i) {
 861                        priv->frag_info[i].frag_align = NET_IP_ALIGN;
 862                        priv->frag_info[i].frag_stride =
 863                                ALIGN(frag_sizes[i] + NET_IP_ALIGN, SMP_CACHE_BYTES);
 864                } else {
 865                        priv->frag_info[i].frag_align = 0;
 866                        priv->frag_info[i].frag_stride =
 867                                ALIGN(frag_sizes[i], SMP_CACHE_BYTES);
 868                }
 869                buf_size += priv->frag_info[i].frag_size;
 870                i++;
 871        }
 872
 873        priv->num_frags = i;
 874        priv->rx_skb_size = eff_mtu;
 875        priv->log_rx_info = ROUNDUP_LOG2(i * sizeof(struct mlx4_en_rx_alloc));
 876
 877        en_dbg(DRV, priv, "Rx buffer scatter-list (effective-mtu:%d "
 878                  "num_frags:%d):\n", eff_mtu, priv->num_frags);
 879        for (i = 0; i < priv->num_frags; i++) {
 880                en_err(priv,
 881                       "  frag:%d - size:%d prefix:%d align:%d stride:%d\n",
 882                       i,
 883                       priv->frag_info[i].frag_size,
 884                       priv->frag_info[i].frag_prefix_size,
 885                       priv->frag_info[i].frag_align,
 886                       priv->frag_info[i].frag_stride);
 887        }
 888}
 889
 890/* RSS related functions */
 891
 892static int mlx4_en_config_rss_qp(struct mlx4_en_priv *priv, int qpn,
 893                                 struct mlx4_en_rx_ring *ring,
 894                                 enum mlx4_qp_state *state,
 895                                 struct mlx4_qp *qp)
 896{
 897        struct mlx4_en_dev *mdev = priv->mdev;
 898        struct mlx4_qp_context *context;
 899        int err = 0;
 900
 901        context = kmalloc(sizeof(*context), GFP_KERNEL);
 902        if (!context)
 903                return -ENOMEM;
 904
 905        err = mlx4_qp_alloc(mdev->dev, qpn, qp);
 906        if (err) {
 907                en_err(priv, "Failed to allocate qp #%x\n", qpn);
 908                goto out;
 909        }
 910        qp->event = mlx4_en_sqp_event;
 911
 912        memset(context, 0, sizeof *context);
 913        mlx4_en_fill_qp_context(priv, ring->actual_size, ring->stride, 0, 0,
 914                                qpn, ring->cqn, -1, context);
 915        context->db_rec_addr = cpu_to_be64(ring->wqres.db.dma);
 916
 917        /* Cancel FCS removal if FW allows */
 918        if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP) {
 919                context->param3 |= cpu_to_be32(1 << 29);
 920                ring->fcs_del = ETH_FCS_LEN;
 921        } else
 922                ring->fcs_del = 0;
 923
 924        err = mlx4_qp_to_ready(mdev->dev, &ring->wqres.mtt, context, qp, state);
 925        if (err) {
 926                mlx4_qp_remove(mdev->dev, qp);
 927                mlx4_qp_free(mdev->dev, qp);
 928        }
 929        mlx4_en_update_rx_prod_db(ring);
 930out:
 931        kfree(context);
 932        return err;
 933}
 934
 935int mlx4_en_create_drop_qp(struct mlx4_en_priv *priv)
 936{
 937        int err;
 938        u32 qpn;
 939
 940        err = mlx4_qp_reserve_range(priv->mdev->dev, 1, 1, &qpn);
 941        if (err) {
 942                en_err(priv, "Failed reserving drop qpn\n");
 943                return err;
 944        }
 945        err = mlx4_qp_alloc(priv->mdev->dev, qpn, &priv->drop_qp);
 946        if (err) {
 947                en_err(priv, "Failed allocating drop qp\n");
 948                mlx4_qp_release_range(priv->mdev->dev, qpn, 1);
 949                return err;
 950        }
 951
 952        return 0;
 953}
 954
 955void mlx4_en_destroy_drop_qp(struct mlx4_en_priv *priv)
 956{
 957        u32 qpn;
 958
 959        qpn = priv->drop_qp.qpn;
 960        mlx4_qp_remove(priv->mdev->dev, &priv->drop_qp);
 961        mlx4_qp_free(priv->mdev->dev, &priv->drop_qp);
 962        mlx4_qp_release_range(priv->mdev->dev, qpn, 1);
 963}
 964
 965/* Allocate rx qp's and configure them according to rss map */
 966int mlx4_en_config_rss_steer(struct mlx4_en_priv *priv)
 967{
 968        struct mlx4_en_dev *mdev = priv->mdev;
 969        struct mlx4_en_rss_map *rss_map = &priv->rss_map;
 970        struct mlx4_qp_context context;
 971        struct mlx4_rss_context *rss_context;
 972        int rss_rings;
 973        void *ptr;
 974        u8 rss_mask = (MLX4_RSS_IPV4 | MLX4_RSS_TCP_IPV4 | MLX4_RSS_IPV6 |
 975                        MLX4_RSS_TCP_IPV6);
 976        int i, qpn;
 977        int err = 0;
 978        int good_qps = 0;
 979        static const u32 rsskey[10] = { 0xD181C62C, 0xF7F4DB5B, 0x1983A2FC,
 980                                0x943E1ADB, 0xD9389E6B, 0xD1039C2C, 0xA74499AD,
 981                                0x593D56D9, 0xF3253C06, 0x2ADC1FFC};
 982
 983        en_dbg(DRV, priv, "Configuring rss steering\n");
 984        err = mlx4_qp_reserve_range(mdev->dev, priv->rx_ring_num,
 985                                    priv->rx_ring_num,
 986                                    &rss_map->base_qpn);
 987        if (err) {
 988                en_err(priv, "Failed reserving %d qps\n", priv->rx_ring_num);
 989                return err;
 990        }
 991
 992        for (i = 0; i < priv->rx_ring_num; i++) {
 993                qpn = rss_map->base_qpn + i;
 994                err = mlx4_en_config_rss_qp(priv, qpn, &priv->rx_ring[i],
 995                                            &rss_map->state[i],
 996                                            &rss_map->qps[i]);
 997                if (err)
 998                        goto rss_err;
 999
1000                ++good_qps;
1001        }
1002
1003        /* Configure RSS indirection qp */
1004        err = mlx4_qp_alloc(mdev->dev, priv->base_qpn, &rss_map->indir_qp);
1005        if (err) {
1006                en_err(priv, "Failed to allocate RSS indirection QP\n");
1007                goto rss_err;
1008        }
1009        rss_map->indir_qp.event = mlx4_en_sqp_event;
1010        mlx4_en_fill_qp_context(priv, 0, 0, 0, 1, priv->base_qpn,
1011                                priv->rx_ring[0].cqn, -1, &context);
1012
1013        if (!priv->prof->rss_rings || priv->prof->rss_rings > priv->rx_ring_num)
1014                rss_rings = priv->rx_ring_num;
1015        else
1016                rss_rings = priv->prof->rss_rings;
1017
1018        ptr = ((void *) &context) + offsetof(struct mlx4_qp_context, pri_path)
1019                                        + MLX4_RSS_OFFSET_IN_QPC_PRI_PATH;
1020        rss_context = ptr;
1021        rss_context->base_qpn = cpu_to_be32(ilog2(rss_rings) << 24 |
1022                                            (rss_map->base_qpn));
1023        rss_context->default_qpn = cpu_to_be32(rss_map->base_qpn);
1024        if (priv->mdev->profile.udp_rss) {
1025                rss_mask |=  MLX4_RSS_UDP_IPV4 | MLX4_RSS_UDP_IPV6;
1026                rss_context->base_qpn_udp = rss_context->default_qpn;
1027        }
1028        rss_context->flags = rss_mask;
1029        rss_context->hash_fn = MLX4_RSS_HASH_TOP;
1030        for (i = 0; i < 10; i++)
1031                rss_context->rss_key[i] = cpu_to_be32(rsskey[i]);
1032
1033        err = mlx4_qp_to_ready(mdev->dev, &priv->res.mtt, &context,
1034                               &rss_map->indir_qp, &rss_map->indir_state);
1035        if (err)
1036                goto indir_err;
1037
1038        return 0;
1039
1040indir_err:
1041        mlx4_qp_modify(mdev->dev, NULL, rss_map->indir_state,
1042                       MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->indir_qp);
1043        mlx4_qp_remove(mdev->dev, &rss_map->indir_qp);
1044        mlx4_qp_free(mdev->dev, &rss_map->indir_qp);
1045rss_err:
1046        for (i = 0; i < good_qps; i++) {
1047                mlx4_qp_modify(mdev->dev, NULL, rss_map->state[i],
1048                               MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->qps[i]);
1049                mlx4_qp_remove(mdev->dev, &rss_map->qps[i]);
1050                mlx4_qp_free(mdev->dev, &rss_map->qps[i]);
1051        }
1052        mlx4_qp_release_range(mdev->dev, rss_map->base_qpn, priv->rx_ring_num);
1053        return err;
1054}
1055
1056void mlx4_en_release_rss_steer(struct mlx4_en_priv *priv)
1057{
1058        struct mlx4_en_dev *mdev = priv->mdev;
1059        struct mlx4_en_rss_map *rss_map = &priv->rss_map;
1060        int i;
1061
1062        mlx4_qp_modify(mdev->dev, NULL, rss_map->indir_state,
1063                       MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->indir_qp);
1064        mlx4_qp_remove(mdev->dev, &rss_map->indir_qp);
1065        mlx4_qp_free(mdev->dev, &rss_map->indir_qp);
1066
1067        for (i = 0; i < priv->rx_ring_num; i++) {
1068                mlx4_qp_modify(mdev->dev, NULL, rss_map->state[i],
1069                               MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->qps[i]);
1070                mlx4_qp_remove(mdev->dev, &rss_map->qps[i]);
1071                mlx4_qp_free(mdev->dev, &rss_map->qps[i]);
1072        }
1073        mlx4_qp_release_range(mdev->dev, rss_map->base_qpn, priv->rx_ring_num);
1074}
1075