LXR linux/drivers/net/vmxnet3/vmxnet3

   1/*
   2 * Linux driver for VMware's vmxnet3 ethernet NIC.
   3 *
   4 * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved.
   5 *
   6 * This program is free software; you can redistribute it and/or modify it
   7 * under the terms of the GNU General Public License as published by the
   8 * Free Software Foundation; version 2 of the License and no later version.
   9 *
  10 * This program is distributed in the hope that it will be useful, but
  11 * WITHOUT ANY WARRANTY; without even the implied warranty of
  12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  13 * NON INFRINGEMENT.  See the GNU General Public License for more
  14 * details.
  15 *
  16 * You should have received a copy of the GNU General Public License
  17 * along with this program; if not, write to the Free Software
  18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19 *
  20 * The full GNU General Public License is included in this distribution in
  21 * the file called "COPYING".
  22 *
  23 * Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com>
  24 *
  25 */
  26
  27#ifndef _VMXNET3_INT_H
  28#define _VMXNET3_INT_H
  29
  30#include <linux/bitops.h>
  31#include <linux/ethtool.h>
  32#include <linux/delay.h>
  33#include <linux/netdevice.h>
  34#include <linux/pci.h>
  35#include <linux/compiler.h>
  36#include <linux/slab.h>
  37#include <linux/spinlock.h>
  38#include <linux/ioport.h>
  39#include <linux/highmem.h>
  40#include <linux/init.h>
  41#include <linux/timer.h>
  42#include <linux/skbuff.h>
  43#include <linux/interrupt.h>
  44#include <linux/workqueue.h>
  45#include <linux/uaccess.h>
  46#include <asm/dma.h>
  47#include <asm/page.h>
  48
  49#include <linux/tcp.h>
  50#include <linux/udp.h>
  51#include <linux/ip.h>
  52#include <linux/ipv6.h>
  53#include <linux/in.h>
  54#include <linux/etherdevice.h>
  55#include <asm/checksum.h>
  56#include <linux/if_vlan.h>
  57#include <linux/if_arp.h>
  58#include <linux/inetdevice.h>
  59#include <linux/log2.h>
  60
  61#include "vmxnet3_defs.h"
  62
  63#ifdef DEBUG
  64# define VMXNET3_DRIVER_VERSION_REPORT VMXNET3_DRIVER_VERSION_STRING"-NAPI(debug)"
  65#else
  66# define VMXNET3_DRIVER_VERSION_REPORT VMXNET3_DRIVER_VERSION_STRING"-NAPI"
  67#endif
  68
  69
  70/*
  71 * Version numbers
  72 */
  73#define VMXNET3_DRIVER_VERSION_STRING   "1.2.0.0-k"
  74
  75/* a 32-bit int, each byte encode a verion number in VMXNET3_DRIVER_VERSION */
  76#define VMXNET3_DRIVER_VERSION_NUM      0x01020000
  77
  78#if defined(CONFIG_PCI_MSI)
  79        /* RSS only makes sense if MSI-X is supported. */
  80        #define VMXNET3_RSS
  81#endif
  82
  83/*
  84 * Capabilities
  85 */
  86
  87enum {
  88        VMNET_CAP_SG            = 0x0001, /* Can do scatter-gather transmits. */
  89        VMNET_CAP_IP4_CSUM      = 0x0002, /* Can checksum only TCP/UDP over
  90                                           * IPv4 */
  91        VMNET_CAP_HW_CSUM       = 0x0004, /* Can checksum all packets. */
  92        VMNET_CAP_HIGH_DMA      = 0x0008, /* Can DMA to high memory. */
  93        VMNET_CAP_TOE           = 0x0010, /* Supports TCP/IP offload. */
  94        VMNET_CAP_TSO           = 0x0020, /* Supports TCP Segmentation
  95                                           * offload */
  96        VMNET_CAP_SW_TSO        = 0x0040, /* Supports SW TCP Segmentation */
  97        VMNET_CAP_VMXNET_APROM  = 0x0080, /* Vmxnet APROM support */
  98        VMNET_CAP_HW_TX_VLAN    = 0x0100, /* Can we do VLAN tagging in HW */
  99        VMNET_CAP_HW_RX_VLAN    = 0x0200, /* Can we do VLAN untagging in HW */
 100        VMNET_CAP_SW_VLAN       = 0x0400, /* VLAN tagging/untagging in SW */
 101        VMNET_CAP_WAKE_PCKT_RCV = 0x0800, /* Can wake on network packet recv? */
 102        VMNET_CAP_ENABLE_INT_INLINE = 0x1000,  /* Enable Interrupt Inline */
 103        VMNET_CAP_ENABLE_HEADER_COPY = 0x2000,  /* copy header for vmkernel */
 104        VMNET_CAP_TX_CHAIN      = 0x4000, /* Guest can use multiple tx entries
 105                                          * for a pkt */
 106        VMNET_CAP_RX_CHAIN      = 0x8000, /* pkt can span multiple rx entries */
 107        VMNET_CAP_LPD           = 0x10000, /* large pkt delivery */
 108        VMNET_CAP_BPF           = 0x20000, /* BPF Support in VMXNET Virtual HW*/
 109        VMNET_CAP_SG_SPAN_PAGES = 0x40000, /* Scatter-gather can span multiple*/
 110                                           /* pages transmits */
 111        VMNET_CAP_IP6_CSUM      = 0x80000, /* Can do IPv6 csum offload. */
 112        VMNET_CAP_TSO6         = 0x100000, /* TSO seg. offload for IPv6 pkts. */
 113        VMNET_CAP_TSO256k      = 0x200000, /* Can do TSO seg offload for */
 114                                           /* pkts up to 256kB. */
 115        VMNET_CAP_UPT          = 0x400000  /* Support UPT */
 116};
 117
 118/*
 119 * PCI vendor and device IDs.
 120 */
 121#define PCI_VENDOR_ID_VMWARE            0x15AD
 122#define PCI_DEVICE_ID_VMWARE_VMXNET3    0x07B0
 123#define MAX_ETHERNET_CARDS              10
 124#define MAX_PCI_PASSTHRU_DEVICE         6
 125
 126struct vmxnet3_cmd_ring {
 127        union Vmxnet3_GenericDesc *base;
 128        u32             size;
 129        u32             next2fill;
 130        u32             next2comp;
 131        u8              gen;
 132        dma_addr_t      basePA;
 133};
 134
 135static inline void
 136vmxnet3_cmd_ring_adv_next2fill(struct vmxnet3_cmd_ring *ring)
 137{
 138        ring->next2fill++;
 139        if (unlikely(ring->next2fill == ring->size)) {
 140                ring->next2fill = 0;
 141                VMXNET3_FLIP_RING_GEN(ring->gen);
 142        }
 143}
 144
 145static inline void
 146vmxnet3_cmd_ring_adv_next2comp(struct vmxnet3_cmd_ring *ring)
 147{
 148        VMXNET3_INC_RING_IDX_ONLY(ring->next2comp, ring->size);
 149}
 150
 151static inline int
 152vmxnet3_cmd_ring_desc_avail(struct vmxnet3_cmd_ring *ring)
 153{
 154        return (ring->next2comp > ring->next2fill ? 0 : ring->size) +
 155                ring->next2comp - ring->next2fill - 1;
 156}
 157
 158struct vmxnet3_comp_ring {
 159        union Vmxnet3_GenericDesc *base;
 160        u32               size;
 161        u32               next2proc;
 162        u8                gen;
 163        u8                intr_idx;
 164        dma_addr_t           basePA;
 165};
 166
 167static inline void
 168vmxnet3_comp_ring_adv_next2proc(struct vmxnet3_comp_ring *ring)
 169{
 170        ring->next2proc++;
 171        if (unlikely(ring->next2proc == ring->size)) {
 172                ring->next2proc = 0;
 173                VMXNET3_FLIP_RING_GEN(ring->gen);
 174        }
 175}
 176
 177struct vmxnet3_tx_data_ring {
 178        struct Vmxnet3_TxDataDesc *base;
 179        u32              size;
 180        dma_addr_t          basePA;
 181};
 182
 183enum vmxnet3_buf_map_type {
 184        VMXNET3_MAP_INVALID = 0,
 185        VMXNET3_MAP_NONE,
 186        VMXNET3_MAP_SINGLE,
 187        VMXNET3_MAP_PAGE,
 188};
 189
 190struct vmxnet3_tx_buf_info {
 191        u32      map_type;
 192        u16      len;
 193        u16      sop_idx;
 194        dma_addr_t  dma_addr;
 195        struct sk_buff *skb;
 196};
 197
 198struct vmxnet3_tq_driver_stats {
 199        u64 drop_total;     /* # of pkts dropped by the driver, the
 200                                * counters below track droppings due to
 201                                * different reasons
 202                                */
 203        u64 drop_too_many_frags;
 204        u64 drop_oversized_hdr;
 205        u64 drop_hdr_inspect_err;
 206        u64 drop_tso;
 207
 208        u64 tx_ring_full;
 209        u64 linearized;         /* # of pkts linearized */
 210        u64 copy_skb_header;    /* # of times we have to copy skb header */
 211        u64 oversized_hdr;
 212};
 213
 214struct vmxnet3_tx_ctx {
 215        bool   ipv4;
 216        u16 mss;
 217        u32 eth_ip_hdr_size; /* only valid for pkts requesting tso or csum
 218                                 * offloading
 219                                 */
 220        u32 l4_hdr_size;     /* only valid if mss != 0 */
 221        u32 copy_size;       /* # of bytes copied into the data ring */
 222        union Vmxnet3_GenericDesc *sop_txd;
 223        union Vmxnet3_GenericDesc *eop_txd;
 224};
 225
 226struct vmxnet3_tx_queue {
 227        char                    name[IFNAMSIZ+8]; /* To identify interrupt */
 228        struct vmxnet3_adapter          *adapter;
 229        spinlock_t                      tx_lock;
 230        struct vmxnet3_cmd_ring         tx_ring;
 231        struct vmxnet3_tx_buf_info      *buf_info;
 232        dma_addr_t                       buf_info_pa;
 233        struct vmxnet3_tx_data_ring     data_ring;
 234        struct vmxnet3_comp_ring        comp_ring;
 235        struct Vmxnet3_TxQueueCtrl      *shared;
 236        struct vmxnet3_tq_driver_stats  stats;
 237        bool                            stopped;
 238        int                             num_stop;  /* # of times the queue is
 239                                                    * stopped */
 240        int                             qid;
 241} __attribute__((__aligned__(SMP_CACHE_BYTES)));
 242
 243enum vmxnet3_rx_buf_type {
 244        VMXNET3_RX_BUF_NONE = 0,
 245        VMXNET3_RX_BUF_SKB = 1,
 246        VMXNET3_RX_BUF_PAGE = 2
 247};
 248
 249struct vmxnet3_rx_buf_info {
 250        enum vmxnet3_rx_buf_type buf_type;
 251        u16     len;
 252        union {
 253                struct sk_buff *skb;
 254                struct page    *page;
 255        };
 256        dma_addr_t dma_addr;
 257};
 258
 259struct vmxnet3_rx_ctx {
 260        struct sk_buff *skb;
 261        u32 sop_idx;
 262};
 263
 264struct vmxnet3_rq_driver_stats {
 265        u64 drop_total;
 266        u64 drop_err;
 267        u64 drop_fcs;
 268        u64 rx_buf_alloc_failure;
 269};
 270
 271struct vmxnet3_rx_queue {
 272        char                    name[IFNAMSIZ + 8]; /* To identify interrupt */
 273        struct vmxnet3_adapter    *adapter;
 274        struct napi_struct        napi;
 275        struct vmxnet3_cmd_ring   rx_ring[2];
 276        struct vmxnet3_comp_ring  comp_ring;
 277        struct vmxnet3_rx_ctx     rx_ctx;
 278        u32 qid;            /* rqID in RCD for buffer from 1st ring */
 279        u32 qid2;           /* rqID in RCD for buffer from 2nd ring */
 280        struct vmxnet3_rx_buf_info     *buf_info[2];
 281        dma_addr_t                      buf_info_pa;
 282        struct Vmxnet3_RxQueueCtrl            *shared;
 283        struct vmxnet3_rq_driver_stats  stats;
 284} __attribute__((__aligned__(SMP_CACHE_BYTES)));
 285
 286#define VMXNET3_DEVICE_MAX_TX_QUEUES 8
 287#define VMXNET3_DEVICE_MAX_RX_QUEUES 8   /* Keep this value as a power of 2 */
 288
 289/* Should be less than UPT1_RSS_MAX_IND_TABLE_SIZE */
 290#define VMXNET3_RSS_IND_TABLE_SIZE (VMXNET3_DEVICE_MAX_RX_QUEUES * 4)
 291
 292#define VMXNET3_LINUX_MAX_MSIX_VECT     (VMXNET3_DEVICE_MAX_TX_QUEUES + \
 293                                         VMXNET3_DEVICE_MAX_RX_QUEUES + 1)
 294#define VMXNET3_LINUX_MIN_MSIX_VECT     2 /* 1 for tx-rx pair and 1 for event */
 295
 296
 297struct vmxnet3_intr {
 298        enum vmxnet3_intr_mask_mode  mask_mode;
 299        enum vmxnet3_intr_type       type;      /* MSI-X, MSI, or INTx? */
 300        u8  num_intrs;                  /* # of intr vectors */
 301        u8  event_intr_idx;             /* idx of the intr vector for event */
 302        u8  mod_levels[VMXNET3_LINUX_MAX_MSIX_VECT]; /* moderation level */
 303        char    event_msi_vector_name[IFNAMSIZ+11];
 304#ifdef CONFIG_PCI_MSI
 305        struct msix_entry msix_entries[VMXNET3_LINUX_MAX_MSIX_VECT];
 306#endif
 307};
 308
 309/* Interrupt sharing schemes, share_intr */
 310#define VMXNET3_INTR_BUDDYSHARE 0    /* Corresponding tx,rx queues share irq */
 311#define VMXNET3_INTR_TXSHARE 1       /* All tx queues share one irq */
 312#define VMXNET3_INTR_DONTSHARE 2     /* each queue has its own irq */
 313
 314
 315#define VMXNET3_STATE_BIT_RESETTING   0
 316#define VMXNET3_STATE_BIT_QUIESCED    1
 317struct vmxnet3_adapter {
 318        struct vmxnet3_tx_queue         tx_queue[VMXNET3_DEVICE_MAX_TX_QUEUES];
 319        struct vmxnet3_rx_queue         rx_queue[VMXNET3_DEVICE_MAX_RX_QUEUES];
 320        unsigned long                   active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
 321        struct vmxnet3_intr             intr;
 322        spinlock_t                      cmd_lock;
 323        struct Vmxnet3_DriverShared     *shared;
 324        struct Vmxnet3_PMConf           *pm_conf;
 325        struct Vmxnet3_TxQueueDesc      *tqd_start;     /* all tx queue desc */
 326        struct Vmxnet3_RxQueueDesc      *rqd_start;     /* all rx queue desc */
 327        struct net_device               *netdev;
 328        struct pci_dev                  *pdev;
 329
 330        u8                      __iomem *hw_addr0; /* for BAR 0 */
 331        u8                      __iomem *hw_addr1; /* for BAR 1 */
 332
 333#ifdef VMXNET3_RSS
 334        struct UPT1_RSSConf             *rss_conf;
 335        bool                            rss;
 336#endif
 337        u32                             num_rx_queues;
 338        u32                             num_tx_queues;
 339
 340        /* rx buffer related */
 341        unsigned                        skb_buf_size;
 342        int             rx_buf_per_pkt;  /* only apply to the 1st ring */
 343        dma_addr_t                      shared_pa;
 344        dma_addr_t queue_desc_pa;
 345
 346        /* Wake-on-LAN */
 347        u32     wol;
 348
 349        /* Link speed */
 350        u32     link_speed; /* in mbps */
 351
 352        u64     tx_timeout_count;
 353        struct work_struct work;
 354
 355        unsigned long  state;    /* VMXNET3_STATE_BIT_xxx */
 356
 357        int share_intr;
 358
 359        dma_addr_t adapter_pa;
 360        dma_addr_t pm_conf_pa;
 361        dma_addr_t rss_conf_pa;
 362};
 363
 364#define VMXNET3_WRITE_BAR0_REG(adapter, reg, val)  \
 365        writel((val), (adapter)->hw_addr0 + (reg))
 366#define VMXNET3_READ_BAR0_REG(adapter, reg)        \
 367        readl((adapter)->hw_addr0 + (reg))
 368
 369#define VMXNET3_WRITE_BAR1_REG(adapter, reg, val)  \
 370        writel((val), (adapter)->hw_addr1 + (reg))
 371#define VMXNET3_READ_BAR1_REG(adapter, reg)        \
 372        readl((adapter)->hw_addr1 + (reg))
 373
 374#define VMXNET3_WAKE_QUEUE_THRESHOLD(tq)  (5)
 375#define VMXNET3_RX_ALLOC_THRESHOLD(rq, ring_idx, adapter) \
 376        ((rq)->rx_ring[ring_idx].size >> 3)
 377
 378#define VMXNET3_GET_ADDR_LO(dma)   ((u32)(dma))
 379#define VMXNET3_GET_ADDR_HI(dma)   ((u32)(((u64)(dma)) >> 32))
 380
 381/* must be a multiple of VMXNET3_RING_SIZE_ALIGN */
 382#define VMXNET3_DEF_TX_RING_SIZE    512
 383#define VMXNET3_DEF_RX_RING_SIZE    256
 384
 385#define VMXNET3_MAX_ETH_HDR_SIZE    22
 386#define VMXNET3_MAX_SKB_BUF_SIZE    (3*1024)
 387
 388int
 389vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter);
 390
 391int
 392vmxnet3_activate_dev(struct vmxnet3_adapter *adapter);
 393
 394void
 395vmxnet3_force_close(struct vmxnet3_adapter *adapter);
 396
 397void
 398vmxnet3_reset_dev(struct vmxnet3_adapter *adapter);
 399
 400void
 401vmxnet3_tq_destroy_all(struct vmxnet3_adapter *adapter);
 402
 403void
 404vmxnet3_rq_destroy_all(struct vmxnet3_adapter *adapter);
 405
 406int
 407vmxnet3_set_features(struct net_device *netdev, netdev_features_t features);
 408
 409int
 410vmxnet3_create_queues(struct vmxnet3_adapter *adapter,
 411                      u32 tx_ring_size, u32 rx_ring_size, u32 rx_ring2_size);
 412
 413extern void vmxnet3_set_ethtool_ops(struct net_device *netdev);
 414
 415extern struct rtnl_link_stats64 *
 416vmxnet3_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats);
 417
 418extern char vmxnet3_driver_name[];
 419#endif
 420