linux/drivers/net/wan/lmc/lmc_main.c
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   1 /*
   2  * Copyright (c) 1997-2000 LAN Media Corporation (LMC)
   3  * All rights reserved.  www.lanmedia.com
   4  * Generic HDLC port Copyright (C) 2008 Krzysztof Halasa <khc@pm.waw.pl>
   5  *
   6  * This code is written by:
   7  * Andrew Stanley-Jones (asj@cban.com)
   8  * Rob Braun (bbraun@vix.com),
   9  * Michael Graff (explorer@vix.com) and
  10  * Matt Thomas (matt@3am-software.com).
  11  *
  12  * With Help By:
  13  * David Boggs
  14  * Ron Crane
  15  * Alan Cox
  16  *
  17  * This software may be used and distributed according to the terms
  18  * of the GNU General Public License version 2, incorporated herein by reference.
  19  *
  20  * Driver for the LanMedia LMC5200, LMC5245, LMC1000, LMC1200 cards.
  21  *
  22  * To control link specific options lmcctl is required.
  23  * It can be obtained from ftp.lanmedia.com.
  24  *
  25  * Linux driver notes:
  26  * Linux uses the device struct lmc_private to pass private information
  27  * around.
  28  *
  29  * The initialization portion of this driver (the lmc_reset() and the
  30  * lmc_dec_reset() functions, as well as the led controls and the
  31  * lmc_initcsrs() functions.
  32  *
  33  * The watchdog function runs every second and checks to see if
  34  * we still have link, and that the timing source is what we expected
  35  * it to be.  If link is lost, the interface is marked down, and
  36  * we no longer can transmit.
  37  *
  38  */
  39
  40#include <linux/kernel.h>
  41#include <linux/module.h>
  42#include <linux/string.h>
  43#include <linux/timer.h>
  44#include <linux/ptrace.h>
  45#include <linux/errno.h>
  46#include <linux/ioport.h>
  47#include <linux/slab.h>
  48#include <linux/interrupt.h>
  49#include <linux/pci.h>
  50#include <linux/delay.h>
  51#include <linux/hdlc.h>
  52#include <linux/init.h>
  53#include <linux/in.h>
  54#include <linux/if_arp.h>
  55#include <linux/netdevice.h>
  56#include <linux/etherdevice.h>
  57#include <linux/skbuff.h>
  58#include <linux/inet.h>
  59#include <linux/bitops.h>
  60#include <asm/processor.h>             /* Processor type for cache alignment. */
  61#include <asm/io.h>
  62#include <asm/dma.h>
  63#include <asm/uaccess.h>
  64//#include <asm/spinlock.h>
  65
  66#define DRIVER_MAJOR_VERSION     1
  67#define DRIVER_MINOR_VERSION    34
  68#define DRIVER_SUB_VERSION       0
  69
  70#define DRIVER_VERSION  ((DRIVER_MAJOR_VERSION << 8) + DRIVER_MINOR_VERSION)
  71
  72#include "lmc.h"
  73#include "lmc_var.h"
  74#include "lmc_ioctl.h"
  75#include "lmc_debug.h"
  76#include "lmc_proto.h"
  77
  78static int LMC_PKT_BUF_SZ = 1542;
  79
  80static DEFINE_PCI_DEVICE_TABLE(lmc_pci_tbl) = {
  81        { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST,
  82          PCI_VENDOR_ID_LMC, PCI_ANY_ID },
  83        { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST,
  84          PCI_ANY_ID, PCI_VENDOR_ID_LMC },
  85        { 0 }
  86};
  87
  88MODULE_DEVICE_TABLE(pci, lmc_pci_tbl);
  89MODULE_LICENSE("GPL v2");
  90
  91
  92static netdev_tx_t lmc_start_xmit(struct sk_buff *skb,
  93                                        struct net_device *dev);
  94static int lmc_rx (struct net_device *dev);
  95static int lmc_open(struct net_device *dev);
  96static int lmc_close(struct net_device *dev);
  97static struct net_device_stats *lmc_get_stats(struct net_device *dev);
  98static irqreturn_t lmc_interrupt(int irq, void *dev_instance);
  99static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, size_t csr_size);
 100static void lmc_softreset(lmc_softc_t * const);
 101static void lmc_running_reset(struct net_device *dev);
 102static int lmc_ifdown(struct net_device * const);
 103static void lmc_watchdog(unsigned long data);
 104static void lmc_reset(lmc_softc_t * const sc);
 105static void lmc_dec_reset(lmc_softc_t * const sc);
 106static void lmc_driver_timeout(struct net_device *dev);
 107
 108/*
 109 * linux reserves 16 device specific IOCTLs.  We call them
 110 * LMCIOC* to control various bits of our world.
 111 */
 112int lmc_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) /*fold00*/
 113{
 114    lmc_softc_t *sc = dev_to_sc(dev);
 115    lmc_ctl_t ctl;
 116    int ret = -EOPNOTSUPP;
 117    u16 regVal;
 118    unsigned long flags;
 119
 120    lmc_trace(dev, "lmc_ioctl in");
 121
 122    /*
 123     * Most functions mess with the structure
 124     * Disable interrupts while we do the polling
 125     */
 126
 127    switch (cmd) {
 128        /*
 129         * Return current driver state.  Since we keep this up
 130         * To date internally, just copy this out to the user.
 131         */
 132    case LMCIOCGINFO: /*fold01*/
 133        if (copy_to_user(ifr->ifr_data, &sc->ictl, sizeof(lmc_ctl_t)))
 134                ret = -EFAULT;
 135        else
 136                ret = 0;
 137        break;
 138
 139    case LMCIOCSINFO: /*fold01*/
 140        if (!capable(CAP_NET_ADMIN)) {
 141            ret = -EPERM;
 142            break;
 143        }
 144
 145        if(dev->flags & IFF_UP){
 146            ret = -EBUSY;
 147            break;
 148        }
 149
 150        if (copy_from_user(&ctl, ifr->ifr_data, sizeof(lmc_ctl_t))) {
 151                ret = -EFAULT;
 152                break;
 153        }
 154
 155        spin_lock_irqsave(&sc->lmc_lock, flags);
 156        sc->lmc_media->set_status (sc, &ctl);
 157
 158        if(ctl.crc_length != sc->ictl.crc_length) {
 159            sc->lmc_media->set_crc_length(sc, ctl.crc_length);
 160            if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16)
 161                sc->TxDescriptControlInit |=  LMC_TDES_ADD_CRC_DISABLE;
 162            else
 163                sc->TxDescriptControlInit &= ~LMC_TDES_ADD_CRC_DISABLE;
 164        }
 165        spin_unlock_irqrestore(&sc->lmc_lock, flags);
 166
 167        ret = 0;
 168        break;
 169
 170    case LMCIOCIFTYPE: /*fold01*/
 171        {
 172            u16 old_type = sc->if_type;
 173            u16 new_type;
 174
 175            if (!capable(CAP_NET_ADMIN)) {
 176                ret = -EPERM;
 177                break;
 178            }
 179
 180            if (copy_from_user(&new_type, ifr->ifr_data, sizeof(u16))) {
 181                ret = -EFAULT;
 182                break;
 183            }
 184
 185            
 186            if (new_type == old_type)
 187            {
 188                ret = 0 ;
 189                break;                          /* no change */
 190            }
 191            
 192            spin_lock_irqsave(&sc->lmc_lock, flags);
 193            lmc_proto_close(sc);
 194
 195            sc->if_type = new_type;
 196            lmc_proto_attach(sc);
 197            ret = lmc_proto_open(sc);
 198            spin_unlock_irqrestore(&sc->lmc_lock, flags);
 199            break;
 200        }
 201
 202    case LMCIOCGETXINFO: /*fold01*/
 203        spin_lock_irqsave(&sc->lmc_lock, flags);
 204        sc->lmc_xinfo.Magic0 = 0xBEEFCAFE;
 205
 206        sc->lmc_xinfo.PciCardType = sc->lmc_cardtype;
 207        sc->lmc_xinfo.PciSlotNumber = 0;
 208        sc->lmc_xinfo.DriverMajorVersion = DRIVER_MAJOR_VERSION;
 209        sc->lmc_xinfo.DriverMinorVersion = DRIVER_MINOR_VERSION;
 210        sc->lmc_xinfo.DriverSubVersion = DRIVER_SUB_VERSION;
 211        sc->lmc_xinfo.XilinxRevisionNumber =
 212            lmc_mii_readreg (sc, 0, 3) & 0xf;
 213        sc->lmc_xinfo.MaxFrameSize = LMC_PKT_BUF_SZ;
 214        sc->lmc_xinfo.link_status = sc->lmc_media->get_link_status (sc);
 215        sc->lmc_xinfo.mii_reg16 = lmc_mii_readreg (sc, 0, 16);
 216        spin_unlock_irqrestore(&sc->lmc_lock, flags);
 217
 218        sc->lmc_xinfo.Magic1 = 0xDEADBEEF;
 219
 220        if (copy_to_user(ifr->ifr_data, &sc->lmc_xinfo,
 221                         sizeof(struct lmc_xinfo)))
 222                ret = -EFAULT;
 223        else
 224                ret = 0;
 225
 226        break;
 227
 228    case LMCIOCGETLMCSTATS:
 229            spin_lock_irqsave(&sc->lmc_lock, flags);
 230            if (sc->lmc_cardtype == LMC_CARDTYPE_T1) {
 231                    lmc_mii_writereg(sc, 0, 17, T1FRAMER_FERR_LSB);
 232                    sc->extra_stats.framingBitErrorCount +=
 233                            lmc_mii_readreg(sc, 0, 18) & 0xff;
 234                    lmc_mii_writereg(sc, 0, 17, T1FRAMER_FERR_MSB);
 235                    sc->extra_stats.framingBitErrorCount +=
 236                            (lmc_mii_readreg(sc, 0, 18) & 0xff) << 8;
 237                    lmc_mii_writereg(sc, 0, 17, T1FRAMER_LCV_LSB);
 238                    sc->extra_stats.lineCodeViolationCount +=
 239                            lmc_mii_readreg(sc, 0, 18) & 0xff;
 240                    lmc_mii_writereg(sc, 0, 17, T1FRAMER_LCV_MSB);
 241                    sc->extra_stats.lineCodeViolationCount +=
 242                            (lmc_mii_readreg(sc, 0, 18) & 0xff) << 8;
 243                    lmc_mii_writereg(sc, 0, 17, T1FRAMER_AERR);
 244                    regVal = lmc_mii_readreg(sc, 0, 18) & 0xff;
 245
 246                    sc->extra_stats.lossOfFrameCount +=
 247                            (regVal & T1FRAMER_LOF_MASK) >> 4;
 248                    sc->extra_stats.changeOfFrameAlignmentCount +=
 249                            (regVal & T1FRAMER_COFA_MASK) >> 2;
 250                    sc->extra_stats.severelyErroredFrameCount +=
 251                            regVal & T1FRAMER_SEF_MASK;
 252            }
 253            spin_unlock_irqrestore(&sc->lmc_lock, flags);
 254            if (copy_to_user(ifr->ifr_data, &sc->lmc_device->stats,
 255                             sizeof(sc->lmc_device->stats)) ||
 256                copy_to_user(ifr->ifr_data + sizeof(sc->lmc_device->stats),
 257                             &sc->extra_stats, sizeof(sc->extra_stats)))
 258                    ret = -EFAULT;
 259            else
 260                    ret = 0;
 261            break;
 262
 263    case LMCIOCCLEARLMCSTATS:
 264            if (!capable(CAP_NET_ADMIN)) {
 265                    ret = -EPERM;
 266                    break;
 267            }
 268
 269            spin_lock_irqsave(&sc->lmc_lock, flags);
 270            memset(&sc->lmc_device->stats, 0, sizeof(sc->lmc_device->stats));
 271            memset(&sc->extra_stats, 0, sizeof(sc->extra_stats));
 272            sc->extra_stats.check = STATCHECK;
 273            sc->extra_stats.version_size = (DRIVER_VERSION << 16) +
 274                    sizeof(sc->lmc_device->stats) + sizeof(sc->extra_stats);
 275            sc->extra_stats.lmc_cardtype = sc->lmc_cardtype;
 276            spin_unlock_irqrestore(&sc->lmc_lock, flags);
 277            ret = 0;
 278            break;
 279
 280    case LMCIOCSETCIRCUIT: /*fold01*/
 281        if (!capable(CAP_NET_ADMIN)){
 282            ret = -EPERM;
 283            break;
 284        }
 285
 286        if(dev->flags & IFF_UP){
 287            ret = -EBUSY;
 288            break;
 289        }
 290
 291        if (copy_from_user(&ctl, ifr->ifr_data, sizeof(lmc_ctl_t))) {
 292                ret = -EFAULT;
 293                break;
 294        }
 295        spin_lock_irqsave(&sc->lmc_lock, flags);
 296        sc->lmc_media->set_circuit_type(sc, ctl.circuit_type);
 297        sc->ictl.circuit_type = ctl.circuit_type;
 298        spin_unlock_irqrestore(&sc->lmc_lock, flags);
 299        ret = 0;
 300
 301        break;
 302
 303    case LMCIOCRESET: /*fold01*/
 304        if (!capable(CAP_NET_ADMIN)){
 305            ret = -EPERM;
 306            break;
 307        }
 308
 309        spin_lock_irqsave(&sc->lmc_lock, flags);
 310        /* Reset driver and bring back to current state */
 311        printk (" REG16 before reset +%04x\n", lmc_mii_readreg (sc, 0, 16));
 312        lmc_running_reset (dev);
 313        printk (" REG16 after reset +%04x\n", lmc_mii_readreg (sc, 0, 16));
 314
 315        LMC_EVENT_LOG(LMC_EVENT_FORCEDRESET, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16));
 316        spin_unlock_irqrestore(&sc->lmc_lock, flags);
 317
 318        ret = 0;
 319        break;
 320
 321#ifdef DEBUG
 322    case LMCIOCDUMPEVENTLOG:
 323        if (copy_to_user(ifr->ifr_data, &lmcEventLogIndex, sizeof(u32))) {
 324                ret = -EFAULT;
 325                break;
 326        }
 327        if (copy_to_user(ifr->ifr_data + sizeof(u32), lmcEventLogBuf,
 328                         sizeof(lmcEventLogBuf)))
 329                ret = -EFAULT;
 330        else
 331                ret = 0;
 332
 333        break;
 334#endif /* end ifdef _DBG_EVENTLOG */
 335    case LMCIOCT1CONTROL: /*fold01*/
 336        if (sc->lmc_cardtype != LMC_CARDTYPE_T1){
 337            ret = -EOPNOTSUPP;
 338            break;
 339        }
 340        break;
 341    case LMCIOCXILINX: /*fold01*/
 342        {
 343            struct lmc_xilinx_control xc; /*fold02*/
 344
 345            if (!capable(CAP_NET_ADMIN)){
 346                ret = -EPERM;
 347                break;
 348            }
 349
 350            /*
 351             * Stop the xwitter whlie we restart the hardware
 352             */
 353            netif_stop_queue(dev);
 354
 355            if (copy_from_user(&xc, ifr->ifr_data, sizeof(struct lmc_xilinx_control))) {
 356                ret = -EFAULT;
 357                break;
 358            }
 359            switch(xc.command){
 360            case lmc_xilinx_reset: /*fold02*/
 361                {
 362                    u16 mii;
 363                    spin_lock_irqsave(&sc->lmc_lock, flags);
 364                    mii = lmc_mii_readreg (sc, 0, 16);
 365
 366                    /*
 367                     * Make all of them 0 and make input
 368                     */
 369                    lmc_gpio_mkinput(sc, 0xff);
 370
 371                    /*
 372                     * make the reset output
 373                     */
 374                    lmc_gpio_mkoutput(sc, LMC_GEP_RESET);
 375
 376                    /*
 377                     * RESET low to force configuration.  This also forces
 378                     * the transmitter clock to be internal, but we expect to reset
 379                     * that later anyway.
 380                     */
 381
 382                    sc->lmc_gpio &= ~LMC_GEP_RESET;
 383                    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 384
 385
 386                    /*
 387                     * hold for more than 10 microseconds
 388                     */
 389                    udelay(50);
 390
 391                    sc->lmc_gpio |= LMC_GEP_RESET;
 392                    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 393
 394
 395                    /*
 396                     * stop driving Xilinx-related signals
 397                     */
 398                    lmc_gpio_mkinput(sc, 0xff);
 399
 400                    /* Reset the frammer hardware */
 401                    sc->lmc_media->set_link_status (sc, 1);
 402                    sc->lmc_media->set_status (sc, NULL);
 403//                    lmc_softreset(sc);
 404
 405                    {
 406                        int i;
 407                        for(i = 0; i < 5; i++){
 408                            lmc_led_on(sc, LMC_DS3_LED0);
 409                            mdelay(100);
 410                            lmc_led_off(sc, LMC_DS3_LED0);
 411                            lmc_led_on(sc, LMC_DS3_LED1);
 412                            mdelay(100);
 413                            lmc_led_off(sc, LMC_DS3_LED1);
 414                            lmc_led_on(sc, LMC_DS3_LED3);
 415                            mdelay(100);
 416                            lmc_led_off(sc, LMC_DS3_LED3);
 417                            lmc_led_on(sc, LMC_DS3_LED2);
 418                            mdelay(100);
 419                            lmc_led_off(sc, LMC_DS3_LED2);
 420                        }
 421                    }
 422                    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 423                    
 424                    
 425
 426                    ret = 0x0;
 427
 428                }
 429
 430                break;
 431            case lmc_xilinx_load_prom: /*fold02*/
 432                {
 433                    u16 mii;
 434                    int timeout = 500000;
 435                    spin_lock_irqsave(&sc->lmc_lock, flags);
 436                    mii = lmc_mii_readreg (sc, 0, 16);
 437
 438                    /*
 439                     * Make all of them 0 and make input
 440                     */
 441                    lmc_gpio_mkinput(sc, 0xff);
 442
 443                    /*
 444                     * make the reset output
 445                     */
 446                    lmc_gpio_mkoutput(sc,  LMC_GEP_DP | LMC_GEP_RESET);
 447
 448                    /*
 449                     * RESET low to force configuration.  This also forces
 450                     * the transmitter clock to be internal, but we expect to reset
 451                     * that later anyway.
 452                     */
 453
 454                    sc->lmc_gpio &= ~(LMC_GEP_RESET | LMC_GEP_DP);
 455                    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 456
 457
 458                    /*
 459                     * hold for more than 10 microseconds
 460                     */
 461                    udelay(50);
 462
 463                    sc->lmc_gpio |= LMC_GEP_DP | LMC_GEP_RESET;
 464                    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 465
 466                    /*
 467                     * busy wait for the chip to reset
 468                     */
 469                    while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 &&
 470                           (timeout-- > 0))
 471                        cpu_relax();
 472
 473
 474                    /*
 475                     * stop driving Xilinx-related signals
 476                     */
 477                    lmc_gpio_mkinput(sc, 0xff);
 478                    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 479
 480                    ret = 0x0;
 481                    
 482
 483                    break;
 484
 485                }
 486
 487            case lmc_xilinx_load: /*fold02*/
 488                {
 489                    char *data;
 490                    int pos;
 491                    int timeout = 500000;
 492
 493                    if (!xc.data) {
 494                            ret = -EINVAL;
 495                            break;
 496                    }
 497
 498                    data = kmalloc(xc.len, GFP_KERNEL);
 499                    if (!data) {
 500                            ret = -ENOMEM;
 501                            break;
 502                    }
 503                    
 504                    if(copy_from_user(data, xc.data, xc.len))
 505                    {
 506                        kfree(data);
 507                        ret = -ENOMEM;
 508                        break;
 509                    }
 510
 511                    printk("%s: Starting load of data Len: %d at 0x%p == 0x%p\n", dev->name, xc.len, xc.data, data);
 512
 513                    spin_lock_irqsave(&sc->lmc_lock, flags);
 514                    lmc_gpio_mkinput(sc, 0xff);
 515
 516                    /*
 517                     * Clear the Xilinx and start prgramming from the DEC
 518                     */
 519
 520                    /*
 521                     * Set ouput as:
 522                     * Reset: 0 (active)
 523                     * DP:    0 (active)
 524                     * Mode:  1
 525                     *
 526                     */
 527                    sc->lmc_gpio = 0x00;
 528                    sc->lmc_gpio &= ~LMC_GEP_DP;
 529                    sc->lmc_gpio &= ~LMC_GEP_RESET;
 530                    sc->lmc_gpio |=  LMC_GEP_MODE;
 531                    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 532
 533                    lmc_gpio_mkoutput(sc, LMC_GEP_MODE | LMC_GEP_DP | LMC_GEP_RESET);
 534
 535                    /*
 536                     * Wait at least 10 us 20 to be safe
 537                     */
 538                    udelay(50);
 539
 540                    /*
 541                     * Clear reset and activate programming lines
 542                     * Reset: Input
 543                     * DP:    Input
 544                     * Clock: Output
 545                     * Data:  Output
 546                     * Mode:  Output
 547                     */
 548                    lmc_gpio_mkinput(sc, LMC_GEP_DP | LMC_GEP_RESET);
 549
 550                    /*
 551                     * Set LOAD, DATA, Clock to 1
 552                     */
 553                    sc->lmc_gpio = 0x00;
 554                    sc->lmc_gpio |= LMC_GEP_MODE;
 555                    sc->lmc_gpio |= LMC_GEP_DATA;
 556                    sc->lmc_gpio |= LMC_GEP_CLK;
 557                    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 558                    
 559                    lmc_gpio_mkoutput(sc, LMC_GEP_DATA | LMC_GEP_CLK | LMC_GEP_MODE );
 560
 561                    /*
 562                     * busy wait for the chip to reset
 563                     */
 564                    while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 &&
 565                           (timeout-- > 0))
 566                        cpu_relax();
 567
 568                    printk(KERN_DEBUG "%s: Waited %d for the Xilinx to clear it's memory\n", dev->name, 500000-timeout);
 569
 570                    for(pos = 0; pos < xc.len; pos++){
 571                        switch(data[pos]){
 572                        case 0:
 573                            sc->lmc_gpio &= ~LMC_GEP_DATA; /* Data is 0 */
 574                            break;
 575                        case 1:
 576                            sc->lmc_gpio |= LMC_GEP_DATA; /* Data is 1 */
 577                            break;
 578                        default:
 579                            printk(KERN_WARNING "%s Bad data in xilinx programming data at %d, got %d wanted 0 or 1\n", dev->name, pos, data[pos]);
 580                            sc->lmc_gpio |= LMC_GEP_DATA; /* Assume it's 1 */
 581                        }
 582                        sc->lmc_gpio &= ~LMC_GEP_CLK; /* Clock to zero */
 583                        sc->lmc_gpio |= LMC_GEP_MODE;
 584                        LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 585                        udelay(1);
 586                        
 587                        sc->lmc_gpio |= LMC_GEP_CLK; /* Put the clack back to one */
 588                        sc->lmc_gpio |= LMC_GEP_MODE;
 589                        LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
 590                        udelay(1);
 591                    }
 592                    if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0){
 593                        printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (corrupted data)\n", dev->name);
 594                    }
 595                    else if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_DP) == 0){
 596                        printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (done)\n", dev->name);
 597                    }
 598                    else {
 599                        printk(KERN_DEBUG "%s: Done reprogramming Xilinx, %d bits, good luck!\n", dev->name, pos);
 600                    }
 601
 602                    lmc_gpio_mkinput(sc, 0xff);
 603                    
 604                    sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET;
 605                    lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
 606
 607                    sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET;
 608                    lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
 609                    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 610
 611                    kfree(data);
 612                    
 613                    ret = 0;
 614                    
 615                    break;
 616                }
 617            default: /*fold02*/
 618                ret = -EBADE;
 619                break;
 620            }
 621
 622            netif_wake_queue(dev);
 623            sc->lmc_txfull = 0;
 624
 625        }
 626        break;
 627    default: /*fold01*/
 628        /* If we don't know what to do, give the protocol a shot. */
 629        ret = lmc_proto_ioctl (sc, ifr, cmd);
 630        break;
 631    }
 632
 633    lmc_trace(dev, "lmc_ioctl out");
 634
 635    return ret;
 636}
 637
 638
 639/* the watchdog process that cruises around */
 640static void lmc_watchdog (unsigned long data) /*fold00*/
 641{
 642    struct net_device *dev = (struct net_device *)data;
 643    lmc_softc_t *sc = dev_to_sc(dev);
 644    int link_status;
 645    u32 ticks;
 646    unsigned long flags;
 647
 648    lmc_trace(dev, "lmc_watchdog in");
 649
 650    spin_lock_irqsave(&sc->lmc_lock, flags);
 651
 652    if(sc->check != 0xBEAFCAFE){
 653        printk("LMC: Corrupt net_device struct, breaking out\n");
 654        spin_unlock_irqrestore(&sc->lmc_lock, flags);
 655        return;
 656    }
 657
 658
 659    /* Make sure the tx jabber and rx watchdog are off,
 660     * and the transmit and receive processes are running.
 661     */
 662
 663    LMC_CSR_WRITE (sc, csr_15, 0x00000011);
 664    sc->lmc_cmdmode |= TULIP_CMD_TXRUN | TULIP_CMD_RXRUN;
 665    LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
 666
 667    if (sc->lmc_ok == 0)
 668        goto kick_timer;
 669
 670    LMC_EVENT_LOG(LMC_EVENT_WATCHDOG, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16));
 671
 672    /* --- begin time out check -----------------------------------
 673     * check for a transmit interrupt timeout
 674     * Has the packet xmt vs xmt serviced threshold been exceeded */
 675    if (sc->lmc_taint_tx == sc->lastlmc_taint_tx &&
 676        sc->lmc_device->stats.tx_packets > sc->lasttx_packets &&
 677        sc->tx_TimeoutInd == 0)
 678    {
 679
 680        /* wait for the watchdog to come around again */
 681        sc->tx_TimeoutInd = 1;
 682    }
 683    else if (sc->lmc_taint_tx == sc->lastlmc_taint_tx &&
 684             sc->lmc_device->stats.tx_packets > sc->lasttx_packets &&
 685             sc->tx_TimeoutInd)
 686    {
 687
 688        LMC_EVENT_LOG(LMC_EVENT_XMTINTTMO, LMC_CSR_READ (sc, csr_status), 0);
 689
 690        sc->tx_TimeoutDisplay = 1;
 691        sc->extra_stats.tx_TimeoutCnt++;
 692
 693        /* DEC chip is stuck, hit it with a RESET!!!! */
 694        lmc_running_reset (dev);
 695
 696
 697        /* look at receive & transmit process state to make sure they are running */
 698        LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
 699
 700        /* look at: DSR - 02  for Reg 16
 701         *                  CTS - 08
 702         *                  DCD - 10
 703         *                  RI  - 20
 704         * for Reg 17
 705         */
 706        LMC_EVENT_LOG(LMC_EVENT_RESET2, lmc_mii_readreg (sc, 0, 16), lmc_mii_readreg (sc, 0, 17));
 707
 708        /* reset the transmit timeout detection flag */
 709        sc->tx_TimeoutInd = 0;
 710        sc->lastlmc_taint_tx = sc->lmc_taint_tx;
 711        sc->lasttx_packets = sc->lmc_device->stats.tx_packets;
 712    } else {
 713        sc->tx_TimeoutInd = 0;
 714        sc->lastlmc_taint_tx = sc->lmc_taint_tx;
 715        sc->lasttx_packets = sc->lmc_device->stats.tx_packets;
 716    }
 717
 718    /* --- end time out check ----------------------------------- */
 719
 720
 721    link_status = sc->lmc_media->get_link_status (sc);
 722
 723    /*
 724     * hardware level link lost, but the interface is marked as up.
 725     * Mark it as down.
 726     */
 727    if ((link_status == 0) && (sc->last_link_status != 0)) {
 728        printk(KERN_WARNING "%s: hardware/physical link down\n", dev->name);
 729        sc->last_link_status = 0;
 730        /* lmc_reset (sc); Why reset??? The link can go down ok */
 731
 732        /* Inform the world that link has been lost */
 733        netif_carrier_off(dev);
 734    }
 735
 736    /*
 737     * hardware link is up, but the interface is marked as down.
 738     * Bring it back up again.
 739     */
 740     if (link_status != 0 && sc->last_link_status == 0) {
 741         printk(KERN_WARNING "%s: hardware/physical link up\n", dev->name);
 742         sc->last_link_status = 1;
 743         /* lmc_reset (sc); Again why reset??? */
 744
 745         netif_carrier_on(dev);
 746     }
 747
 748    /* Call media specific watchdog functions */
 749    sc->lmc_media->watchdog(sc);
 750
 751    /*
 752     * Poke the transmitter to make sure it
 753     * never stops, even if we run out of mem
 754     */
 755    LMC_CSR_WRITE(sc, csr_rxpoll, 0);
 756
 757    /*
 758     * Check for code that failed
 759     * and try and fix it as appropriate
 760     */
 761    if(sc->failed_ring == 1){
 762        /*
 763         * Failed to setup the recv/xmit rin
 764         * Try again
 765         */
 766        sc->failed_ring = 0;
 767        lmc_softreset(sc);
 768    }
 769    if(sc->failed_recv_alloc == 1){
 770        /*
 771         * We failed to alloc mem in the
 772         * interrupt handler, go through the rings
 773         * and rebuild them
 774         */
 775        sc->failed_recv_alloc = 0;
 776        lmc_softreset(sc);
 777    }
 778
 779
 780    /*
 781     * remember the timer value
 782     */
 783kick_timer:
 784
 785    ticks = LMC_CSR_READ (sc, csr_gp_timer);
 786    LMC_CSR_WRITE (sc, csr_gp_timer, 0xffffffffUL);
 787    sc->ictl.ticks = 0x0000ffff - (ticks & 0x0000ffff);
 788
 789    /*
 790     * restart this timer.
 791     */
 792    sc->timer.expires = jiffies + (HZ);
 793    add_timer (&sc->timer);
 794
 795    spin_unlock_irqrestore(&sc->lmc_lock, flags);
 796
 797    lmc_trace(dev, "lmc_watchdog out");
 798
 799}
 800
 801static int lmc_attach(struct net_device *dev, unsigned short encoding,
 802                      unsigned short parity)
 803{
 804        if (encoding == ENCODING_NRZ && parity == PARITY_CRC16_PR1_CCITT)
 805                return 0;
 806        return -EINVAL;
 807}
 808
 809static const struct net_device_ops lmc_ops = {
 810        .ndo_open       = lmc_open,
 811        .ndo_stop       = lmc_close,
 812        .ndo_change_mtu = hdlc_change_mtu,
 813        .ndo_start_xmit = hdlc_start_xmit,
 814        .ndo_do_ioctl   = lmc_ioctl,
 815        .ndo_tx_timeout = lmc_driver_timeout,
 816        .ndo_get_stats  = lmc_get_stats,
 817};
 818
 819static int lmc_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
 820{
 821        lmc_softc_t *sc;
 822        struct net_device *dev;
 823        u16 subdevice;
 824        u16 AdapModelNum;
 825        int err;
 826        static int cards_found;
 827
 828        /* lmc_trace(dev, "lmc_init_one in"); */
 829
 830        err = pci_enable_device(pdev);
 831        if (err) {
 832                printk(KERN_ERR "lmc: pci enable failed: %d\n", err);
 833                return err;
 834        }
 835
 836        err = pci_request_regions(pdev, "lmc");
 837        if (err) {
 838                printk(KERN_ERR "lmc: pci_request_region failed\n");
 839                goto err_req_io;
 840        }
 841
 842        /*
 843         * Allocate our own device structure
 844         */
 845        sc = kzalloc(sizeof(lmc_softc_t), GFP_KERNEL);
 846        if (!sc) {
 847                err = -ENOMEM;
 848                goto err_kzalloc;
 849        }
 850
 851        dev = alloc_hdlcdev(sc);
 852        if (!dev) {
 853                printk(KERN_ERR "lmc:alloc_netdev for device failed\n");
 854                goto err_hdlcdev;
 855        }
 856
 857
 858        dev->type = ARPHRD_HDLC;
 859        dev_to_hdlc(dev)->xmit = lmc_start_xmit;
 860        dev_to_hdlc(dev)->attach = lmc_attach;
 861        dev->netdev_ops = &lmc_ops;
 862        dev->watchdog_timeo = HZ; /* 1 second */
 863        dev->tx_queue_len = 100;
 864        sc->lmc_device = dev;
 865        sc->name = dev->name;
 866        sc->if_type = LMC_PPP;
 867        sc->check = 0xBEAFCAFE;
 868        dev->base_addr = pci_resource_start(pdev, 0);
 869        dev->irq = pdev->irq;
 870        pci_set_drvdata(pdev, dev);
 871        SET_NETDEV_DEV(dev, &pdev->dev);
 872
 873        /*
 874         * This will get the protocol layer ready and do any 1 time init's
 875         * Must have a valid sc and dev structure
 876         */
 877        lmc_proto_attach(sc);
 878
 879        /* Init the spin lock so can call it latter */
 880
 881        spin_lock_init(&sc->lmc_lock);
 882        pci_set_master(pdev);
 883
 884        printk(KERN_INFO "%s: detected at %lx, irq %d\n", dev->name,
 885               dev->base_addr, dev->irq);
 886
 887        err = register_hdlc_device(dev);
 888        if (err) {
 889                printk(KERN_ERR "%s: register_netdev failed.\n", dev->name);
 890                free_netdev(dev);
 891                goto err_hdlcdev;
 892        }
 893
 894    sc->lmc_cardtype = LMC_CARDTYPE_UNKNOWN;
 895    sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
 896
 897    /*
 898     *
 899     * Check either the subvendor or the subdevice, some systems reverse
 900     * the setting in the bois, seems to be version and arch dependent?
 901     * Fix the error, exchange the two values 
 902     */
 903    if ((subdevice = pdev->subsystem_device) == PCI_VENDOR_ID_LMC)
 904            subdevice = pdev->subsystem_vendor;
 905
 906    switch (subdevice) {
 907    case PCI_DEVICE_ID_LMC_HSSI:
 908        printk(KERN_INFO "%s: LMC HSSI\n", dev->name);
 909        sc->lmc_cardtype = LMC_CARDTYPE_HSSI;
 910        sc->lmc_media = &lmc_hssi_media;
 911        break;
 912    case PCI_DEVICE_ID_LMC_DS3:
 913        printk(KERN_INFO "%s: LMC DS3\n", dev->name);
 914        sc->lmc_cardtype = LMC_CARDTYPE_DS3;
 915        sc->lmc_media = &lmc_ds3_media;
 916        break;
 917    case PCI_DEVICE_ID_LMC_SSI:
 918        printk(KERN_INFO "%s: LMC SSI\n", dev->name);
 919        sc->lmc_cardtype = LMC_CARDTYPE_SSI;
 920        sc->lmc_media = &lmc_ssi_media;
 921        break;
 922    case PCI_DEVICE_ID_LMC_T1:
 923        printk(KERN_INFO "%s: LMC T1\n", dev->name);
 924        sc->lmc_cardtype = LMC_CARDTYPE_T1;
 925        sc->lmc_media = &lmc_t1_media;
 926        break;
 927    default:
 928        printk(KERN_WARNING "%s: LMC UNKNOWN CARD!\n", dev->name);
 929        break;
 930    }
 931
 932    lmc_initcsrs (sc, dev->base_addr, 8);
 933
 934    lmc_gpio_mkinput (sc, 0xff);
 935    sc->lmc_gpio = 0;           /* drive no signals yet */
 936
 937    sc->lmc_media->defaults (sc);
 938
 939    sc->lmc_media->set_link_status (sc, LMC_LINK_UP);
 940
 941    /* verify that the PCI Sub System ID matches the Adapter Model number
 942     * from the MII register
 943     */
 944    AdapModelNum = (lmc_mii_readreg (sc, 0, 3) & 0x3f0) >> 4;
 945
 946    if ((AdapModelNum != LMC_ADAP_T1 || /* detect LMC1200 */
 947         subdevice != PCI_DEVICE_ID_LMC_T1) &&
 948        (AdapModelNum != LMC_ADAP_SSI || /* detect LMC1000 */
 949         subdevice != PCI_DEVICE_ID_LMC_SSI) &&
 950        (AdapModelNum != LMC_ADAP_DS3 || /* detect LMC5245 */
 951         subdevice != PCI_DEVICE_ID_LMC_DS3) &&
 952        (AdapModelNum != LMC_ADAP_HSSI || /* detect LMC5200 */
 953         subdevice != PCI_DEVICE_ID_LMC_HSSI))
 954            printk(KERN_WARNING "%s: Model number (%d) miscompare for PCI"
 955                   " Subsystem ID = 0x%04x\n",
 956                   dev->name, AdapModelNum, subdevice);
 957
 958    /*
 959     * reset clock
 960     */
 961    LMC_CSR_WRITE (sc, csr_gp_timer, 0xFFFFFFFFUL);
 962
 963    sc->board_idx = cards_found++;
 964    sc->extra_stats.check = STATCHECK;
 965    sc->extra_stats.version_size = (DRIVER_VERSION << 16) +
 966            sizeof(sc->lmc_device->stats) + sizeof(sc->extra_stats);
 967    sc->extra_stats.lmc_cardtype = sc->lmc_cardtype;
 968
 969    sc->lmc_ok = 0;
 970    sc->last_link_status = 0;
 971
 972    lmc_trace(dev, "lmc_init_one out");
 973    return 0;
 974
 975err_hdlcdev:
 976        pci_set_drvdata(pdev, NULL);
 977        kfree(sc);
 978err_kzalloc:
 979        pci_release_regions(pdev);
 980err_req_io:
 981        pci_disable_device(pdev);
 982        return err;
 983}
 984
 985/*
 986 * Called from pci when removing module.
 987 */
 988static void lmc_remove_one(struct pci_dev *pdev)
 989{
 990        struct net_device *dev = pci_get_drvdata(pdev);
 991
 992        if (dev) {
 993                printk(KERN_DEBUG "%s: removing...\n", dev->name);
 994                unregister_hdlc_device(dev);
 995                free_netdev(dev);
 996                pci_release_regions(pdev);
 997                pci_disable_device(pdev);
 998                pci_set_drvdata(pdev, NULL);
 999        }
1000}
1001
1002/* After this is called, packets can be sent.
1003 * Does not initialize the addresses
1004 */
1005static int lmc_open(struct net_device *dev)
1006{
1007    lmc_softc_t *sc = dev_to_sc(dev);
1008    int err;
1009
1010    lmc_trace(dev, "lmc_open in");
1011
1012    lmc_led_on(sc, LMC_DS3_LED0);
1013
1014    lmc_dec_reset(sc);
1015    lmc_reset(sc);
1016
1017    LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ(sc, csr_status), 0);
1018    LMC_EVENT_LOG(LMC_EVENT_RESET2, lmc_mii_readreg(sc, 0, 16),
1019                  lmc_mii_readreg(sc, 0, 17));
1020
1021    if (sc->lmc_ok){
1022        lmc_trace(dev, "lmc_open lmc_ok out");
1023        return 0;
1024    }
1025
1026    lmc_softreset (sc);
1027
1028    /* Since we have to use PCI bus, this should work on x86,alpha,ppc */
1029    if (request_irq (dev->irq, lmc_interrupt, IRQF_SHARED, dev->name, dev)){
1030        printk(KERN_WARNING "%s: could not get irq: %d\n", dev->name, dev->irq);
1031        lmc_trace(dev, "lmc_open irq failed out");
1032        return -EAGAIN;
1033    }
1034    sc->got_irq = 1;
1035
1036    /* Assert Terminal Active */
1037    sc->lmc_miireg16 |= LMC_MII16_LED_ALL;
1038    sc->lmc_media->set_link_status (sc, LMC_LINK_UP);
1039
1040    /*
1041     * reset to last state.
1042     */
1043    sc->lmc_media->set_status (sc, NULL);
1044
1045    /* setup default bits to be used in tulip_desc_t transmit descriptor
1046     * -baz */
1047    sc->TxDescriptControlInit = (
1048                                 LMC_TDES_INTERRUPT_ON_COMPLETION
1049                                 | LMC_TDES_FIRST_SEGMENT
1050                                 | LMC_TDES_LAST_SEGMENT
1051                                 | LMC_TDES_SECOND_ADDR_CHAINED
1052                                 | LMC_TDES_DISABLE_PADDING
1053                                );
1054
1055    if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16) {
1056        /* disable 32 bit CRC generated by ASIC */
1057        sc->TxDescriptControlInit |= LMC_TDES_ADD_CRC_DISABLE;
1058    }
1059    sc->lmc_media->set_crc_length(sc, sc->ictl.crc_length);
1060    /* Acknoledge the Terminal Active and light LEDs */
1061
1062    /* dev->flags |= IFF_UP; */
1063
1064    if ((err = lmc_proto_open(sc)) != 0)
1065            return err;
1066
1067    netif_start_queue(dev);
1068    sc->extra_stats.tx_tbusy0++;
1069
1070    /*
1071     * select what interrupts we want to get
1072     */
1073    sc->lmc_intrmask = 0;
1074    /* Should be using the default interrupt mask defined in the .h file. */
1075    sc->lmc_intrmask |= (TULIP_STS_NORMALINTR
1076                         | TULIP_STS_RXINTR
1077                         | TULIP_STS_TXINTR
1078                         | TULIP_STS_ABNRMLINTR
1079                         | TULIP_STS_SYSERROR
1080                         | TULIP_STS_TXSTOPPED
1081                         | TULIP_STS_TXUNDERFLOW
1082                         | TULIP_STS_RXSTOPPED
1083                         | TULIP_STS_RXNOBUF
1084                        );
1085    LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask);
1086
1087    sc->lmc_cmdmode |= TULIP_CMD_TXRUN;
1088    sc->lmc_cmdmode |= TULIP_CMD_RXRUN;
1089    LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
1090
1091    sc->lmc_ok = 1; /* Run watchdog */
1092
1093    /*
1094     * Set the if up now - pfb
1095     */
1096
1097    sc->last_link_status = 1;
1098
1099    /*
1100     * Setup a timer for the watchdog on probe, and start it running.
1101     * Since lmc_ok == 0, it will be a NOP for now.
1102     */
1103    init_timer (&sc->timer);
1104    sc->timer.expires = jiffies + HZ;
1105    sc->timer.data = (unsigned long) dev;
1106    sc->timer.function = lmc_watchdog;
1107    add_timer (&sc->timer);
1108
1109    lmc_trace(dev, "lmc_open out");
1110
1111    return 0;
1112}
1113
1114/* Total reset to compensate for the AdTran DSU doing bad things
1115 *  under heavy load
1116 */
1117
1118static void lmc_running_reset (struct net_device *dev) /*fold00*/
1119{
1120    lmc_softc_t *sc = dev_to_sc(dev);
1121
1122    lmc_trace(dev, "lmc_running_reset in");
1123
1124    /* stop interrupts */
1125    /* Clear the interrupt mask */
1126    LMC_CSR_WRITE (sc, csr_intr, 0x00000000);
1127
1128    lmc_dec_reset (sc);
1129    lmc_reset (sc);
1130    lmc_softreset (sc);
1131    /* sc->lmc_miireg16 |= LMC_MII16_LED_ALL; */
1132    sc->lmc_media->set_link_status (sc, 1);
1133    sc->lmc_media->set_status (sc, NULL);
1134
1135    netif_wake_queue(dev);
1136
1137    sc->lmc_txfull = 0;
1138    sc->extra_stats.tx_tbusy0++;
1139
1140    sc->lmc_intrmask = TULIP_DEFAULT_INTR_MASK;
1141    LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask);
1142
1143    sc->lmc_cmdmode |= (TULIP_CMD_TXRUN | TULIP_CMD_RXRUN);
1144    LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
1145
1146    lmc_trace(dev, "lmc_runnin_reset_out");
1147}
1148
1149
1150/* This is what is called when you ifconfig down a device.
1151 * This disables the timer for the watchdog and keepalives,
1152 * and disables the irq for dev.
1153 */
1154static int lmc_close(struct net_device *dev)
1155{
1156    /* not calling release_region() as we should */
1157    lmc_softc_t *sc = dev_to_sc(dev);
1158
1159    lmc_trace(dev, "lmc_close in");
1160
1161    sc->lmc_ok = 0;
1162    sc->lmc_media->set_link_status (sc, 0);
1163    del_timer (&sc->timer);
1164    lmc_proto_close(sc);
1165    lmc_ifdown (dev);
1166
1167    lmc_trace(dev, "lmc_close out");
1168
1169    return 0;
1170}
1171
1172/* Ends the transfer of packets */
1173/* When the interface goes down, this is called */
1174static int lmc_ifdown (struct net_device *dev) /*fold00*/
1175{
1176    lmc_softc_t *sc = dev_to_sc(dev);
1177    u32 csr6;
1178    int i;
1179
1180    lmc_trace(dev, "lmc_ifdown in");
1181
1182    /* Don't let anything else go on right now */
1183    //    dev->start = 0;
1184    netif_stop_queue(dev);
1185    sc->extra_stats.tx_tbusy1++;
1186
1187    /* stop interrupts */
1188    /* Clear the interrupt mask */
1189    LMC_CSR_WRITE (sc, csr_intr, 0x00000000);
1190
1191    /* Stop Tx and Rx on the chip */
1192    csr6 = LMC_CSR_READ (sc, csr_command);
1193    csr6 &= ~LMC_DEC_ST;                /* Turn off the Transmission bit */
1194    csr6 &= ~LMC_DEC_SR;                /* Turn off the Receive bit */
1195    LMC_CSR_WRITE (sc, csr_command, csr6);
1196
1197    sc->lmc_device->stats.rx_missed_errors +=
1198            LMC_CSR_READ(sc, csr_missed_frames) & 0xffff;
1199
1200    /* release the interrupt */
1201    if(sc->got_irq == 1){
1202        free_irq (dev->irq, dev);
1203        sc->got_irq = 0;
1204    }
1205
1206    /* free skbuffs in the Rx queue */
1207    for (i = 0; i < LMC_RXDESCS; i++)
1208    {
1209        struct sk_buff *skb = sc->lmc_rxq[i];
1210        sc->lmc_rxq[i] = NULL;
1211        sc->lmc_rxring[i].status = 0;
1212        sc->lmc_rxring[i].length = 0;
1213        sc->lmc_rxring[i].buffer1 = 0xDEADBEEF;
1214        if (skb != NULL)
1215            dev_kfree_skb(skb);
1216        sc->lmc_rxq[i] = NULL;
1217    }
1218
1219    for (i = 0; i < LMC_TXDESCS; i++)
1220    {
1221        if (sc->lmc_txq[i] != NULL)
1222            dev_kfree_skb(sc->lmc_txq[i]);
1223        sc->lmc_txq[i] = NULL;
1224    }
1225
1226    lmc_led_off (sc, LMC_MII16_LED_ALL);
1227
1228    netif_wake_queue(dev);
1229    sc->extra_stats.tx_tbusy0++;
1230
1231    lmc_trace(dev, "lmc_ifdown out");
1232
1233    return 0;
1234}
1235
1236/* Interrupt handling routine.  This will take an incoming packet, or clean
1237 * up after a trasmit.
1238 */
1239static irqreturn_t lmc_interrupt (int irq, void *dev_instance) /*fold00*/
1240{
1241    struct net_device *dev = (struct net_device *) dev_instance;
1242    lmc_softc_t *sc = dev_to_sc(dev);
1243    u32 csr;
1244    int i;
1245    s32 stat;
1246    unsigned int badtx;
1247    u32 firstcsr;
1248    int max_work = LMC_RXDESCS;
1249    int handled = 0;
1250
1251    lmc_trace(dev, "lmc_interrupt in");
1252
1253    spin_lock(&sc->lmc_lock);
1254
1255    /*
1256     * Read the csr to find what interrupts we have (if any)
1257     */
1258    csr = LMC_CSR_READ (sc, csr_status);
1259
1260    /*
1261     * Make sure this is our interrupt
1262     */
1263    if ( ! (csr & sc->lmc_intrmask)) {
1264        goto lmc_int_fail_out;
1265    }
1266
1267    firstcsr = csr;
1268
1269    /* always go through this loop at least once */
1270    while (csr & sc->lmc_intrmask) {
1271        handled = 1;
1272
1273        /*
1274         * Clear interrupt bits, we handle all case below
1275         */
1276        LMC_CSR_WRITE (sc, csr_status, csr);
1277
1278        /*
1279         * One of
1280         *  - Transmit process timed out CSR5<1>
1281         *  - Transmit jabber timeout    CSR5<3>
1282         *  - Transmit underflow         CSR5<5>
1283         *  - Transmit Receiver buffer unavailable CSR5<7>
1284         *  - Receive process stopped    CSR5<8>
1285         *  - Receive watchdog timeout   CSR5<9>
1286         *  - Early transmit interrupt   CSR5<10>
1287         *
1288         * Is this really right? Should we do a running reset for jabber?
1289         * (being a WAN card and all)
1290         */
1291        if (csr & TULIP_STS_ABNRMLINTR){
1292            lmc_running_reset (dev);
1293            break;
1294        }
1295        
1296        if (csr & TULIP_STS_RXINTR){
1297            lmc_trace(dev, "rx interrupt");
1298            lmc_rx (dev);
1299            
1300        }
1301        if (csr & (TULIP_STS_TXINTR | TULIP_STS_TXNOBUF | TULIP_STS_TXSTOPPED)) {
1302
1303            int         n_compl = 0 ;
1304            /* reset the transmit timeout detection flag -baz */
1305            sc->extra_stats.tx_NoCompleteCnt = 0;
1306
1307            badtx = sc->lmc_taint_tx;
1308            i = badtx % LMC_TXDESCS;
1309
1310            while ((badtx < sc->lmc_next_tx)) {
1311                stat = sc->lmc_txring[i].status;
1312
1313                LMC_EVENT_LOG (LMC_EVENT_XMTINT, stat,
1314                                                 sc->lmc_txring[i].length);
1315                /*
1316                 * If bit 31 is 1 the tulip owns it break out of the loop
1317                 */
1318                if (stat & 0x80000000)
1319                    break;
1320
1321                n_compl++ ;             /* i.e., have an empty slot in ring */
1322                /*
1323                 * If we have no skbuff or have cleared it
1324                 * Already continue to the next buffer
1325                 */
1326                if (sc->lmc_txq[i] == NULL)
1327                    continue;
1328
1329                /*
1330                 * Check the total error summary to look for any errors
1331                 */
1332                if (stat & 0x8000) {
1333                        sc->lmc_device->stats.tx_errors++;
1334                        if (stat & 0x4104)
1335                                sc->lmc_device->stats.tx_aborted_errors++;
1336                        if (stat & 0x0C00)
1337                                sc->lmc_device->stats.tx_carrier_errors++;
1338                        if (stat & 0x0200)
1339                                sc->lmc_device->stats.tx_window_errors++;
1340                        if (stat & 0x0002)
1341                                sc->lmc_device->stats.tx_fifo_errors++;
1342                } else {
1343                        sc->lmc_device->stats.tx_bytes += sc->lmc_txring[i].length & 0x7ff;
1344
1345                        sc->lmc_device->stats.tx_packets++;
1346                }
1347
1348                //                dev_kfree_skb(sc->lmc_txq[i]);
1349                dev_kfree_skb_irq(sc->lmc_txq[i]);
1350                sc->lmc_txq[i] = NULL;
1351
1352                badtx++;
1353                i = badtx % LMC_TXDESCS;
1354            }
1355
1356            if (sc->lmc_next_tx - badtx > LMC_TXDESCS)
1357            {
1358                printk ("%s: out of sync pointer\n", dev->name);
1359                badtx += LMC_TXDESCS;
1360            }
1361            LMC_EVENT_LOG(LMC_EVENT_TBUSY0, n_compl, 0);
1362            sc->lmc_txfull = 0;
1363            netif_wake_queue(dev);
1364            sc->extra_stats.tx_tbusy0++;
1365
1366
1367#ifdef DEBUG
1368            sc->extra_stats.dirtyTx = badtx;
1369            sc->extra_stats.lmc_next_tx = sc->lmc_next_tx;
1370            sc->extra_stats.lmc_txfull = sc->lmc_txfull;
1371#endif
1372            sc->lmc_taint_tx = badtx;
1373
1374            /*
1375             * Why was there a break here???
1376             */
1377        }                       /* end handle transmit interrupt */
1378
1379        if (csr & TULIP_STS_SYSERROR) {
1380            u32 error;
1381            printk (KERN_WARNING "%s: system bus error csr: %#8.8x\n", dev->name, csr);
1382            error = csr>>23 & 0x7;
1383            switch(error){
1384            case 0x000:
1385                printk(KERN_WARNING "%s: Parity Fault (bad)\n", dev->name);
1386                break;
1387            case 0x001:
1388                printk(KERN_WARNING "%s: Master Abort (naughty)\n", dev->name);
1389                break;
1390            case 0x010:
1391                printk(KERN_WARNING "%s: Target Abort (not so naughty)\n", dev->name);
1392                break;
1393            default:
1394                printk(KERN_WARNING "%s: This bus error code was supposed to be reserved!\n", dev->name);
1395            }
1396            lmc_dec_reset (sc);
1397            lmc_reset (sc);
1398            LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
1399            LMC_EVENT_LOG(LMC_EVENT_RESET2,
1400                          lmc_mii_readreg (sc, 0, 16),
1401                          lmc_mii_readreg (sc, 0, 17));
1402
1403        }
1404
1405        
1406        if(max_work-- <= 0)
1407            break;
1408        
1409        /*
1410         * Get current csr status to make sure
1411         * we've cleared all interrupts
1412         */
1413        csr = LMC_CSR_READ (sc, csr_status);
1414    }                           /* end interrupt loop */
1415    LMC_EVENT_LOG(LMC_EVENT_INT, firstcsr, csr);
1416
1417lmc_int_fail_out:
1418
1419    spin_unlock(&sc->lmc_lock);
1420
1421    lmc_trace(dev, "lmc_interrupt out");
1422    return IRQ_RETVAL(handled);
1423}
1424
1425static netdev_tx_t lmc_start_xmit(struct sk_buff *skb,
1426                                        struct net_device *dev)
1427{
1428    lmc_softc_t *sc = dev_to_sc(dev);
1429    u32 flag;
1430    int entry;
1431    unsigned long flags;
1432
1433    lmc_trace(dev, "lmc_start_xmit in");
1434
1435    spin_lock_irqsave(&sc->lmc_lock, flags);
1436
1437    /* normal path, tbusy known to be zero */
1438
1439    entry = sc->lmc_next_tx % LMC_TXDESCS;
1440
1441    sc->lmc_txq[entry] = skb;
1442    sc->lmc_txring[entry].buffer1 = virt_to_bus (skb->data);
1443
1444    LMC_CONSOLE_LOG("xmit", skb->data, skb->len);
1445
1446#ifndef GCOM
1447    /* If the queue is less than half full, don't interrupt */
1448    if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS / 2)
1449    {
1450        /* Do not interrupt on completion of this packet */
1451        flag = 0x60000000;
1452        netif_wake_queue(dev);
1453    }
1454    else if (sc->lmc_next_tx - sc->lmc_taint_tx == LMC_TXDESCS / 2)
1455    {
1456        /* This generates an interrupt on completion of this packet */
1457        flag = 0xe0000000;
1458        netif_wake_queue(dev);
1459    }
1460    else if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS - 1)
1461    {
1462        /* Do not interrupt on completion of this packet */
1463        flag = 0x60000000;
1464        netif_wake_queue(dev);
1465    }
1466    else
1467    {
1468        /* This generates an interrupt on completion of this packet */
1469        flag = 0xe0000000;
1470        sc->lmc_txfull = 1;
1471        netif_stop_queue(dev);
1472    }
1473#else
1474    flag = LMC_TDES_INTERRUPT_ON_COMPLETION;
1475
1476    if (sc->lmc_next_tx - sc->lmc_taint_tx >= LMC_TXDESCS - 1)
1477    {                           /* ring full, go busy */
1478        sc->lmc_txfull = 1;
1479        netif_stop_queue(dev);
1480        sc->extra_stats.tx_tbusy1++;
1481        LMC_EVENT_LOG(LMC_EVENT_TBUSY1, entry, 0);
1482    }
1483#endif
1484
1485
1486    if (entry == LMC_TXDESCS - 1)       /* last descriptor in ring */
1487        flag |= LMC_TDES_END_OF_RING;   /* flag as such for Tulip */
1488
1489    /* don't pad small packets either */
1490    flag = sc->lmc_txring[entry].length = (skb->len) | flag |
1491                                                sc->TxDescriptControlInit;
1492
1493    /* set the transmit timeout flag to be checked in
1494     * the watchdog timer handler. -baz
1495     */
1496
1497    sc->extra_stats.tx_NoCompleteCnt++;
1498    sc->lmc_next_tx++;
1499
1500    /* give ownership to the chip */
1501    LMC_EVENT_LOG(LMC_EVENT_XMT, flag, entry);
1502    sc->lmc_txring[entry].status = 0x80000000;
1503
1504    /* send now! */
1505    LMC_CSR_WRITE (sc, csr_txpoll, 0);
1506
1507    spin_unlock_irqrestore(&sc->lmc_lock, flags);
1508
1509    lmc_trace(dev, "lmc_start_xmit_out");
1510    return NETDEV_TX_OK;
1511}
1512
1513
1514static int lmc_rx(struct net_device *dev)
1515{
1516    lmc_softc_t *sc = dev_to_sc(dev);
1517    int i;
1518    int rx_work_limit = LMC_RXDESCS;
1519    unsigned int next_rx;
1520    int rxIntLoopCnt;           /* debug -baz */
1521    int localLengthErrCnt = 0;
1522    long stat;
1523    struct sk_buff *skb, *nsb;
1524    u16 len;
1525
1526    lmc_trace(dev, "lmc_rx in");
1527
1528    lmc_led_on(sc, LMC_DS3_LED3);
1529
1530    rxIntLoopCnt = 0;           /* debug -baz */
1531
1532    i = sc->lmc_next_rx % LMC_RXDESCS;
1533    next_rx = sc->lmc_next_rx;
1534
1535    while (((stat = sc->lmc_rxring[i].status) & LMC_RDES_OWN_BIT) != DESC_OWNED_BY_DC21X4)
1536    {
1537        rxIntLoopCnt++;         /* debug -baz */
1538        len = ((stat & LMC_RDES_FRAME_LENGTH) >> RDES_FRAME_LENGTH_BIT_NUMBER);
1539        if ((stat & 0x0300) != 0x0300) {  /* Check first segment and last segment */
1540                if ((stat & 0x0000ffff) != 0x7fff) {
1541                        /* Oversized frame */
1542                        sc->lmc_device->stats.rx_length_errors++;
1543                        goto skip_packet;
1544                }
1545        }
1546
1547        if (stat & 0x00000008) { /* Catch a dribbling bit error */
1548                sc->lmc_device->stats.rx_errors++;
1549                sc->lmc_device->stats.rx_frame_errors++;
1550                goto skip_packet;
1551        }
1552
1553
1554        if (stat & 0x00000004) { /* Catch a CRC error by the Xilinx */
1555                sc->lmc_device->stats.rx_errors++;
1556                sc->lmc_device->stats.rx_crc_errors++;
1557                goto skip_packet;
1558        }
1559
1560        if (len > LMC_PKT_BUF_SZ) {
1561                sc->lmc_device->stats.rx_length_errors++;
1562                localLengthErrCnt++;
1563                goto skip_packet;
1564        }
1565
1566        if (len < sc->lmc_crcSize + 2) {
1567                sc->lmc_device->stats.rx_length_errors++;
1568                sc->extra_stats.rx_SmallPktCnt++;
1569                localLengthErrCnt++;
1570                goto skip_packet;
1571        }
1572
1573        if(stat & 0x00004000){
1574            printk(KERN_WARNING "%s: Receiver descriptor error, receiver out of sync?\n", dev->name);
1575        }
1576
1577        len -= sc->lmc_crcSize;
1578
1579        skb = sc->lmc_rxq[i];
1580
1581        /*
1582         * We ran out of memory at some point
1583         * just allocate an skb buff and continue.
1584         */
1585        
1586        if (!skb) {
1587            nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
1588            if (nsb) {
1589                sc->lmc_rxq[i] = nsb;
1590                nsb->dev = dev;
1591                sc->lmc_rxring[i].buffer1 = virt_to_bus(skb_tail_pointer(nsb));
1592            }
1593            sc->failed_recv_alloc = 1;
1594            goto skip_packet;
1595        }
1596        
1597        sc->lmc_device->stats.rx_packets++;
1598        sc->lmc_device->stats.rx_bytes += len;
1599
1600        LMC_CONSOLE_LOG("recv", skb->data, len);
1601
1602        /*
1603         * I'm not sure of the sanity of this
1604         * Packets could be arriving at a constant
1605         * 44.210mbits/sec and we're going to copy
1606         * them into a new buffer??
1607         */
1608        
1609        if(len > (LMC_MTU - (LMC_MTU>>2))){ /* len > LMC_MTU * 0.75 */
1610            /*
1611             * If it's a large packet don't copy it just hand it up
1612             */
1613        give_it_anyways:
1614
1615            sc->lmc_rxq[i] = NULL;
1616            sc->lmc_rxring[i].buffer1 = 0x0;
1617
1618            skb_put (skb, len);
1619            skb->protocol = lmc_proto_type(sc, skb);
1620            skb_reset_mac_header(skb);
1621            /* skb_reset_network_header(skb); */
1622            skb->dev = dev;
1623            lmc_proto_netif(sc, skb);
1624
1625            /*
1626             * This skb will be destroyed by the upper layers, make a new one
1627             */
1628            nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
1629            if (nsb) {
1630                sc->lmc_rxq[i] = nsb;
1631                nsb->dev = dev;
1632                sc->lmc_rxring[i].buffer1 = virt_to_bus(skb_tail_pointer(nsb));
1633                /* Transferred to 21140 below */
1634            }
1635            else {
1636                /*
1637                 * We've run out of memory, stop trying to allocate
1638                 * memory and exit the interrupt handler
1639                 *
1640                 * The chip may run out of receivers and stop
1641                 * in which care we'll try to allocate the buffer
1642                 * again.  (once a second)
1643                 */
1644                sc->extra_stats.rx_BuffAllocErr++;
1645                LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len);
1646                sc->failed_recv_alloc = 1;
1647                goto skip_out_of_mem;
1648            }
1649        }
1650        else {
1651            nsb = dev_alloc_skb(len);
1652            if(!nsb) {
1653                goto give_it_anyways;
1654            }
1655            skb_copy_from_linear_data(skb, skb_put(nsb, len), len);
1656            
1657            nsb->protocol = lmc_proto_type(sc, nsb);
1658            skb_reset_mac_header(nsb);
1659            /* skb_reset_network_header(nsb); */
1660            nsb->dev = dev;
1661            lmc_proto_netif(sc, nsb);
1662        }
1663
1664    skip_packet:
1665        LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len);
1666        sc->lmc_rxring[i].status = DESC_OWNED_BY_DC21X4;
1667
1668        sc->lmc_next_rx++;
1669        i = sc->lmc_next_rx % LMC_RXDESCS;
1670        rx_work_limit--;
1671        if (rx_work_limit < 0)
1672            break;
1673    }
1674
1675    /* detect condition for LMC1000 where DSU cable attaches and fills
1676     * descriptors with bogus packets
1677     *
1678    if (localLengthErrCnt > LMC_RXDESCS - 3) {
1679        sc->extra_stats.rx_BadPktSurgeCnt++;
1680        LMC_EVENT_LOG(LMC_EVENT_BADPKTSURGE, localLengthErrCnt,
1681                      sc->extra_stats.rx_BadPktSurgeCnt);
1682    } */
1683
1684    /* save max count of receive descriptors serviced */
1685    if (rxIntLoopCnt > sc->extra_stats.rxIntLoopCnt)
1686            sc->extra_stats.rxIntLoopCnt = rxIntLoopCnt; /* debug -baz */
1687
1688#ifdef DEBUG
1689    if (rxIntLoopCnt == 0)
1690    {
1691        for (i = 0; i < LMC_RXDESCS; i++)
1692        {
1693            if ((sc->lmc_rxring[i].status & LMC_RDES_OWN_BIT)
1694                != DESC_OWNED_BY_DC21X4)
1695            {
1696                rxIntLoopCnt++;
1697            }
1698        }
1699        LMC_EVENT_LOG(LMC_EVENT_RCVEND, rxIntLoopCnt, 0);
1700    }
1701#endif
1702
1703
1704    lmc_led_off(sc, LMC_DS3_LED3);
1705
1706skip_out_of_mem:
1707
1708    lmc_trace(dev, "lmc_rx out");
1709
1710    return 0;
1711}
1712
1713static struct net_device_stats *lmc_get_stats(struct net_device *dev)
1714{
1715    lmc_softc_t *sc = dev_to_sc(dev);
1716    unsigned long flags;
1717
1718    lmc_trace(dev, "lmc_get_stats in");
1719
1720    spin_lock_irqsave(&sc->lmc_lock, flags);
1721
1722    sc->lmc_device->stats.rx_missed_errors += LMC_CSR_READ(sc, csr_missed_frames) & 0xffff;
1723
1724    spin_unlock_irqrestore(&sc->lmc_lock, flags);
1725
1726    lmc_trace(dev, "lmc_get_stats out");
1727
1728    return &sc->lmc_device->stats;
1729}
1730
1731static struct pci_driver lmc_driver = {
1732        .name           = "lmc",
1733        .id_table       = lmc_pci_tbl,
1734        .probe          = lmc_init_one,
1735        .remove         = lmc_remove_one,
1736};
1737
1738module_pci_driver(lmc_driver);
1739
1740unsigned lmc_mii_readreg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno) /*fold00*/
1741{
1742    int i;
1743    int command = (0xf6 << 10) | (devaddr << 5) | regno;
1744    int retval = 0;
1745
1746    lmc_trace(sc->lmc_device, "lmc_mii_readreg in");
1747
1748    LMC_MII_SYNC (sc);
1749
1750    lmc_trace(sc->lmc_device, "lmc_mii_readreg: done sync");
1751
1752    for (i = 15; i >= 0; i--)
1753    {
1754        int dataval = (command & (1 << i)) ? 0x20000 : 0;
1755
1756        LMC_CSR_WRITE (sc, csr_9, dataval);
1757        lmc_delay ();
1758        /* __SLOW_DOWN_IO; */
1759        LMC_CSR_WRITE (sc, csr_9, dataval | 0x10000);
1760        lmc_delay ();
1761        /* __SLOW_DOWN_IO; */
1762    }
1763
1764    lmc_trace(sc->lmc_device, "lmc_mii_readreg: done1");
1765
1766    for (i = 19; i > 0; i--)
1767    {
1768        LMC_CSR_WRITE (sc, csr_9, 0x40000);
1769        lmc_delay ();
1770        /* __SLOW_DOWN_IO; */
1771        retval = (retval << 1) | ((LMC_CSR_READ (sc, csr_9) & 0x80000) ? 1 : 0);
1772        LMC_CSR_WRITE (sc, csr_9, 0x40000 | 0x10000);
1773        lmc_delay ();
1774        /* __SLOW_DOWN_IO; */
1775    }
1776
1777    lmc_trace(sc->lmc_device, "lmc_mii_readreg out");
1778
1779    return (retval >> 1) & 0xffff;
1780}
1781
1782void lmc_mii_writereg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno, unsigned data) /*fold00*/
1783{
1784    int i = 32;
1785    int command = (0x5002 << 16) | (devaddr << 23) | (regno << 18) | data;
1786
1787    lmc_trace(sc->lmc_device, "lmc_mii_writereg in");
1788
1789    LMC_MII_SYNC (sc);
1790
1791    i = 31;
1792    while (i >= 0)
1793    {
1794        int datav;
1795
1796        if (command & (1 << i))
1797            datav = 0x20000;
1798        else
1799            datav = 0x00000;
1800
1801        LMC_CSR_WRITE (sc, csr_9, datav);
1802        lmc_delay ();
1803        /* __SLOW_DOWN_IO; */
1804        LMC_CSR_WRITE (sc, csr_9, (datav | 0x10000));
1805        lmc_delay ();
1806        /* __SLOW_DOWN_IO; */
1807        i--;
1808    }
1809
1810    i = 2;
1811    while (i > 0)
1812    {
1813        LMC_CSR_WRITE (sc, csr_9, 0x40000);
1814        lmc_delay ();
1815        /* __SLOW_DOWN_IO; */
1816        LMC_CSR_WRITE (sc, csr_9, 0x50000);
1817        lmc_delay ();
1818        /* __SLOW_DOWN_IO; */
1819        i--;
1820    }
1821
1822    lmc_trace(sc->lmc_device, "lmc_mii_writereg out");
1823}
1824
1825static void lmc_softreset (lmc_softc_t * const sc) /*fold00*/
1826{
1827    int i;
1828
1829    lmc_trace(sc->lmc_device, "lmc_softreset in");
1830
1831    /* Initialize the receive rings and buffers. */
1832    sc->lmc_txfull = 0;
1833    sc->lmc_next_rx = 0;
1834    sc->lmc_next_tx = 0;
1835    sc->lmc_taint_rx = 0;
1836    sc->lmc_taint_tx = 0;
1837
1838    /*
1839     * Setup each one of the receiver buffers
1840     * allocate an skbuff for each one, setup the descriptor table
1841     * and point each buffer at the next one
1842     */
1843
1844    for (i = 0; i < LMC_RXDESCS; i++)
1845    {
1846        struct sk_buff *skb;
1847
1848        if (sc->lmc_rxq[i] == NULL)
1849        {
1850            skb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
1851            if(skb == NULL){
1852                printk(KERN_WARNING "%s: Failed to allocate receiver ring, will try again\n", sc->name);
1853                sc->failed_ring = 1;
1854                break;
1855            }
1856            else{
1857                sc->lmc_rxq[i] = skb;
1858            }
1859        }
1860        else
1861        {
1862            skb = sc->lmc_rxq[i];
1863        }
1864
1865        skb->dev = sc->lmc_device;
1866
1867        /* owned by 21140 */
1868        sc->lmc_rxring[i].status = 0x80000000;
1869
1870        /* used to be PKT_BUF_SZ now uses skb since we lose some to head room */
1871        sc->lmc_rxring[i].length = skb_tailroom(skb);
1872
1873        /* use to be tail which is dumb since you're thinking why write
1874         * to the end of the packj,et but since there's nothing there tail == data
1875         */
1876        sc->lmc_rxring[i].buffer1 = virt_to_bus (skb->data);
1877
1878        /* This is fair since the structure is static and we have the next address */
1879        sc->lmc_rxring[i].buffer2 = virt_to_bus (&sc->lmc_rxring[i + 1]);
1880
1881    }
1882
1883    /*
1884     * Sets end of ring
1885     */
1886    if (i != 0) {
1887        sc->lmc_rxring[i - 1].length |= 0x02000000; /* Set end of buffers flag */
1888        sc->lmc_rxring[i - 1].buffer2 = virt_to_bus(&sc->lmc_rxring[0]); /* Point back to the start */
1889    }
1890    LMC_CSR_WRITE (sc, csr_rxlist, virt_to_bus (sc->lmc_rxring)); /* write base address */
1891
1892    /* Initialize the transmit rings and buffers */
1893    for (i = 0; i < LMC_TXDESCS; i++)
1894    {
1895        if (sc->lmc_txq[i] != NULL){            /* have buffer */
1896            dev_kfree_skb(sc->lmc_txq[i]);      /* free it */
1897            sc->lmc_device->stats.tx_dropped++; /* We just dropped a packet */
1898        }
1899        sc->lmc_txq[i] = NULL;
1900        sc->lmc_txring[i].status = 0x00000000;
1901        sc->lmc_txring[i].buffer2 = virt_to_bus (&sc->lmc_txring[i + 1]);
1902    }
1903    sc->lmc_txring[i - 1].buffer2 = virt_to_bus (&sc->lmc_txring[0]);
1904    LMC_CSR_WRITE (sc, csr_txlist, virt_to_bus (sc->lmc_txring));
1905
1906    lmc_trace(sc->lmc_device, "lmc_softreset out");
1907}
1908
1909void lmc_gpio_mkinput(lmc_softc_t * const sc, u32 bits) /*fold00*/
1910{
1911    lmc_trace(sc->lmc_device, "lmc_gpio_mkinput in");
1912    sc->lmc_gpio_io &= ~bits;
1913    LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io));
1914    lmc_trace(sc->lmc_device, "lmc_gpio_mkinput out");
1915}
1916
1917void lmc_gpio_mkoutput(lmc_softc_t * const sc, u32 bits) /*fold00*/
1918{
1919    lmc_trace(sc->lmc_device, "lmc_gpio_mkoutput in");
1920    sc->lmc_gpio_io |= bits;
1921    LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io));
1922    lmc_trace(sc->lmc_device, "lmc_gpio_mkoutput out");
1923}
1924
1925void lmc_led_on(lmc_softc_t * const sc, u32 led) /*fold00*/
1926{
1927    lmc_trace(sc->lmc_device, "lmc_led_on in");
1928    if((~sc->lmc_miireg16) & led){ /* Already on! */
1929        lmc_trace(sc->lmc_device, "lmc_led_on aon out");
1930        return;
1931    }
1932    
1933    sc->lmc_miireg16 &= ~led;
1934    lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1935    lmc_trace(sc->lmc_device, "lmc_led_on out");
1936}
1937
1938void lmc_led_off(lmc_softc_t * const sc, u32 led) /*fold00*/
1939{
1940    lmc_trace(sc->lmc_device, "lmc_led_off in");
1941    if(sc->lmc_miireg16 & led){ /* Already set don't do anything */
1942        lmc_trace(sc->lmc_device, "lmc_led_off aoff out");
1943        return;
1944    }
1945    
1946    sc->lmc_miireg16 |= led;
1947    lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1948    lmc_trace(sc->lmc_device, "lmc_led_off out");
1949}
1950
1951static void lmc_reset(lmc_softc_t * const sc) /*fold00*/
1952{
1953    lmc_trace(sc->lmc_device, "lmc_reset in");
1954    sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET;
1955    lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1956
1957    sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET;
1958    lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1959
1960    /*
1961     * make some of the GPIO pins be outputs
1962     */
1963    lmc_gpio_mkoutput(sc, LMC_GEP_RESET);
1964
1965    /*
1966     * RESET low to force state reset.  This also forces
1967     * the transmitter clock to be internal, but we expect to reset
1968     * that later anyway.
1969     */
1970    sc->lmc_gpio &= ~(LMC_GEP_RESET);
1971    LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
1972
1973    /*
1974     * hold for more than 10 microseconds
1975     */
1976    udelay(50);
1977
1978    /*
1979     * stop driving Xilinx-related signals
1980     */
1981    lmc_gpio_mkinput(sc, LMC_GEP_RESET);
1982
1983    /*
1984     * Call media specific init routine
1985     */
1986    sc->lmc_media->init(sc);
1987
1988    sc->extra_stats.resetCount++;
1989    lmc_trace(sc->lmc_device, "lmc_reset out");
1990}
1991
1992static void lmc_dec_reset(lmc_softc_t * const sc) /*fold00*/
1993{
1994    u32 val;
1995    lmc_trace(sc->lmc_device, "lmc_dec_reset in");
1996
1997    /*
1998     * disable all interrupts
1999     */
2000    sc->lmc_intrmask = 0;
2001    LMC_CSR_WRITE(sc, csr_intr, sc->lmc_intrmask);
2002
2003    /*
2004     * Reset the chip with a software reset command.
2005     * Wait 10 microseconds (actually 50 PCI cycles but at
2006     * 33MHz that comes to two microseconds but wait a
2007     * bit longer anyways)
2008     */
2009    LMC_CSR_WRITE(sc, csr_busmode, TULIP_BUSMODE_SWRESET);
2010    udelay(25);
2011#ifdef __sparc__
2012    sc->lmc_busmode = LMC_CSR_READ(sc, csr_busmode);
2013    sc->lmc_busmode = 0x00100000;
2014    sc->lmc_busmode &= ~TULIP_BUSMODE_SWRESET;
2015    LMC_CSR_WRITE(sc, csr_busmode, sc->lmc_busmode);
2016#endif
2017    sc->lmc_cmdmode = LMC_CSR_READ(sc, csr_command);
2018
2019    /*
2020     * We want:
2021     *   no ethernet address in frames we write
2022     *   disable padding (txdesc, padding disable)
2023     *   ignore runt frames (rdes0 bit 15)
2024     *   no receiver watchdog or transmitter jabber timer
2025     *       (csr15 bit 0,14 == 1)
2026     *   if using 16-bit CRC, turn off CRC (trans desc, crc disable)
2027     */
2028
2029    sc->lmc_cmdmode |= ( TULIP_CMD_PROMISCUOUS
2030                         | TULIP_CMD_FULLDUPLEX
2031                         | TULIP_CMD_PASSBADPKT
2032                         | TULIP_CMD_NOHEARTBEAT
2033                         | TULIP_CMD_PORTSELECT
2034                         | TULIP_CMD_RECEIVEALL
2035                         | TULIP_CMD_MUSTBEONE
2036                       );
2037    sc->lmc_cmdmode &= ~( TULIP_CMD_OPERMODE
2038                          | TULIP_CMD_THRESHOLDCTL
2039                          | TULIP_CMD_STOREFWD
2040                          | TULIP_CMD_TXTHRSHLDCTL
2041                        );
2042
2043    LMC_CSR_WRITE(sc, csr_command, sc->lmc_cmdmode);
2044
2045    /*
2046     * disable receiver watchdog and transmit jabber
2047     */
2048    val = LMC_CSR_READ(sc, csr_sia_general);
2049    val |= (TULIP_WATCHDOG_TXDISABLE | TULIP_WATCHDOG_RXDISABLE);
2050    LMC_CSR_WRITE(sc, csr_sia_general, val);
2051
2052    lmc_trace(sc->lmc_device, "lmc_dec_reset out");
2053}
2054
2055static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, /*fold00*/
2056                         size_t csr_size)
2057{
2058    lmc_trace(sc->lmc_device, "lmc_initcsrs in");
2059    sc->lmc_csrs.csr_busmode            = csr_base +  0 * csr_size;
2060    sc->lmc_csrs.csr_txpoll             = csr_base +  1 * csr_size;
2061    sc->lmc_csrs.csr_rxpoll             = csr_base +  2 * csr_size;
2062    sc->lmc_csrs.csr_rxlist             = csr_base +  3 * csr_size;
2063    sc->lmc_csrs.csr_txlist             = csr_base +  4 * csr_size;
2064    sc->lmc_csrs.csr_status             = csr_base +  5 * csr_size;
2065    sc->lmc_csrs.csr_command            = csr_base +  6 * csr_size;
2066    sc->lmc_csrs.csr_intr               = csr_base +  7 * csr_size;
2067    sc->lmc_csrs.csr_missed_frames      = csr_base +  8 * csr_size;
2068    sc->lmc_csrs.csr_9                  = csr_base +  9 * csr_size;
2069    sc->lmc_csrs.csr_10                 = csr_base + 10 * csr_size;
2070    sc->lmc_csrs.csr_11                 = csr_base + 11 * csr_size;
2071    sc->lmc_csrs.csr_12                 = csr_base + 12 * csr_size;
2072    sc->lmc_csrs.csr_13                 = csr_base + 13 * csr_size;
2073    sc->lmc_csrs.csr_14                 = csr_base + 14 * csr_size;
2074    sc->lmc_csrs.csr_15                 = csr_base + 15 * csr_size;
2075    lmc_trace(sc->lmc_device, "lmc_initcsrs out");
2076}
2077
2078static void lmc_driver_timeout(struct net_device *dev)
2079{
2080    lmc_softc_t *sc = dev_to_sc(dev);
2081    u32 csr6;
2082    unsigned long flags;
2083
2084    lmc_trace(dev, "lmc_driver_timeout in");
2085
2086    spin_lock_irqsave(&sc->lmc_lock, flags);
2087
2088    printk("%s: Xmitter busy|\n", dev->name);
2089
2090    sc->extra_stats.tx_tbusy_calls++;
2091    if (jiffies - dev_trans_start(dev) < TX_TIMEOUT)
2092            goto bug_out;
2093
2094    /*
2095     * Chip seems to have locked up
2096     * Reset it
2097     * This whips out all our decriptor
2098     * table and starts from scartch
2099     */
2100
2101    LMC_EVENT_LOG(LMC_EVENT_XMTPRCTMO,
2102                  LMC_CSR_READ (sc, csr_status),
2103                  sc->extra_stats.tx_ProcTimeout);
2104
2105    lmc_running_reset (dev);
2106
2107    LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
2108    LMC_EVENT_LOG(LMC_EVENT_RESET2,
2109                  lmc_mii_readreg (sc, 0, 16),
2110                  lmc_mii_readreg (sc, 0, 17));
2111
2112    /* restart the tx processes */
2113    csr6 = LMC_CSR_READ (sc, csr_command);
2114    LMC_CSR_WRITE (sc, csr_command, csr6 | 0x0002);
2115    LMC_CSR_WRITE (sc, csr_command, csr6 | 0x2002);
2116
2117    /* immediate transmit */
2118    LMC_CSR_WRITE (sc, csr_txpoll, 0);
2119
2120    sc->lmc_device->stats.tx_errors++;
2121    sc->extra_stats.tx_ProcTimeout++; /* -baz */
2122
2123    dev->trans_start = jiffies; /* prevent tx timeout */
2124
2125bug_out:
2126
2127    spin_unlock_irqrestore(&sc->lmc_lock, flags);
2128
2129    lmc_trace(dev, "lmc_driver_timout out");
2130
2131
2132}
2133