LXR linux/drivers/net/wireless/ath/ath9k/pci.c

   1/*
   2 * Copyright (c) 2008-2011 Atheros Communications Inc.
   3 *
   4 * Permission to use, copy, modify, and/or distribute this software for any
   5 * purpose with or without fee is hereby granted, provided that the above
   6 * copyright notice and this permission notice appear in all copies.
   7 *
   8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15 */
  16
  17#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  18
  19#include <linux/nl80211.h>
  20#include <linux/pci.h>
  21#include <linux/pci-aspm.h>
  22#include <linux/ath9k_platform.h>
  23#include <linux/module.h>
  24#include "ath9k.h"
  25
  26static DEFINE_PCI_DEVICE_TABLE(ath_pci_id_table) = {
  27        { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI   */
  28        { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
  29        { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI   */
  30        { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI   */
  31        { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
  32
  33        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
  34                         0x002A,
  35                         PCI_VENDOR_ID_AZWAVE,
  36                         0x1C71),
  37          .driver_data = ATH9K_PCI_D3_L1_WAR },
  38        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
  39                         0x002A,
  40                         PCI_VENDOR_ID_FOXCONN,
  41                         0xE01F),
  42          .driver_data = ATH9K_PCI_D3_L1_WAR },
  43        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
  44                         0x002A,
  45                         0x11AD, /* LITEON */
  46                         0x6632),
  47          .driver_data = ATH9K_PCI_D3_L1_WAR },
  48        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
  49                         0x002A,
  50                         0x11AD, /* LITEON */
  51                         0x6642),
  52          .driver_data = ATH9K_PCI_D3_L1_WAR },
  53        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
  54                         0x002A,
  55                         PCI_VENDOR_ID_QMI,
  56                         0x0306),
  57          .driver_data = ATH9K_PCI_D3_L1_WAR },
  58        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
  59                         0x002A,
  60                         0x185F, /* WNC */
  61                         0x309D),
  62          .driver_data = ATH9K_PCI_D3_L1_WAR },
  63        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
  64                         0x002A,
  65                         0x10CF, /* Fujitsu */
  66                         0x147C),
  67          .driver_data = ATH9K_PCI_D3_L1_WAR },
  68        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
  69                         0x002A,
  70                         0x10CF, /* Fujitsu */
  71                         0x147D),
  72          .driver_data = ATH9K_PCI_D3_L1_WAR },
  73        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
  74                         0x002A,
  75                         0x10CF, /* Fujitsu */
  76                         0x1536),
  77          .driver_data = ATH9K_PCI_D3_L1_WAR },
  78
  79        /* AR9285 card for Asus */
  80        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
  81                         0x002B,
  82                         PCI_VENDOR_ID_AZWAVE,
  83                         0x2C37),
  84          .driver_data = ATH9K_PCI_BT_ANT_DIV },
  85
  86        { PCI_VDEVICE(ATHEROS, 0x002B) }, /* PCI-E */
  87        { PCI_VDEVICE(ATHEROS, 0x002C) }, /* PCI-E 802.11n bonded out */
  88        { PCI_VDEVICE(ATHEROS, 0x002D) }, /* PCI   */
  89        { PCI_VDEVICE(ATHEROS, 0x002E) }, /* PCI-E */
  90        { PCI_VDEVICE(ATHEROS, 0x0030) }, /* PCI-E  AR9300 */
  91
  92        /* PCI-E CUS198 */
  93        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
  94                         0x0032,
  95                         PCI_VENDOR_ID_AZWAVE,
  96                         0x2086),
  97          .driver_data = ATH9K_PCI_CUS198 | ATH9K_PCI_BT_ANT_DIV },
  98        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
  99                         0x0032,
 100                         PCI_VENDOR_ID_AZWAVE,
 101                         0x1237),
 102          .driver_data = ATH9K_PCI_CUS198 | ATH9K_PCI_BT_ANT_DIV },
 103        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 104                         0x0032,
 105                         PCI_VENDOR_ID_AZWAVE,
 106                         0x2126),
 107          .driver_data = ATH9K_PCI_CUS198 | ATH9K_PCI_BT_ANT_DIV },
 108        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 109                         0x0032,
 110                         PCI_VENDOR_ID_AZWAVE,
 111                         0x126A),
 112          .driver_data = ATH9K_PCI_CUS198 | ATH9K_PCI_BT_ANT_DIV },
 113
 114        /* PCI-E CUS230 */
 115        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 116                         0x0032,
 117                         PCI_VENDOR_ID_AZWAVE,
 118                         0x2152),
 119          .driver_data = ATH9K_PCI_CUS230 | ATH9K_PCI_BT_ANT_DIV },
 120        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 121                         0x0032,
 122                         PCI_VENDOR_ID_FOXCONN,
 123                         0xE075),
 124          .driver_data = ATH9K_PCI_CUS230 | ATH9K_PCI_BT_ANT_DIV },
 125
 126        /* WB225 */
 127        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 128                         0x0032,
 129                         PCI_VENDOR_ID_ATHEROS,
 130                         0x3119),
 131          .driver_data = ATH9K_PCI_BT_ANT_DIV },
 132        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 133                         0x0032,
 134                         PCI_VENDOR_ID_ATHEROS,
 135                         0x3122),
 136          .driver_data = ATH9K_PCI_BT_ANT_DIV },
 137        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 138                         0x0032,
 139                         0x185F, /* WNC */
 140                         0x3119),
 141          .driver_data = ATH9K_PCI_BT_ANT_DIV },
 142        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 143                         0x0032,
 144                         0x185F, /* WNC */
 145                         0x3027),
 146          .driver_data = ATH9K_PCI_BT_ANT_DIV },
 147        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 148                         0x0032,
 149                         PCI_VENDOR_ID_SAMSUNG,
 150                         0x4105),
 151          .driver_data = ATH9K_PCI_BT_ANT_DIV },
 152        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 153                         0x0032,
 154                         PCI_VENDOR_ID_SAMSUNG,
 155                         0x4106),
 156          .driver_data = ATH9K_PCI_BT_ANT_DIV },
 157        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 158                         0x0032,
 159                         PCI_VENDOR_ID_SAMSUNG,
 160                         0x410D),
 161          .driver_data = ATH9K_PCI_BT_ANT_DIV },
 162        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 163                         0x0032,
 164                         PCI_VENDOR_ID_SAMSUNG,
 165                         0x410E),
 166          .driver_data = ATH9K_PCI_BT_ANT_DIV },
 167        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 168                         0x0032,
 169                         PCI_VENDOR_ID_SAMSUNG,
 170                         0x410F),
 171          .driver_data = ATH9K_PCI_BT_ANT_DIV },
 172        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 173                         0x0032,
 174                         PCI_VENDOR_ID_SAMSUNG,
 175                         0xC706),
 176          .driver_data = ATH9K_PCI_BT_ANT_DIV },
 177        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 178                         0x0032,
 179                         PCI_VENDOR_ID_SAMSUNG,
 180                         0xC680),
 181          .driver_data = ATH9K_PCI_BT_ANT_DIV },
 182        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 183                         0x0032,
 184                         PCI_VENDOR_ID_SAMSUNG,
 185                         0xC708),
 186          .driver_data = ATH9K_PCI_BT_ANT_DIV },
 187        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 188                         0x0032,
 189                         PCI_VENDOR_ID_LENOVO,
 190                         0x3218),
 191          .driver_data = ATH9K_PCI_BT_ANT_DIV },
 192        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 193                         0x0032,
 194                         PCI_VENDOR_ID_LENOVO,
 195                         0x3219),
 196          .driver_data = ATH9K_PCI_BT_ANT_DIV },
 197
 198        { PCI_VDEVICE(ATHEROS, 0x0032) }, /* PCI-E  AR9485 */
 199        { PCI_VDEVICE(ATHEROS, 0x0033) }, /* PCI-E  AR9580 */
 200
 201        /* PCI-E CUS217 */
 202        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 203                         0x0034,
 204                         PCI_VENDOR_ID_AZWAVE,
 205                         0x2116),
 206          .driver_data = ATH9K_PCI_CUS217 },
 207        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 208                         0x0034,
 209                         0x11AD, /* LITEON */
 210                         0x6661),
 211          .driver_data = ATH9K_PCI_CUS217 },
 212
 213        /* AR9462 with WoW support */
 214        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 215                         0x0034,
 216                         PCI_VENDOR_ID_ATHEROS,
 217                         0x3117),
 218          .driver_data = ATH9K_PCI_WOW },
 219        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 220                         0x0034,
 221                         PCI_VENDOR_ID_LENOVO,
 222                         0x3214),
 223          .driver_data = ATH9K_PCI_WOW },
 224        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 225                         0x0034,
 226                         PCI_VENDOR_ID_ATTANSIC,
 227                         0x0091),
 228          .driver_data = ATH9K_PCI_WOW },
 229        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 230                         0x0034,
 231                         PCI_VENDOR_ID_AZWAVE,
 232                         0x2110),
 233          .driver_data = ATH9K_PCI_WOW },
 234        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 235                         0x0034,
 236                         PCI_VENDOR_ID_ASUSTEK,
 237                         0x850E),
 238          .driver_data = ATH9K_PCI_WOW },
 239        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 240                         0x0034,
 241                         0x11AD, /* LITEON */
 242                         0x6631),
 243          .driver_data = ATH9K_PCI_WOW },
 244        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 245                         0x0034,
 246                         0x11AD, /* LITEON */
 247                         0x6641),
 248          .driver_data = ATH9K_PCI_WOW },
 249        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 250                         0x0034,
 251                         PCI_VENDOR_ID_HP,
 252                         0x1864),
 253          .driver_data = ATH9K_PCI_WOW },
 254        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 255                         0x0034,
 256                         0x14CD, /* USI */
 257                         0x0063),
 258          .driver_data = ATH9K_PCI_WOW },
 259        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 260                         0x0034,
 261                         0x14CD, /* USI */
 262                         0x0064),
 263          .driver_data = ATH9K_PCI_WOW },
 264        { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
 265                         0x0034,
 266                         0x10CF, /* Fujitsu */
 267                         0x1783),
 268          .driver_data = ATH9K_PCI_WOW },
 269
 270        { PCI_VDEVICE(ATHEROS, 0x0034) }, /* PCI-E  AR9462 */
 271        { PCI_VDEVICE(ATHEROS, 0x0037) }, /* PCI-E  AR1111/AR9485 */
 272        { PCI_VDEVICE(ATHEROS, 0x0036) }, /* PCI-E  AR9565 */
 273        { 0 }
 274};
 275
 276
 277/* return bus cachesize in 4B word units */
 278static void ath_pci_read_cachesize(struct ath_common *common, int *csz)
 279{
 280        struct ath_softc *sc = (struct ath_softc *) common->priv;
 281        u8 u8tmp;
 282
 283        pci_read_config_byte(to_pci_dev(sc->dev), PCI_CACHE_LINE_SIZE, &u8tmp);
 284        *csz = (int)u8tmp;
 285
 286        /*
 287         * This check was put in to avoid "unpleasant" consequences if
 288         * the bootrom has not fully initialized all PCI devices.
 289         * Sometimes the cache line size register is not set
 290         */
 291
 292        if (*csz == 0)
 293                *csz = DEFAULT_CACHELINE >> 2;   /* Use the default size */
 294}
 295
 296static bool ath_pci_eeprom_read(struct ath_common *common, u32 off, u16 *data)
 297{
 298        struct ath_softc *sc = (struct ath_softc *) common->priv;
 299        struct ath9k_platform_data *pdata = sc->dev->platform_data;
 300
 301        if (pdata) {
 302                if (off >= (ARRAY_SIZE(pdata->eeprom_data))) {
 303                        ath_err(common,
 304                                "%s: eeprom read failed, offset %08x is out of range\n",
 305                                __func__, off);
 306                }
 307
 308                *data = pdata->eeprom_data[off];
 309        } else {
 310                struct ath_hw *ah = (struct ath_hw *) common->ah;
 311
 312                common->ops->read(ah, AR5416_EEPROM_OFFSET +
 313                                      (off << AR5416_EEPROM_S));
 314
 315                if (!ath9k_hw_wait(ah,
 316                                   AR_EEPROM_STATUS_DATA,
 317                                   AR_EEPROM_STATUS_DATA_BUSY |
 318                                   AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
 319                                   AH_WAIT_TIMEOUT)) {
 320                        return false;
 321                }
 322
 323                *data = MS(common->ops->read(ah, AR_EEPROM_STATUS_DATA),
 324                           AR_EEPROM_STATUS_DATA_VAL);
 325        }
 326
 327        return true;
 328}
 329
 330/* Need to be called after we discover btcoex capabilities */
 331static void ath_pci_aspm_init(struct ath_common *common)
 332{
 333        struct ath_softc *sc = (struct ath_softc *) common->priv;
 334        struct ath_hw *ah = sc->sc_ah;
 335        struct pci_dev *pdev = to_pci_dev(sc->dev);
 336        struct pci_dev *parent;
 337        u16 aspm;
 338
 339        if (!ah->is_pciexpress)
 340                return;
 341
 342        parent = pdev->bus->self;
 343        if (!parent)
 344                return;
 345
 346        if ((ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) &&
 347            (AR_SREV_9285(ah))) {
 348                /* Bluetooth coexistence requires disabling ASPM. */
 349                pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL,
 350                        PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1);
 351
 352                /*
 353                 * Both upstream and downstream PCIe components should
 354                 * have the same ASPM settings.
 355                 */
 356                pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
 357                        PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1);
 358
 359                ath_info(common, "Disabling ASPM since BTCOEX is enabled\n");
 360                return;
 361        }
 362
 363        /*
 364         * 0x70c - Ack Frequency Register.
 365         *
 366         * Bits 27:29 - DEFAULT_L1_ENTRANCE_LATENCY.
 367         *
 368         * 000 : 1 us
 369         * 001 : 2 us
 370         * 010 : 4 us
 371         * 011 : 8 us
 372         * 100 : 16 us
 373         * 101 : 32 us
 374         * 110/111 : 64 us
 375         */
 376        if (AR_SREV_9462(ah))
 377                pci_read_config_dword(pdev, 0x70c, &ah->config.aspm_l1_fix);
 378
 379        pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &aspm);
 380        if (aspm & (PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1)) {
 381                ah->aspm_enabled = true;
 382                /* Initialize PCIe PM and SERDES registers. */
 383                ath9k_hw_configpcipowersave(ah, false);
 384                ath_info(common, "ASPM enabled: 0x%x\n", aspm);
 385        }
 386}
 387
 388static const struct ath_bus_ops ath_pci_bus_ops = {
 389        .ath_bus_type = ATH_PCI,
 390        .read_cachesize = ath_pci_read_cachesize,
 391        .eeprom_read = ath_pci_eeprom_read,
 392        .aspm_init = ath_pci_aspm_init,
 393};
 394
 395static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 396{
 397        struct ath_softc *sc;
 398        struct ieee80211_hw *hw;
 399        u8 csz;
 400        u32 val;
 401        int ret = 0;
 402        char hw_name[64];
 403
 404        if (pcim_enable_device(pdev))
 405                return -EIO;
 406
 407        ret =  pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
 408        if (ret) {
 409                pr_err("32-bit DMA not available\n");
 410                return ret;
 411        }
 412
 413        ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
 414        if (ret) {
 415                pr_err("32-bit DMA consistent DMA enable failed\n");
 416                return ret;
 417        }
 418
 419        /*
 420         * Cache line size is used to size and align various
 421         * structures used to communicate with the hardware.
 422         */
 423        pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
 424        if (csz == 0) {
 425                /*
 426                 * Linux 2.4.18 (at least) writes the cache line size
 427                 * register as a 16-bit wide register which is wrong.
 428                 * We must have this setup properly for rx buffer
 429                 * DMA to work so force a reasonable value here if it
 430                 * comes up zero.
 431                 */
 432                csz = L1_CACHE_BYTES / sizeof(u32);
 433                pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
 434        }
 435        /*
 436         * The default setting of latency timer yields poor results,
 437         * set it to the value used by other systems. It may be worth
 438         * tweaking this setting more.
 439         */
 440        pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
 441
 442        pci_set_master(pdev);
 443
 444        /*
 445         * Disable the RETRY_TIMEOUT register (0x41) to keep
 446         * PCI Tx retries from interfering with C3 CPU state.
 447         */
 448        pci_read_config_dword(pdev, 0x40, &val);
 449        if ((val & 0x0000ff00) != 0)
 450                pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
 451
 452        ret = pcim_iomap_regions(pdev, BIT(0), "ath9k");
 453        if (ret) {
 454                dev_err(&pdev->dev, "PCI memory region reserve error\n");
 455                return -ENODEV;
 456        }
 457
 458        hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
 459        if (!hw) {
 460                dev_err(&pdev->dev, "No memory for ieee80211_hw\n");
 461                return -ENOMEM;
 462        }
 463
 464        SET_IEEE80211_DEV(hw, &pdev->dev);
 465        pci_set_drvdata(pdev, hw);
 466
 467        sc = hw->priv;
 468        sc->hw = hw;
 469        sc->dev = &pdev->dev;
 470        sc->mem = pcim_iomap_table(pdev)[0];
 471        sc->driver_data = id->driver_data;
 472
 473        /* Will be cleared in ath9k_start() */
 474        set_bit(SC_OP_INVALID, &sc->sc_flags);
 475
 476        ret = request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath9k", sc);
 477        if (ret) {
 478                dev_err(&pdev->dev, "request_irq failed\n");
 479                goto err_irq;
 480        }
 481
 482        sc->irq = pdev->irq;
 483
 484        ret = ath9k_init_device(id->device, sc, &ath_pci_bus_ops);
 485        if (ret) {
 486                dev_err(&pdev->dev, "Failed to initialize device\n");
 487                goto err_init;
 488        }
 489
 490        ath9k_hw_name(sc->sc_ah, hw_name, sizeof(hw_name));
 491        wiphy_info(hw->wiphy, "%s mem=0x%lx, irq=%d\n",
 492                   hw_name, (unsigned long)sc->mem, pdev->irq);
 493
 494        return 0;
 495
 496err_init:
 497        free_irq(sc->irq, sc);
 498err_irq:
 499        ieee80211_free_hw(hw);
 500        return ret;
 501}
 502
 503static void ath_pci_remove(struct pci_dev *pdev)
 504{
 505        struct ieee80211_hw *hw = pci_get_drvdata(pdev);
 506        struct ath_softc *sc = hw->priv;
 507
 508        if (!is_ath9k_unloaded)
 509                sc->sc_ah->ah_flags |= AH_UNPLUGGED;
 510        ath9k_deinit_device(sc);
 511        free_irq(sc->irq, sc);
 512        ieee80211_free_hw(sc->hw);
 513}
 514
 515#ifdef CONFIG_PM_SLEEP
 516
 517static int ath_pci_suspend(struct device *device)
 518{
 519        struct pci_dev *pdev = to_pci_dev(device);
 520        struct ieee80211_hw *hw = pci_get_drvdata(pdev);
 521        struct ath_softc *sc = hw->priv;
 522
 523        if (sc->wow_enabled)
 524                return 0;
 525
 526        /* The device has to be moved to FULLSLEEP forcibly.
 527         * Otherwise the chip never moved to full sleep,
 528         * when no interface is up.
 529         */
 530        ath9k_stop_btcoex(sc);
 531        ath9k_hw_disable(sc->sc_ah);
 532        ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 533
 534        return 0;
 535}
 536
 537static int ath_pci_resume(struct device *device)
 538{
 539        struct pci_dev *pdev = to_pci_dev(device);
 540        struct ieee80211_hw *hw = pci_get_drvdata(pdev);
 541        struct ath_softc *sc = hw->priv;
 542        struct ath_hw *ah = sc->sc_ah;
 543        struct ath_common *common = ath9k_hw_common(ah);
 544        u32 val;
 545
 546        /*
 547         * Suspend/Resume resets the PCI configuration space, so we have to
 548         * re-disable the RETRY_TIMEOUT register (0x41) to keep
 549         * PCI Tx retries from interfering with C3 CPU state
 550         */
 551        pci_read_config_dword(pdev, 0x40, &val);
 552        if ((val & 0x0000ff00) != 0)
 553                pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
 554
 555        ath_pci_aspm_init(common);
 556        ah->reset_power_on = false;
 557
 558        return 0;
 559}
 560
 561static SIMPLE_DEV_PM_OPS(ath9k_pm_ops, ath_pci_suspend, ath_pci_resume);
 562
 563#define ATH9K_PM_OPS    (&ath9k_pm_ops)
 564
 565#else /* !CONFIG_PM_SLEEP */
 566
 567#define ATH9K_PM_OPS    NULL
 568
 569#endif /* !CONFIG_PM_SLEEP */
 570
 571
 572MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
 573
 574static struct pci_driver ath_pci_driver = {
 575        .name       = "ath9k",
 576        .id_table   = ath_pci_id_table,
 577        .probe      = ath_pci_probe,
 578        .remove     = ath_pci_remove,
 579        .driver.pm  = ATH9K_PM_OPS,
 580};
 581
 582int ath_pci_init(void)
 583{
 584        return pci_register_driver(&ath_pci_driver);
 585}
 586
 587void ath_pci_exit(void)
 588{
 589        pci_unregister_driver(&ath_pci_driver);
 590}
 591