LXR linux/drivers/net/wireless/ath/wil6210/wil6210.h

   1/*
   2 * Copyright (c) 2012 Qualcomm Atheros, Inc.
   3 *
   4 * Permission to use, copy, modify, and/or distribute this software for any
   5 * purpose with or without fee is hereby granted, provided that the above
   6 * copyright notice and this permission notice appear in all copies.
   7 *
   8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15 */
  16
  17#ifndef __WIL6210_H__
  18#define __WIL6210_H__
  19
  20#include <linux/netdevice.h>
  21#include <linux/wireless.h>
  22#include <net/cfg80211.h>
  23
  24#define WIL_NAME "wil6210"
  25
  26/**
  27 * extract bits [@b0:@b1] (inclusive) from the value @x
  28 * it should be @b0 <= @b1, or result is incorrect
  29 */
  30static inline u32 WIL_GET_BITS(u32 x, int b0, int b1)
  31{
  32        return (x >> b0) & ((1 << (b1 - b0 + 1)) - 1);
  33}
  34
  35#define WIL6210_MEM_SIZE (2*1024*1024UL)
  36
  37#define WIL6210_RX_RING_SIZE    (128)
  38#define WIL6210_TX_RING_SIZE    (128)
  39#define WIL6210_MAX_TX_RINGS    (24) /* HW limit */
  40#define WIL6210_MAX_CID         (8) /* HW limit */
  41#define WIL6210_NAPI_BUDGET     (16) /* arbitrary */
  42
  43/* Hardware definitions begin */
  44
  45/*
  46 * Mapping
  47 * RGF File      | Host addr    |  FW addr
  48 *               |              |
  49 * user_rgf      | 0x000000     | 0x880000
  50 *  dma_rgf      | 0x001000     | 0x881000
  51 * pcie_rgf      | 0x002000     | 0x882000
  52 *               |              |
  53 */
  54
  55/* Where various structures placed in host address space */
  56#define WIL6210_FW_HOST_OFF      (0x880000UL)
  57
  58#define HOSTADDR(fwaddr)        (fwaddr - WIL6210_FW_HOST_OFF)
  59
  60/*
  61 * Interrupt control registers block
  62 *
  63 * each interrupt controlled by the same bit in all registers
  64 */
  65struct RGF_ICR {
  66        u32 ICC; /* Cause Control, RW: 0 - W1C, 1 - COR */
  67        u32 ICR; /* Cause, W1C/COR depending on ICC */
  68        u32 ICM; /* Cause masked (ICR & ~IMV), W1C/COR depending on ICC */
  69        u32 ICS; /* Cause Set, WO */
  70        u32 IMV; /* Mask, RW+S/C */
  71        u32 IMS; /* Mask Set, write 1 to set */
  72        u32 IMC; /* Mask Clear, write 1 to clear */
  73} __packed;
  74
  75/* registers - FW addresses */
  76#define RGF_USER_USER_SCRATCH_PAD       (0x8802bc)
  77#define RGF_USER_USER_ICR               (0x880b4c) /* struct RGF_ICR */
  78        #define BIT_USER_USER_ICR_SW_INT_2      BIT(18)
  79#define RGF_USER_CLKS_CTL_SW_RST_MASK_0 (0x880b14)
  80#define RGF_USER_MAC_CPU_0              (0x8801fc)
  81#define RGF_USER_USER_CPU_0             (0x8801e0)
  82#define RGF_USER_CLKS_CTL_SW_RST_VEC_0  (0x880b04)
  83#define RGF_USER_CLKS_CTL_SW_RST_VEC_1  (0x880b08)
  84#define RGF_USER_CLKS_CTL_SW_RST_VEC_2  (0x880b0c)
  85#define RGF_USER_CLKS_CTL_SW_RST_VEC_3  (0x880b10)
  86
  87#define RGF_DMA_PSEUDO_CAUSE            (0x881c68)
  88#define RGF_DMA_PSEUDO_CAUSE_MASK_SW    (0x881c6c)
  89#define RGF_DMA_PSEUDO_CAUSE_MASK_FW    (0x881c70)
  90        #define BIT_DMA_PSEUDO_CAUSE_RX         BIT(0)
  91        #define BIT_DMA_PSEUDO_CAUSE_TX         BIT(1)
  92        #define BIT_DMA_PSEUDO_CAUSE_MISC       BIT(2)
  93
  94#define RGF_DMA_EP_TX_ICR               (0x881bb4) /* struct RGF_ICR */
  95        #define BIT_DMA_EP_TX_ICR_TX_DONE       BIT(0)
  96        #define BIT_DMA_EP_TX_ICR_TX_DONE_N(n)  BIT(n+1) /* n = [0..23] */
  97#define RGF_DMA_EP_RX_ICR               (0x881bd0) /* struct RGF_ICR */
  98        #define BIT_DMA_EP_RX_ICR_RX_DONE       BIT(0)
  99#define RGF_DMA_EP_MISC_ICR             (0x881bec) /* struct RGF_ICR */
 100        #define BIT_DMA_EP_MISC_ICR_RX_HTRSH    BIT(0)
 101        #define BIT_DMA_EP_MISC_ICR_TX_NO_ACT   BIT(1)
 102        #define BIT_DMA_EP_MISC_ICR_FW_INT(n)   BIT(28+n) /* n = [0..3] */
 103
 104/* Interrupt moderation control */
 105#define RGF_DMA_ITR_CNT_TRSH            (0x881c5c)
 106#define RGF_DMA_ITR_CNT_DATA            (0x881c60)
 107#define RGF_DMA_ITR_CNT_CRL             (0x881C64)
 108        #define BIT_DMA_ITR_CNT_CRL_EN          BIT(0)
 109        #define BIT_DMA_ITR_CNT_CRL_EXT_TICK    BIT(1)
 110        #define BIT_DMA_ITR_CNT_CRL_FOREVER     BIT(2)
 111        #define BIT_DMA_ITR_CNT_CRL_CLR         BIT(3)
 112        #define BIT_DMA_ITR_CNT_CRL_REACH_TRSH  BIT(4)
 113
 114/* popular locations */
 115#define HOST_MBOX   HOSTADDR(RGF_USER_USER_SCRATCH_PAD)
 116#define HOST_SW_INT (HOSTADDR(RGF_USER_USER_ICR) + \
 117        offsetof(struct RGF_ICR, ICS))
 118#define SW_INT_MBOX BIT_USER_USER_ICR_SW_INT_2
 119
 120/* ISR register bits */
 121#define ISR_MISC_FW_READY       BIT_DMA_EP_MISC_ICR_FW_INT(0)
 122#define ISR_MISC_MBOX_EVT       BIT_DMA_EP_MISC_ICR_FW_INT(1)
 123#define ISR_MISC_FW_ERROR       BIT_DMA_EP_MISC_ICR_FW_INT(3)
 124
 125/* Hardware definitions end */
 126
 127struct wil6210_mbox_ring {
 128        u32 base;
 129        u16 entry_size; /* max. size of mbox entry, incl. all headers */
 130        u16 size;
 131        u32 tail;
 132        u32 head;
 133} __packed;
 134
 135struct wil6210_mbox_ring_desc {
 136        __le32 sync;
 137        __le32 addr;
 138} __packed;
 139
 140/* at HOST_OFF_WIL6210_MBOX_CTL */
 141struct wil6210_mbox_ctl {
 142        struct wil6210_mbox_ring tx;
 143        struct wil6210_mbox_ring rx;
 144} __packed;
 145
 146struct wil6210_mbox_hdr {
 147        __le16 seq;
 148        __le16 len; /* payload, bytes after this header */
 149        __le16 type;
 150        u8 flags;
 151        u8 reserved;
 152} __packed;
 153
 154#define WIL_MBOX_HDR_TYPE_WMI (0)
 155
 156/* max. value for wil6210_mbox_hdr.len */
 157#define MAX_MBOXITEM_SIZE   (240)
 158
 159/**
 160 * struct wil6210_mbox_hdr_wmi - WMI header
 161 *
 162 * @mid: MAC ID
 163 *      00 - default, created by FW
 164 *      01..0f - WiFi ports, driver to create
 165 *      10..fe - debug
 166 *      ff - broadcast
 167 * @id: command/event ID
 168 * @timestamp: FW fills for events, free-running msec timer
 169 */
 170struct wil6210_mbox_hdr_wmi {
 171        u8 mid;
 172        u8 reserved;
 173        __le16 id;
 174        __le32 timestamp;
 175} __packed;
 176
 177struct pending_wmi_event {
 178        struct list_head list;
 179        struct {
 180                struct wil6210_mbox_hdr hdr;
 181                struct wil6210_mbox_hdr_wmi wmi;
 182                u8 data[0];
 183        } __packed event;
 184};
 185
 186/**
 187 * struct wil_ctx - software context for Vring descriptor
 188 */
 189struct wil_ctx {
 190        struct sk_buff *skb;
 191        u8 mapped_as_page:1;
 192};
 193
 194union vring_desc;
 195
 196struct vring {
 197        dma_addr_t pa;
 198        volatile union vring_desc *va; /* vring_desc[size], WriteBack by DMA */
 199        u16 size; /* number of vring_desc elements */
 200        u32 swtail;
 201        u32 swhead;
 202        u32 hwtail; /* write here to inform hw */
 203        struct wil_ctx *ctx; /* ctx[size] - software context */
 204};
 205
 206enum { /* for wil6210_priv.status */
 207        wil_status_fwready = 0,
 208        wil_status_fwconnecting,
 209        wil_status_fwconnected,
 210        wil_status_dontscan,
 211        wil_status_reset_done,
 212        wil_status_irqen, /* FIXME: interrupts enabled - for debug */
 213};
 214
 215struct pci_dev;
 216
 217struct wil6210_stats {
 218        u64 tsf;
 219        u32 snr;
 220        u16 last_mcs_rx;
 221        u16 bf_mcs; /* last BF, used for Tx */
 222        u16 my_rx_sector;
 223        u16 my_tx_sector;
 224        u16 peer_rx_sector;
 225        u16 peer_tx_sector;
 226};
 227
 228struct wil6210_priv {
 229        struct pci_dev *pdev;
 230        int n_msi;
 231        struct wireless_dev *wdev;
 232        void __iomem *csr;
 233        ulong status;
 234        u32 fw_version;
 235        u8 n_mids; /* number of additional MIDs as reported by FW */
 236        /* profile */
 237        u32 monitor_flags;
 238        u32 secure_pcp; /* create secure PCP? */
 239        int sinfo_gen;
 240        /* cached ISR registers */
 241        u32 isr_misc;
 242        /* mailbox related */
 243        struct mutex wmi_mutex;
 244        struct wil6210_mbox_ctl mbox_ctl;
 245        struct completion wmi_ready;
 246        u16 wmi_seq;
 247        u16 reply_id; /**< wait for this WMI event */
 248        void *reply_buf;
 249        u16 reply_size;
 250        struct workqueue_struct *wmi_wq; /* for deferred calls */
 251        struct work_struct wmi_event_worker;
 252        struct workqueue_struct *wmi_wq_conn; /* for connect worker */
 253        struct work_struct connect_worker;
 254        struct work_struct disconnect_worker;
 255        struct timer_list connect_timer;
 256        int pending_connect_cid;
 257        struct list_head pending_wmi_ev;
 258        /*
 259         * protect pending_wmi_ev
 260         * - fill in IRQ from wil6210_irq_misc,
 261         * - consumed in thread by wmi_event_worker
 262         */
 263        spinlock_t wmi_ev_lock;
 264        struct napi_struct napi_rx;
 265        struct napi_struct napi_tx;
 266        /* DMA related */
 267        struct vring vring_rx;
 268        struct vring vring_tx[WIL6210_MAX_TX_RINGS];
 269        u8 dst_addr[WIL6210_MAX_TX_RINGS][ETH_ALEN];
 270        /* scan */
 271        struct cfg80211_scan_request *scan_request;
 272
 273        struct mutex mutex; /* for wil6210_priv access in wil_{up|down} */
 274        /* statistics */
 275        struct wil6210_stats stats;
 276        /* debugfs */
 277        struct dentry *debug;
 278        struct debugfs_blob_wrapper fw_code_blob;
 279        struct debugfs_blob_wrapper fw_data_blob;
 280        struct debugfs_blob_wrapper fw_peri_blob;
 281        struct debugfs_blob_wrapper uc_code_blob;
 282        struct debugfs_blob_wrapper uc_data_blob;
 283        struct debugfs_blob_wrapper rgf_blob;
 284};
 285
 286#define wil_to_wiphy(i) (i->wdev->wiphy)
 287#define wil_to_dev(i) (wiphy_dev(wil_to_wiphy(i)))
 288#define wiphy_to_wil(w) (struct wil6210_priv *)(wiphy_priv(w))
 289#define wil_to_wdev(i) (i->wdev)
 290#define wdev_to_wil(w) (struct wil6210_priv *)(wdev_priv(w))
 291#define wil_to_ndev(i) (wil_to_wdev(i)->netdev)
 292#define ndev_to_wil(n) (wdev_to_wil(n->ieee80211_ptr))
 293
 294int wil_dbg_trace(struct wil6210_priv *wil, const char *fmt, ...);
 295int wil_err(struct wil6210_priv *wil, const char *fmt, ...);
 296int wil_info(struct wil6210_priv *wil, const char *fmt, ...);
 297#define wil_dbg(wil, fmt, arg...) do { \
 298        netdev_dbg(wil_to_ndev(wil), fmt, ##arg); \
 299        wil_dbg_trace(wil, fmt, ##arg); \
 300} while (0)
 301
 302#define wil_dbg_irq(wil, fmt, arg...) wil_dbg(wil, "DBG[ IRQ]" fmt, ##arg)
 303#define wil_dbg_txrx(wil, fmt, arg...) wil_dbg(wil, "DBG[TXRX]" fmt, ##arg)
 304#define wil_dbg_wmi(wil, fmt, arg...) wil_dbg(wil, "DBG[ WMI]" fmt, ##arg)
 305#define wil_dbg_misc(wil, fmt, arg...) wil_dbg(wil, "DBG[MISC]" fmt, ##arg)
 306
 307#define wil_hex_dump_txrx(prefix_str, prefix_type, rowsize,     \
 308                          groupsize, buf, len, ascii)           \
 309                          print_hex_dump_debug("DBG[TXRX]" prefix_str,\
 310                                         prefix_type, rowsize,  \
 311                                         groupsize, buf, len, ascii)
 312
 313#define wil_hex_dump_wmi(prefix_str, prefix_type, rowsize,      \
 314                         groupsize, buf, len, ascii)            \
 315                         print_hex_dump_debug("DBG[ WMI]" prefix_str,\
 316                                        prefix_type, rowsize,   \
 317                                        groupsize, buf, len, ascii)
 318
 319void wil_memcpy_fromio_32(void *dst, const volatile void __iomem *src,
 320                          size_t count);
 321void wil_memcpy_toio_32(volatile void __iomem *dst, const void *src,
 322                        size_t count);
 323
 324void *wil_if_alloc(struct device *dev, void __iomem *csr);
 325void wil_if_free(struct wil6210_priv *wil);
 326int wil_if_add(struct wil6210_priv *wil);
 327void wil_if_remove(struct wil6210_priv *wil);
 328int wil_priv_init(struct wil6210_priv *wil);
 329void wil_priv_deinit(struct wil6210_priv *wil);
 330int wil_reset(struct wil6210_priv *wil);
 331void wil_link_on(struct wil6210_priv *wil);
 332void wil_link_off(struct wil6210_priv *wil);
 333int wil_up(struct wil6210_priv *wil);
 334int wil_down(struct wil6210_priv *wil);
 335void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring *r);
 336
 337void __iomem *wmi_buffer(struct wil6210_priv *wil, __le32 ptr);
 338void __iomem *wmi_addr(struct wil6210_priv *wil, u32 ptr);
 339int wmi_read_hdr(struct wil6210_priv *wil, __le32 ptr,
 340                 struct wil6210_mbox_hdr *hdr);
 341int wmi_send(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len);
 342void wmi_recv_cmd(struct wil6210_priv *wil);
 343int wmi_call(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len,
 344             u16 reply_id, void *reply, u8 reply_size, int to_msec);
 345void wmi_event_worker(struct work_struct *work);
 346void wmi_event_flush(struct wil6210_priv *wil);
 347int wmi_set_ssid(struct wil6210_priv *wil, u8 ssid_len, const void *ssid);
 348int wmi_get_ssid(struct wil6210_priv *wil, u8 *ssid_len, void *ssid);
 349int wmi_set_channel(struct wil6210_priv *wil, int channel);
 350int wmi_get_channel(struct wil6210_priv *wil, int *channel);
 351int wmi_del_cipher_key(struct wil6210_priv *wil, u8 key_index,
 352                       const void *mac_addr);
 353int wmi_add_cipher_key(struct wil6210_priv *wil, u8 key_index,
 354                       const void *mac_addr, int key_len, const void *key);
 355int wmi_echo(struct wil6210_priv *wil);
 356int wmi_set_ie(struct wil6210_priv *wil, u8 type, u16 ie_len, const void *ie);
 357int wmi_rx_chain_add(struct wil6210_priv *wil, struct vring *vring);
 358int wmi_p2p_cfg(struct wil6210_priv *wil, int channel);
 359int wmi_get_temperature(struct wil6210_priv *wil, u32 *t_m, u32 *t_r);
 360
 361int wil6210_init_irq(struct wil6210_priv *wil, int irq);
 362void wil6210_fini_irq(struct wil6210_priv *wil, int irq);
 363void wil6210_disable_irq(struct wil6210_priv *wil);
 364void wil6210_enable_irq(struct wil6210_priv *wil);
 365
 366int wil6210_debugfs_init(struct wil6210_priv *wil);
 367void wil6210_debugfs_remove(struct wil6210_priv *wil);
 368
 369struct wireless_dev *wil_cfg80211_init(struct device *dev);
 370void wil_wdev_free(struct wil6210_priv *wil);
 371
 372int wmi_set_mac_address(struct wil6210_priv *wil, void *addr);
 373int wmi_pcp_start(struct wil6210_priv *wil, int bi, u8 wmi_nettype, u8 chan);
 374int wmi_pcp_stop(struct wil6210_priv *wil);
 375void wil6210_disconnect(struct wil6210_priv *wil, void *bssid);
 376
 377int wil_rx_init(struct wil6210_priv *wil);
 378void wil_rx_fini(struct wil6210_priv *wil);
 379
 380/* TX API */
 381int wil_vring_init_tx(struct wil6210_priv *wil, int id, int size,
 382                      int cid, int tid);
 383void wil_vring_fini_tx(struct wil6210_priv *wil, int id);
 384
 385netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev);
 386int wil_tx_complete(struct wil6210_priv *wil, int ringid);
 387void wil6210_unmask_irq_tx(struct wil6210_priv *wil);
 388
 389/* RX API */
 390void wil_rx_handle(struct wil6210_priv *wil, int *quota);
 391void wil6210_unmask_irq_rx(struct wil6210_priv *wil);
 392
 393int wil_iftype_nl2wmi(enum nl80211_iftype type);
 394
 395#endif /* __WIL6210_H__ */
 396