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27#include <linux/delay.h>
28#include <linux/etherdevice.h>
29#include <linux/init.h>
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/slab.h>
33#include <linux/usb.h>
34
35#include "rt2x00.h"
36#include "rt2x00usb.h"
37#include "rt2500usb.h"
38
39
40
41
42static bool modparam_nohwcrypt;
43module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
44MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
62 const unsigned int offset,
63 u16 *value)
64{
65 __le16 reg;
66 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
67 USB_VENDOR_REQUEST_IN, offset,
68 ®, sizeof(reg), REGISTER_TIMEOUT);
69 *value = le16_to_cpu(reg);
70}
71
72static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
73 const unsigned int offset,
74 u16 *value)
75{
76 __le16 reg;
77 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
78 USB_VENDOR_REQUEST_IN, offset,
79 ®, sizeof(reg), REGISTER_TIMEOUT);
80 *value = le16_to_cpu(reg);
81}
82
83static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev,
84 const unsigned int offset,
85 void *value, const u16 length)
86{
87 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
88 USB_VENDOR_REQUEST_IN, offset,
89 value, length,
90 REGISTER_TIMEOUT16(length));
91}
92
93static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
94 const unsigned int offset,
95 u16 value)
96{
97 __le16 reg = cpu_to_le16(value);
98 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
99 USB_VENDOR_REQUEST_OUT, offset,
100 ®, sizeof(reg), REGISTER_TIMEOUT);
101}
102
103static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
104 const unsigned int offset,
105 u16 value)
106{
107 __le16 reg = cpu_to_le16(value);
108 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
109 USB_VENDOR_REQUEST_OUT, offset,
110 ®, sizeof(reg), REGISTER_TIMEOUT);
111}
112
113static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
114 const unsigned int offset,
115 void *value, const u16 length)
116{
117 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
118 USB_VENDOR_REQUEST_OUT, offset,
119 value, length,
120 REGISTER_TIMEOUT16(length));
121}
122
123static int rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
124 const unsigned int offset,
125 struct rt2x00_field16 field,
126 u16 *reg)
127{
128 unsigned int i;
129
130 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
131 rt2500usb_register_read_lock(rt2x00dev, offset, reg);
132 if (!rt2x00_get_field16(*reg, field))
133 return 1;
134 udelay(REGISTER_BUSY_DELAY);
135 }
136
137 rt2x00_err(rt2x00dev, "Indirect register access failed: offset=0x%.08x, value=0x%.08x\n",
138 offset, *reg);
139 *reg = ~0;
140
141 return 0;
142}
143
144#define WAIT_FOR_BBP(__dev, __reg) \
145 rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg))
146#define WAIT_FOR_RF(__dev, __reg) \
147 rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg))
148
149static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
150 const unsigned int word, const u8 value)
151{
152 u16 reg;
153
154 mutex_lock(&rt2x00dev->csr_mutex);
155
156
157
158
159
160 if (WAIT_FOR_BBP(rt2x00dev, ®)) {
161 reg = 0;
162 rt2x00_set_field16(®, PHY_CSR7_DATA, value);
163 rt2x00_set_field16(®, PHY_CSR7_REG_ID, word);
164 rt2x00_set_field16(®, PHY_CSR7_READ_CONTROL, 0);
165
166 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
167 }
168
169 mutex_unlock(&rt2x00dev->csr_mutex);
170}
171
172static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
173 const unsigned int word, u8 *value)
174{
175 u16 reg;
176
177 mutex_lock(&rt2x00dev->csr_mutex);
178
179
180
181
182
183
184
185
186
187 if (WAIT_FOR_BBP(rt2x00dev, ®)) {
188 reg = 0;
189 rt2x00_set_field16(®, PHY_CSR7_REG_ID, word);
190 rt2x00_set_field16(®, PHY_CSR7_READ_CONTROL, 1);
191
192 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
193
194 if (WAIT_FOR_BBP(rt2x00dev, ®))
195 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, ®);
196 }
197
198 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
199
200 mutex_unlock(&rt2x00dev->csr_mutex);
201}
202
203static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
204 const unsigned int word, const u32 value)
205{
206 u16 reg;
207
208 mutex_lock(&rt2x00dev->csr_mutex);
209
210
211
212
213
214 if (WAIT_FOR_RF(rt2x00dev, ®)) {
215 reg = 0;
216 rt2x00_set_field16(®, PHY_CSR9_RF_VALUE, value);
217 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg);
218
219 reg = 0;
220 rt2x00_set_field16(®, PHY_CSR10_RF_VALUE, value >> 16);
221 rt2x00_set_field16(®, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
222 rt2x00_set_field16(®, PHY_CSR10_RF_IF_SELECT, 0);
223 rt2x00_set_field16(®, PHY_CSR10_RF_BUSY, 1);
224
225 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
226 rt2x00_rf_write(rt2x00dev, word, value);
227 }
228
229 mutex_unlock(&rt2x00dev->csr_mutex);
230}
231
232#ifdef CONFIG_RT2X00_LIB_DEBUGFS
233static void _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
234 const unsigned int offset,
235 u32 *value)
236{
237 rt2500usb_register_read(rt2x00dev, offset, (u16 *)value);
238}
239
240static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
241 const unsigned int offset,
242 u32 value)
243{
244 rt2500usb_register_write(rt2x00dev, offset, value);
245}
246
247static const struct rt2x00debug rt2500usb_rt2x00debug = {
248 .owner = THIS_MODULE,
249 .csr = {
250 .read = _rt2500usb_register_read,
251 .write = _rt2500usb_register_write,
252 .flags = RT2X00DEBUGFS_OFFSET,
253 .word_base = CSR_REG_BASE,
254 .word_size = sizeof(u16),
255 .word_count = CSR_REG_SIZE / sizeof(u16),
256 },
257 .eeprom = {
258 .read = rt2x00_eeprom_read,
259 .write = rt2x00_eeprom_write,
260 .word_base = EEPROM_BASE,
261 .word_size = sizeof(u16),
262 .word_count = EEPROM_SIZE / sizeof(u16),
263 },
264 .bbp = {
265 .read = rt2500usb_bbp_read,
266 .write = rt2500usb_bbp_write,
267 .word_base = BBP_BASE,
268 .word_size = sizeof(u8),
269 .word_count = BBP_SIZE / sizeof(u8),
270 },
271 .rf = {
272 .read = rt2x00_rf_read,
273 .write = rt2500usb_rf_write,
274 .word_base = RF_BASE,
275 .word_size = sizeof(u32),
276 .word_count = RF_SIZE / sizeof(u32),
277 },
278};
279#endif
280
281static int rt2500usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
282{
283 u16 reg;
284
285 rt2500usb_register_read(rt2x00dev, MAC_CSR19, ®);
286 return rt2x00_get_field16(reg, MAC_CSR19_VAL7);
287}
288
289#ifdef CONFIG_RT2X00_LIB_LEDS
290static void rt2500usb_brightness_set(struct led_classdev *led_cdev,
291 enum led_brightness brightness)
292{
293 struct rt2x00_led *led =
294 container_of(led_cdev, struct rt2x00_led, led_dev);
295 unsigned int enabled = brightness != LED_OFF;
296 u16 reg;
297
298 rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, ®);
299
300 if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC)
301 rt2x00_set_field16(®, MAC_CSR20_LINK, enabled);
302 else if (led->type == LED_TYPE_ACTIVITY)
303 rt2x00_set_field16(®, MAC_CSR20_ACTIVITY, enabled);
304
305 rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg);
306}
307
308static int rt2500usb_blink_set(struct led_classdev *led_cdev,
309 unsigned long *delay_on,
310 unsigned long *delay_off)
311{
312 struct rt2x00_led *led =
313 container_of(led_cdev, struct rt2x00_led, led_dev);
314 u16 reg;
315
316 rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, ®);
317 rt2x00_set_field16(®, MAC_CSR21_ON_PERIOD, *delay_on);
318 rt2x00_set_field16(®, MAC_CSR21_OFF_PERIOD, *delay_off);
319 rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg);
320
321 return 0;
322}
323
324static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev,
325 struct rt2x00_led *led,
326 enum led_type type)
327{
328 led->rt2x00dev = rt2x00dev;
329 led->type = type;
330 led->led_dev.brightness_set = rt2500usb_brightness_set;
331 led->led_dev.blink_set = rt2500usb_blink_set;
332 led->flags = LED_INITIALIZED;
333}
334#endif
335
336
337
338
339
340
341
342
343
344static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
345 struct rt2x00lib_crypto *crypto,
346 struct ieee80211_key_conf *key)
347{
348 u32 mask;
349 u16 reg;
350 enum cipher curr_cipher;
351
352 if (crypto->cmd == SET_KEY) {
353
354
355
356
357
358 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
359 key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
360 key->keyidx != 0)
361 return -EOPNOTSUPP;
362
363
364
365
366
367
368 mask = TXRX_CSR0_KEY_ID.bit_mask;
369
370 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®);
371 curr_cipher = rt2x00_get_field16(reg, TXRX_CSR0_ALGORITHM);
372 reg &= mask;
373
374 if (reg && reg == mask)
375 return -ENOSPC;
376
377 reg = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
378
379 key->hw_key_idx += reg ? ffz(reg) : 0;
380
381
382
383
384
385
386 if (key->hw_key_idx > 0 && crypto->cipher != curr_cipher)
387 return -EOPNOTSUPP;
388
389 rt2500usb_register_multiwrite(rt2x00dev, KEY_ENTRY(key->hw_key_idx),
390 crypto->key, sizeof(crypto->key));
391
392
393
394
395
396
397
398
399
400
401 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
402 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
403 }
404
405
406
407
408
409 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®);
410 rt2x00_set_field16(®, TXRX_CSR0_ALGORITHM, crypto->cipher);
411 rt2x00_set_field16(®, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
412
413 mask = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
414 if (crypto->cmd == SET_KEY)
415 mask |= 1 << key->hw_key_idx;
416 else if (crypto->cmd == DISABLE_KEY)
417 mask &= ~(1 << key->hw_key_idx);
418 rt2x00_set_field16(®, TXRX_CSR0_KEY_ID, mask);
419 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
420
421 return 0;
422}
423
424static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev,
425 const unsigned int filter_flags)
426{
427 u16 reg;
428
429
430
431
432
433
434
435 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®);
436 rt2x00_set_field16(®, TXRX_CSR2_DROP_CRC,
437 !(filter_flags & FIF_FCSFAIL));
438 rt2x00_set_field16(®, TXRX_CSR2_DROP_PHYSICAL,
439 !(filter_flags & FIF_PLCPFAIL));
440 rt2x00_set_field16(®, TXRX_CSR2_DROP_CONTROL,
441 !(filter_flags & FIF_CONTROL));
442 rt2x00_set_field16(®, TXRX_CSR2_DROP_NOT_TO_ME,
443 !(filter_flags & FIF_PROMISC_IN_BSS));
444 rt2x00_set_field16(®, TXRX_CSR2_DROP_TODS,
445 !(filter_flags & FIF_PROMISC_IN_BSS) &&
446 !rt2x00dev->intf_ap_count);
447 rt2x00_set_field16(®, TXRX_CSR2_DROP_VERSION_ERROR, 1);
448 rt2x00_set_field16(®, TXRX_CSR2_DROP_MULTICAST,
449 !(filter_flags & FIF_ALLMULTI));
450 rt2x00_set_field16(®, TXRX_CSR2_DROP_BROADCAST, 0);
451 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
452}
453
454static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
455 struct rt2x00_intf *intf,
456 struct rt2x00intf_conf *conf,
457 const unsigned int flags)
458{
459 unsigned int bcn_preload;
460 u16 reg;
461
462 if (flags & CONFIG_UPDATE_TYPE) {
463
464
465
466 bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20);
467 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, ®);
468 rt2x00_set_field16(®, TXRX_CSR20_OFFSET, bcn_preload >> 6);
469 rt2x00_set_field16(®, TXRX_CSR20_BCN_EXPECT_WINDOW,
470 2 * (conf->type != NL80211_IFTYPE_STATION));
471 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
472
473
474
475
476 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, ®);
477 rt2x00_set_field16(®, TXRX_CSR18_OFFSET, 0);
478 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
479
480 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®);
481 rt2x00_set_field16(®, TXRX_CSR19_TSF_SYNC, conf->sync);
482 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
483 }
484
485 if (flags & CONFIG_UPDATE_MAC)
486 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac,
487 (3 * sizeof(__le16)));
488
489 if (flags & CONFIG_UPDATE_BSSID)
490 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid,
491 (3 * sizeof(__le16)));
492}
493
494static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
495 struct rt2x00lib_erp *erp,
496 u32 changed)
497{
498 u16 reg;
499
500 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
501 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, ®);
502 rt2x00_set_field16(®, TXRX_CSR10_AUTORESPOND_PREAMBLE,
503 !!erp->short_preamble);
504 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
505 }
506
507 if (changed & BSS_CHANGED_BASIC_RATES)
508 rt2500usb_register_write(rt2x00dev, TXRX_CSR11,
509 erp->basic_rates);
510
511 if (changed & BSS_CHANGED_BEACON_INT) {
512 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, ®);
513 rt2x00_set_field16(®, TXRX_CSR18_INTERVAL,
514 erp->beacon_int * 4);
515 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
516 }
517
518 if (changed & BSS_CHANGED_ERP_SLOT) {
519 rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time);
520 rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs);
521 rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs);
522 }
523}
524
525static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev,
526 struct antenna_setup *ant)
527{
528 u8 r2;
529 u8 r14;
530 u16 csr5;
531 u16 csr6;
532
533
534
535
536
537 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
538 ant->tx == ANTENNA_SW_DIVERSITY);
539
540 rt2500usb_bbp_read(rt2x00dev, 2, &r2);
541 rt2500usb_bbp_read(rt2x00dev, 14, &r14);
542 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
543 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
544
545
546
547
548 switch (ant->tx) {
549 case ANTENNA_HW_DIVERSITY:
550 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
551 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
552 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
553 break;
554 case ANTENNA_A:
555 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
556 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
557 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
558 break;
559 case ANTENNA_B:
560 default:
561 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
562 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
563 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
564 break;
565 }
566
567
568
569
570 switch (ant->rx) {
571 case ANTENNA_HW_DIVERSITY:
572 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
573 break;
574 case ANTENNA_A:
575 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
576 break;
577 case ANTENNA_B:
578 default:
579 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
580 break;
581 }
582
583
584
585
586 if (rt2x00_rf(rt2x00dev, RF2525E) || rt2x00_rf(rt2x00dev, RF5222)) {
587 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
588 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
589 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
590
591
592
593
594 if (rt2x00_rf(rt2x00dev, RF2525E))
595 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
596 } else {
597 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
598 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
599 }
600
601 rt2500usb_bbp_write(rt2x00dev, 2, r2);
602 rt2500usb_bbp_write(rt2x00dev, 14, r14);
603 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
604 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
605}
606
607static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
608 struct rf_channel *rf, const int txpower)
609{
610
611
612
613 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
614
615
616
617
618 if (rt2x00_rf(rt2x00dev, RF2525E)) {
619 static const u32 vals[] = {
620 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
621 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
622 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
623 0x00000902, 0x00000906
624 };
625
626 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
627 if (rf->rf4)
628 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
629 }
630
631 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
632 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
633 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
634 if (rf->rf4)
635 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
636}
637
638static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
639 const int txpower)
640{
641 u32 rf3;
642
643 rt2x00_rf_read(rt2x00dev, 3, &rf3);
644 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
645 rt2500usb_rf_write(rt2x00dev, 3, rf3);
646}
647
648static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev,
649 struct rt2x00lib_conf *libconf)
650{
651 enum dev_state state =
652 (libconf->conf->flags & IEEE80211_CONF_PS) ?
653 STATE_SLEEP : STATE_AWAKE;
654 u16 reg;
655
656 if (state == STATE_SLEEP) {
657 rt2500usb_register_read(rt2x00dev, MAC_CSR18, ®);
658 rt2x00_set_field16(®, MAC_CSR18_DELAY_AFTER_BEACON,
659 rt2x00dev->beacon_int - 20);
660 rt2x00_set_field16(®, MAC_CSR18_BEACONS_BEFORE_WAKEUP,
661 libconf->conf->listen_interval - 1);
662
663
664 rt2x00_set_field16(®, MAC_CSR18_AUTO_WAKE, 0);
665 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
666
667 rt2x00_set_field16(®, MAC_CSR18_AUTO_WAKE, 1);
668 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
669 } else {
670 rt2500usb_register_read(rt2x00dev, MAC_CSR18, ®);
671 rt2x00_set_field16(®, MAC_CSR18_AUTO_WAKE, 0);
672 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
673 }
674
675 rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
676}
677
678static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
679 struct rt2x00lib_conf *libconf,
680 const unsigned int flags)
681{
682 if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
683 rt2500usb_config_channel(rt2x00dev, &libconf->rf,
684 libconf->conf->power_level);
685 if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
686 !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
687 rt2500usb_config_txpower(rt2x00dev,
688 libconf->conf->power_level);
689 if (flags & IEEE80211_CONF_CHANGE_PS)
690 rt2500usb_config_ps(rt2x00dev, libconf);
691}
692
693
694
695
696static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
697 struct link_qual *qual)
698{
699 u16 reg;
700
701
702
703
704 rt2500usb_register_read(rt2x00dev, STA_CSR0, ®);
705 qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
706
707
708
709
710 rt2500usb_register_read(rt2x00dev, STA_CSR3, ®);
711 qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
712}
713
714static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev,
715 struct link_qual *qual)
716{
717 u16 eeprom;
718 u16 value;
719
720 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
721 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
722 rt2500usb_bbp_write(rt2x00dev, 24, value);
723
724 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
725 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
726 rt2500usb_bbp_write(rt2x00dev, 25, value);
727
728 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
729 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
730 rt2500usb_bbp_write(rt2x00dev, 61, value);
731
732 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
733 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
734 rt2500usb_bbp_write(rt2x00dev, 17, value);
735
736 qual->vgc_level = value;
737}
738
739
740
741
742static void rt2500usb_start_queue(struct data_queue *queue)
743{
744 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
745 u16 reg;
746
747 switch (queue->qid) {
748 case QID_RX:
749 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®);
750 rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX, 0);
751 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
752 break;
753 case QID_BEACON:
754 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®);
755 rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 1);
756 rt2x00_set_field16(®, TXRX_CSR19_TBCN, 1);
757 rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 1);
758 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
759 break;
760 default:
761 break;
762 }
763}
764
765static void rt2500usb_stop_queue(struct data_queue *queue)
766{
767 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
768 u16 reg;
769
770 switch (queue->qid) {
771 case QID_RX:
772 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®);
773 rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX, 1);
774 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
775 break;
776 case QID_BEACON:
777 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®);
778 rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 0);
779 rt2x00_set_field16(®, TXRX_CSR19_TBCN, 0);
780 rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 0);
781 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
782 break;
783 default:
784 break;
785 }
786}
787
788
789
790
791static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
792{
793 u16 reg;
794
795 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
796 USB_MODE_TEST, REGISTER_TIMEOUT);
797 rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
798 0x00f0, REGISTER_TIMEOUT);
799
800 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®);
801 rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX, 1);
802 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
803
804 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
805 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
806
807 rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®);
808 rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 1);
809 rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 1);
810 rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 0);
811 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
812
813 rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®);
814 rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 0);
815 rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 0);
816 rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 0);
817 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
818
819 rt2500usb_register_read(rt2x00dev, TXRX_CSR5, ®);
820 rt2x00_set_field16(®, TXRX_CSR5_BBP_ID0, 13);
821 rt2x00_set_field16(®, TXRX_CSR5_BBP_ID0_VALID, 1);
822 rt2x00_set_field16(®, TXRX_CSR5_BBP_ID1, 12);
823 rt2x00_set_field16(®, TXRX_CSR5_BBP_ID1_VALID, 1);
824 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
825
826 rt2500usb_register_read(rt2x00dev, TXRX_CSR6, ®);
827 rt2x00_set_field16(®, TXRX_CSR6_BBP_ID0, 10);
828 rt2x00_set_field16(®, TXRX_CSR6_BBP_ID0_VALID, 1);
829 rt2x00_set_field16(®, TXRX_CSR6_BBP_ID1, 11);
830 rt2x00_set_field16(®, TXRX_CSR6_BBP_ID1_VALID, 1);
831 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
832
833 rt2500usb_register_read(rt2x00dev, TXRX_CSR7, ®);
834 rt2x00_set_field16(®, TXRX_CSR7_BBP_ID0, 7);
835 rt2x00_set_field16(®, TXRX_CSR7_BBP_ID0_VALID, 1);
836 rt2x00_set_field16(®, TXRX_CSR7_BBP_ID1, 6);
837 rt2x00_set_field16(®, TXRX_CSR7_BBP_ID1_VALID, 1);
838 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
839
840 rt2500usb_register_read(rt2x00dev, TXRX_CSR8, ®);
841 rt2x00_set_field16(®, TXRX_CSR8_BBP_ID0, 5);
842 rt2x00_set_field16(®, TXRX_CSR8_BBP_ID0_VALID, 1);
843 rt2x00_set_field16(®, TXRX_CSR8_BBP_ID1, 0);
844 rt2x00_set_field16(®, TXRX_CSR8_BBP_ID1_VALID, 0);
845 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
846
847 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®);
848 rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 0);
849 rt2x00_set_field16(®, TXRX_CSR19_TSF_SYNC, 0);
850 rt2x00_set_field16(®, TXRX_CSR19_TBCN, 0);
851 rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 0);
852 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
853
854 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
855 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
856
857 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
858 return -EBUSY;
859
860 rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®);
861 rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 0);
862 rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 0);
863 rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 1);
864 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
865
866 if (rt2x00_rev(rt2x00dev) >= RT2570_VERSION_C) {
867 rt2500usb_register_read(rt2x00dev, PHY_CSR2, ®);
868 rt2x00_set_field16(®, PHY_CSR2_LNA, 0);
869 } else {
870 reg = 0;
871 rt2x00_set_field16(®, PHY_CSR2_LNA, 1);
872 rt2x00_set_field16(®, PHY_CSR2_LNA_MODE, 3);
873 }
874 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
875
876 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
877 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
878 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
879 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
880
881 rt2500usb_register_read(rt2x00dev, MAC_CSR8, ®);
882 rt2x00_set_field16(®, MAC_CSR8_MAX_FRAME_UNIT,
883 rt2x00dev->rx->data_size);
884 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
885
886 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®);
887 rt2x00_set_field16(®, TXRX_CSR0_ALGORITHM, CIPHER_NONE);
888 rt2x00_set_field16(®, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
889 rt2x00_set_field16(®, TXRX_CSR0_KEY_ID, 0);
890 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
891
892 rt2500usb_register_read(rt2x00dev, MAC_CSR18, ®);
893 rt2x00_set_field16(®, MAC_CSR18_DELAY_AFTER_BEACON, 90);
894 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
895
896 rt2500usb_register_read(rt2x00dev, PHY_CSR4, ®);
897 rt2x00_set_field16(®, PHY_CSR4_LOW_RF_LE, 1);
898 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
899
900 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, ®);
901 rt2x00_set_field16(®, TXRX_CSR1_AUTO_SEQUENCE, 1);
902 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
903
904 return 0;
905}
906
907static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
908{
909 unsigned int i;
910 u8 value;
911
912 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
913 rt2500usb_bbp_read(rt2x00dev, 0, &value);
914 if ((value != 0xff) && (value != 0x00))
915 return 0;
916 udelay(REGISTER_BUSY_DELAY);
917 }
918
919 rt2x00_err(rt2x00dev, "BBP register access failed, aborting\n");
920 return -EACCES;
921}
922
923static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
924{
925 unsigned int i;
926 u16 eeprom;
927 u8 value;
928 u8 reg_id;
929
930 if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev)))
931 return -EACCES;
932
933 rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
934 rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
935 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
936 rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
937 rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
938 rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
939 rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
940 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
941 rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
942 rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
943 rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
944 rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
945 rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
946 rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
947 rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
948 rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
949 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
950 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
951 rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
952 rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
953 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
954 rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
955 rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
956 rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
957 rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
958 rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
959 rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
960 rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
961 rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
962 rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
963 rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
964
965 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
966 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
967
968 if (eeprom != 0xffff && eeprom != 0x0000) {
969 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
970 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
971 rt2500usb_bbp_write(rt2x00dev, reg_id, value);
972 }
973 }
974
975 return 0;
976}
977
978
979
980
981static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
982{
983
984
985
986 if (unlikely(rt2500usb_init_registers(rt2x00dev) ||
987 rt2500usb_init_bbp(rt2x00dev)))
988 return -EIO;
989
990 return 0;
991}
992
993static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
994{
995 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
996 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
997
998
999
1000
1001 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1002
1003 rt2x00usb_disable_radio(rt2x00dev);
1004}
1005
1006static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
1007 enum dev_state state)
1008{
1009 u16 reg;
1010 u16 reg2;
1011 unsigned int i;
1012 char put_to_sleep;
1013 char bbp_state;
1014 char rf_state;
1015
1016 put_to_sleep = (state != STATE_AWAKE);
1017
1018 reg = 0;
1019 rt2x00_set_field16(®, MAC_CSR17_BBP_DESIRE_STATE, state);
1020 rt2x00_set_field16(®, MAC_CSR17_RF_DESIRE_STATE, state);
1021 rt2x00_set_field16(®, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
1022 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1023 rt2x00_set_field16(®, MAC_CSR17_SET_STATE, 1);
1024 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1025
1026
1027
1028
1029
1030
1031 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1032 rt2500usb_register_read(rt2x00dev, MAC_CSR17, ®2);
1033 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
1034 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
1035 if (bbp_state == state && rf_state == state)
1036 return 0;
1037 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1038 msleep(30);
1039 }
1040
1041 return -EBUSY;
1042}
1043
1044static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1045 enum dev_state state)
1046{
1047 int retval = 0;
1048
1049 switch (state) {
1050 case STATE_RADIO_ON:
1051 retval = rt2500usb_enable_radio(rt2x00dev);
1052 break;
1053 case STATE_RADIO_OFF:
1054 rt2500usb_disable_radio(rt2x00dev);
1055 break;
1056 case STATE_RADIO_IRQ_ON:
1057 case STATE_RADIO_IRQ_OFF:
1058
1059 break;
1060 case STATE_DEEP_SLEEP:
1061 case STATE_SLEEP:
1062 case STATE_STANDBY:
1063 case STATE_AWAKE:
1064 retval = rt2500usb_set_state(rt2x00dev, state);
1065 break;
1066 default:
1067 retval = -ENOTSUPP;
1068 break;
1069 }
1070
1071 if (unlikely(retval))
1072 rt2x00_err(rt2x00dev, "Device failed to enter state %d (%d)\n",
1073 state, retval);
1074
1075 return retval;
1076}
1077
1078
1079
1080
1081static void rt2500usb_write_tx_desc(struct queue_entry *entry,
1082 struct txentry_desc *txdesc)
1083{
1084 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1085 __le32 *txd = (__le32 *) entry->skb->data;
1086 u32 word;
1087
1088
1089
1090
1091 rt2x00_desc_read(txd, 0, &word);
1092 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit);
1093 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1094 test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
1095 rt2x00_set_field32(&word, TXD_W0_ACK,
1096 test_bit(ENTRY_TXD_ACK, &txdesc->flags));
1097 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1098 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
1099 rt2x00_set_field32(&word, TXD_W0_OFDM,
1100 (txdesc->rate_mode == RATE_MODE_OFDM));
1101 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
1102 test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags));
1103 rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->u.plcp.ifs);
1104 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, txdesc->length);
1105 rt2x00_set_field32(&word, TXD_W0_CIPHER, !!txdesc->cipher);
1106 rt2x00_set_field32(&word, TXD_W0_KEY_ID, txdesc->key_idx);
1107 rt2x00_desc_write(txd, 0, word);
1108
1109 rt2x00_desc_read(txd, 1, &word);
1110 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset);
1111 rt2x00_set_field32(&word, TXD_W1_AIFS, entry->queue->aifs);
1112 rt2x00_set_field32(&word, TXD_W1_CWMIN, entry->queue->cw_min);
1113 rt2x00_set_field32(&word, TXD_W1_CWMAX, entry->queue->cw_max);
1114 rt2x00_desc_write(txd, 1, word);
1115
1116 rt2x00_desc_read(txd, 2, &word);
1117 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->u.plcp.signal);
1118 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->u.plcp.service);
1119 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW,
1120 txdesc->u.plcp.length_low);
1121 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH,
1122 txdesc->u.plcp.length_high);
1123 rt2x00_desc_write(txd, 2, word);
1124
1125 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) {
1126 _rt2x00_desc_write(txd, 3, skbdesc->iv[0]);
1127 _rt2x00_desc_write(txd, 4, skbdesc->iv[1]);
1128 }
1129
1130
1131
1132
1133 skbdesc->flags |= SKBDESC_DESC_IN_SKB;
1134 skbdesc->desc = txd;
1135 skbdesc->desc_len = TXD_DESC_SIZE;
1136}
1137
1138
1139
1140
1141static void rt2500usb_beacondone(struct urb *urb);
1142
1143static void rt2500usb_write_beacon(struct queue_entry *entry,
1144 struct txentry_desc *txdesc)
1145{
1146 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1147 struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev);
1148 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
1149 int pipe = usb_sndbulkpipe(usb_dev, entry->queue->usb_endpoint);
1150 int length;
1151 u16 reg, reg0;
1152
1153
1154
1155
1156
1157 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®);
1158 rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 0);
1159 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1160
1161
1162
1163
1164 skb_push(entry->skb, TXD_DESC_SIZE);
1165 memset(entry->skb->data, 0, TXD_DESC_SIZE);
1166
1167
1168
1169
1170 rt2500usb_write_tx_desc(entry, txdesc);
1171
1172
1173
1174
1175 rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_BEACON, entry->skb);
1176
1177
1178
1179
1180
1181
1182 length = rt2x00dev->ops->lib->get_tx_data_len(entry);
1183
1184 usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe,
1185 entry->skb->data, length, rt2500usb_beacondone,
1186 entry);
1187
1188
1189
1190
1191
1192
1193 bcn_priv->guardian_data = 0;
1194 usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe,
1195 &bcn_priv->guardian_data, 1, rt2500usb_beacondone,
1196 entry);
1197
1198
1199
1200
1201 usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC);
1202
1203
1204
1205
1206 rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 1);
1207 rt2x00_set_field16(®, TXRX_CSR19_TBCN, 1);
1208 reg0 = reg;
1209 rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 1);
1210
1211
1212
1213
1214
1215
1216
1217 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1218 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
1219 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1220 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
1221 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1222}
1223
1224static int rt2500usb_get_tx_data_len(struct queue_entry *entry)
1225{
1226 int length;
1227
1228
1229
1230
1231
1232 length = roundup(entry->skb->len, 2);
1233 length += (2 * !(length % entry->queue->usb_maxpacket));
1234
1235 return length;
1236}
1237
1238
1239
1240
1241static void rt2500usb_fill_rxdone(struct queue_entry *entry,
1242 struct rxdone_entry_desc *rxdesc)
1243{
1244 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1245 struct queue_entry_priv_usb *entry_priv = entry->priv_data;
1246 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1247 __le32 *rxd =
1248 (__le32 *)(entry->skb->data +
1249 (entry_priv->urb->actual_length -
1250 entry->queue->desc_size));
1251 u32 word0;
1252 u32 word1;
1253
1254
1255
1256
1257
1258 memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
1259 rxd = (__le32 *)skbdesc->desc;
1260
1261
1262
1263
1264 rt2x00_desc_read(rxd, 0, &word0);
1265 rt2x00_desc_read(rxd, 1, &word1);
1266
1267 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1268 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
1269 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
1270 rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
1271
1272 rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER);
1273 if (rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR))
1274 rxdesc->cipher_status = RX_CRYPTO_FAIL_KEY;
1275
1276 if (rxdesc->cipher != CIPHER_NONE) {
1277 _rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]);
1278 _rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]);
1279 rxdesc->dev_flags |= RXDONE_CRYPTO_IV;
1280
1281
1282
1283 rxdesc->flags |= RX_FLAG_MMIC_STRIPPED;
1284 if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
1285 rxdesc->flags |= RX_FLAG_DECRYPTED;
1286 else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
1287 rxdesc->flags |= RX_FLAG_MMIC_ERROR;
1288 }
1289
1290
1291
1292
1293
1294
1295
1296 rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1297 rxdesc->rssi =
1298 rt2x00_get_field32(word1, RXD_W1_RSSI) - rt2x00dev->rssi_offset;
1299 rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
1300
1301 if (rt2x00_get_field32(word0, RXD_W0_OFDM))
1302 rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
1303 else
1304 rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE;
1305 if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
1306 rxdesc->dev_flags |= RXDONE_MY_BSS;
1307
1308
1309
1310
1311 skb_trim(entry->skb, rxdesc->size);
1312}
1313
1314
1315
1316
1317static void rt2500usb_beacondone(struct urb *urb)
1318{
1319 struct queue_entry *entry = (struct queue_entry *)urb->context;
1320 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
1321
1322 if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags))
1323 return;
1324
1325
1326
1327
1328
1329
1330
1331 if (bcn_priv->guardian_urb == urb) {
1332 usb_submit_urb(bcn_priv->urb, GFP_ATOMIC);
1333 } else if (bcn_priv->urb == urb) {
1334 dev_kfree_skb(entry->skb);
1335 entry->skb = NULL;
1336 }
1337}
1338
1339
1340
1341
1342static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1343{
1344 u16 word;
1345 u8 *mac;
1346 u8 bbp;
1347
1348 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1349
1350
1351
1352
1353 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1354 if (!is_valid_ether_addr(mac)) {
1355 eth_random_addr(mac);
1356 rt2x00_eeprom_dbg(rt2x00dev, "MAC: %pM\n", mac);
1357 }
1358
1359 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1360 if (word == 0xffff) {
1361 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1362 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1363 ANTENNA_SW_DIVERSITY);
1364 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1365 ANTENNA_SW_DIVERSITY);
1366 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
1367 LED_MODE_DEFAULT);
1368 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1369 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1370 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1371 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1372 rt2x00_eeprom_dbg(rt2x00dev, "Antenna: 0x%04x\n", word);
1373 }
1374
1375 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1376 if (word == 0xffff) {
1377 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1378 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1379 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1380 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1381 rt2x00_eeprom_dbg(rt2x00dev, "NIC: 0x%04x\n", word);
1382 }
1383
1384 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
1385 if (word == 0xffff) {
1386 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1387 DEFAULT_RSSI_OFFSET);
1388 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
1389 rt2x00_eeprom_dbg(rt2x00dev, "Calibrate offset: 0x%04x\n",
1390 word);
1391 }
1392
1393 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
1394 if (word == 0xffff) {
1395 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1396 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
1397 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune: 0x%04x\n", word);
1398 }
1399
1400
1401
1402
1403
1404 rt2500usb_bbp_read(rt2x00dev, 17, &bbp);
1405 bbp -= 6;
1406
1407 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
1408 if (word == 0xffff) {
1409 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
1410 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1411 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1412 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
1413 } else {
1414 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1415 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1416 }
1417
1418 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
1419 if (word == 0xffff) {
1420 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1421 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1422 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
1423 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
1424 }
1425
1426 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
1427 if (word == 0xffff) {
1428 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1429 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1430 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
1431 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1432 }
1433
1434 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
1435 if (word == 0xffff) {
1436 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1437 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1438 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
1439 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1440 }
1441
1442 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
1443 if (word == 0xffff) {
1444 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1445 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1446 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
1447 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1448 }
1449
1450 return 0;
1451}
1452
1453static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1454{
1455 u16 reg;
1456 u16 value;
1457 u16 eeprom;
1458
1459
1460
1461
1462 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1463
1464
1465
1466
1467 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1468 rt2500usb_register_read(rt2x00dev, MAC_CSR0, ®);
1469 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1470
1471 if (((reg & 0xfff0) != 0) || ((reg & 0x0000000f) == 0)) {
1472 rt2x00_err(rt2x00dev, "Invalid RT chipset detected\n");
1473 return -ENODEV;
1474 }
1475
1476 if (!rt2x00_rf(rt2x00dev, RF2522) &&
1477 !rt2x00_rf(rt2x00dev, RF2523) &&
1478 !rt2x00_rf(rt2x00dev, RF2524) &&
1479 !rt2x00_rf(rt2x00dev, RF2525) &&
1480 !rt2x00_rf(rt2x00dev, RF2525E) &&
1481 !rt2x00_rf(rt2x00dev, RF5222)) {
1482 rt2x00_err(rt2x00dev, "Invalid RF chipset detected\n");
1483 return -ENODEV;
1484 }
1485
1486
1487
1488
1489 rt2x00dev->default_ant.tx =
1490 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
1491 rt2x00dev->default_ant.rx =
1492 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1493
1494
1495
1496
1497
1498
1499
1500 if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
1501 rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
1502 if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
1503 rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
1504
1505
1506
1507
1508#ifdef CONFIG_RT2X00_LIB_LEDS
1509 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
1510
1511 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
1512 if (value == LED_MODE_TXRX_ACTIVITY ||
1513 value == LED_MODE_DEFAULT ||
1514 value == LED_MODE_ASUS)
1515 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual,
1516 LED_TYPE_ACTIVITY);
1517#endif
1518
1519
1520
1521
1522 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO))
1523 __set_bit(CAPABILITY_HW_BUTTON, &rt2x00dev->cap_flags);
1524
1525
1526
1527
1528 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
1529 rt2x00dev->rssi_offset =
1530 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1531
1532 return 0;
1533}
1534
1535
1536
1537
1538
1539static const struct rf_channel rf_vals_bg_2522[] = {
1540 { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
1541 { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
1542 { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
1543 { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
1544 { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
1545 { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
1546 { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
1547 { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
1548 { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
1549 { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
1550 { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
1551 { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
1552 { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
1553 { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
1554};
1555
1556
1557
1558
1559
1560static const struct rf_channel rf_vals_bg_2523[] = {
1561 { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
1562 { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
1563 { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
1564 { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
1565 { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
1566 { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
1567 { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
1568 { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
1569 { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
1570 { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
1571 { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
1572 { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
1573 { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
1574 { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
1575};
1576
1577
1578
1579
1580
1581static const struct rf_channel rf_vals_bg_2524[] = {
1582 { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
1583 { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
1584 { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
1585 { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
1586 { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
1587 { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
1588 { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
1589 { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
1590 { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
1591 { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
1592 { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
1593 { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
1594 { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
1595 { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
1596};
1597
1598
1599
1600
1601
1602static const struct rf_channel rf_vals_bg_2525[] = {
1603 { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
1604 { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
1605 { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
1606 { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
1607 { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
1608 { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
1609 { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
1610 { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
1611 { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
1612 { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
1613 { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
1614 { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
1615 { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
1616 { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
1617};
1618
1619
1620
1621
1622
1623static const struct rf_channel rf_vals_bg_2525e[] = {
1624 { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
1625 { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
1626 { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
1627 { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
1628 { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
1629 { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
1630 { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
1631 { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
1632 { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
1633 { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
1634 { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
1635 { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
1636 { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
1637 { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
1638};
1639
1640
1641
1642
1643
1644static const struct rf_channel rf_vals_5222[] = {
1645 { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
1646 { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
1647 { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
1648 { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
1649 { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
1650 { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
1651 { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
1652 { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
1653 { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
1654 { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
1655 { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
1656 { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
1657 { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
1658 { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
1659
1660
1661 { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
1662 { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
1663 { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
1664 { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
1665 { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
1666 { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
1667 { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
1668 { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
1669
1670
1671 { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
1672 { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
1673 { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
1674 { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
1675 { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
1676 { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
1677 { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
1678 { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
1679 { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
1680 { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
1681
1682
1683 { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
1684 { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
1685 { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
1686 { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
1687 { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
1688};
1689
1690static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1691{
1692 struct hw_mode_spec *spec = &rt2x00dev->spec;
1693 struct channel_info *info;
1694 char *tx_power;
1695 unsigned int i;
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706 rt2x00dev->hw->flags =
1707 IEEE80211_HW_RX_INCLUDES_FCS |
1708 IEEE80211_HW_SIGNAL_DBM |
1709 IEEE80211_HW_SUPPORTS_PS |
1710 IEEE80211_HW_PS_NULLFUNC_STACK;
1711
1712 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
1713 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1714 rt2x00_eeprom_addr(rt2x00dev,
1715 EEPROM_MAC_ADDR_0));
1716
1717
1718
1719
1720 spec->supported_bands = SUPPORT_BAND_2GHZ;
1721 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
1722
1723 if (rt2x00_rf(rt2x00dev, RF2522)) {
1724 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1725 spec->channels = rf_vals_bg_2522;
1726 } else if (rt2x00_rf(rt2x00dev, RF2523)) {
1727 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1728 spec->channels = rf_vals_bg_2523;
1729 } else if (rt2x00_rf(rt2x00dev, RF2524)) {
1730 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1731 spec->channels = rf_vals_bg_2524;
1732 } else if (rt2x00_rf(rt2x00dev, RF2525)) {
1733 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1734 spec->channels = rf_vals_bg_2525;
1735 } else if (rt2x00_rf(rt2x00dev, RF2525E)) {
1736 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1737 spec->channels = rf_vals_bg_2525e;
1738 } else if (rt2x00_rf(rt2x00dev, RF5222)) {
1739 spec->supported_bands |= SUPPORT_BAND_5GHZ;
1740 spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1741 spec->channels = rf_vals_5222;
1742 }
1743
1744
1745
1746
1747 info = kcalloc(spec->num_channels, sizeof(*info), GFP_KERNEL);
1748 if (!info)
1749 return -ENOMEM;
1750
1751 spec->channels_info = info;
1752
1753 tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
1754 for (i = 0; i < 14; i++) {
1755 info[i].max_power = MAX_TXPOWER;
1756 info[i].default_power1 = TXPOWER_FROM_DEV(tx_power[i]);
1757 }
1758
1759 if (spec->num_channels > 14) {
1760 for (i = 14; i < spec->num_channels; i++) {
1761 info[i].max_power = MAX_TXPOWER;
1762 info[i].default_power1 = DEFAULT_TXPOWER;
1763 }
1764 }
1765
1766 return 0;
1767}
1768
1769static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1770{
1771 int retval;
1772 u16 reg;
1773
1774
1775
1776
1777 retval = rt2500usb_validate_eeprom(rt2x00dev);
1778 if (retval)
1779 return retval;
1780
1781 retval = rt2500usb_init_eeprom(rt2x00dev);
1782 if (retval)
1783 return retval;
1784
1785
1786
1787
1788
1789 rt2500usb_register_read(rt2x00dev, MAC_CSR19, ®);
1790 rt2x00_set_field16(®, MAC_CSR19_DIR0, 0);
1791 rt2500usb_register_write(rt2x00dev, MAC_CSR19, reg);
1792
1793
1794
1795
1796 retval = rt2500usb_probe_hw_mode(rt2x00dev);
1797 if (retval)
1798 return retval;
1799
1800
1801
1802
1803 __set_bit(REQUIRE_ATIM_QUEUE, &rt2x00dev->cap_flags);
1804 __set_bit(REQUIRE_BEACON_GUARD, &rt2x00dev->cap_flags);
1805 if (!modparam_nohwcrypt) {
1806 __set_bit(CAPABILITY_HW_CRYPTO, &rt2x00dev->cap_flags);
1807 __set_bit(REQUIRE_COPY_IV, &rt2x00dev->cap_flags);
1808 }
1809 __set_bit(REQUIRE_SW_SEQNO, &rt2x00dev->cap_flags);
1810 __set_bit(REQUIRE_PS_AUTOWAKE, &rt2x00dev->cap_flags);
1811
1812
1813
1814
1815 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1816
1817 return 0;
1818}
1819
1820static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1821 .tx = rt2x00mac_tx,
1822 .start = rt2x00mac_start,
1823 .stop = rt2x00mac_stop,
1824 .add_interface = rt2x00mac_add_interface,
1825 .remove_interface = rt2x00mac_remove_interface,
1826 .config = rt2x00mac_config,
1827 .configure_filter = rt2x00mac_configure_filter,
1828 .set_tim = rt2x00mac_set_tim,
1829 .set_key = rt2x00mac_set_key,
1830 .sw_scan_start = rt2x00mac_sw_scan_start,
1831 .sw_scan_complete = rt2x00mac_sw_scan_complete,
1832 .get_stats = rt2x00mac_get_stats,
1833 .bss_info_changed = rt2x00mac_bss_info_changed,
1834 .conf_tx = rt2x00mac_conf_tx,
1835 .rfkill_poll = rt2x00mac_rfkill_poll,
1836 .flush = rt2x00mac_flush,
1837 .set_antenna = rt2x00mac_set_antenna,
1838 .get_antenna = rt2x00mac_get_antenna,
1839 .get_ringparam = rt2x00mac_get_ringparam,
1840 .tx_frames_pending = rt2x00mac_tx_frames_pending,
1841};
1842
1843static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1844 .probe_hw = rt2500usb_probe_hw,
1845 .initialize = rt2x00usb_initialize,
1846 .uninitialize = rt2x00usb_uninitialize,
1847 .clear_entry = rt2x00usb_clear_entry,
1848 .set_device_state = rt2500usb_set_device_state,
1849 .rfkill_poll = rt2500usb_rfkill_poll,
1850 .link_stats = rt2500usb_link_stats,
1851 .reset_tuner = rt2500usb_reset_tuner,
1852 .watchdog = rt2x00usb_watchdog,
1853 .start_queue = rt2500usb_start_queue,
1854 .kick_queue = rt2x00usb_kick_queue,
1855 .stop_queue = rt2500usb_stop_queue,
1856 .flush_queue = rt2x00usb_flush_queue,
1857 .write_tx_desc = rt2500usb_write_tx_desc,
1858 .write_beacon = rt2500usb_write_beacon,
1859 .get_tx_data_len = rt2500usb_get_tx_data_len,
1860 .fill_rxdone = rt2500usb_fill_rxdone,
1861 .config_shared_key = rt2500usb_config_key,
1862 .config_pairwise_key = rt2500usb_config_key,
1863 .config_filter = rt2500usb_config_filter,
1864 .config_intf = rt2500usb_config_intf,
1865 .config_erp = rt2500usb_config_erp,
1866 .config_ant = rt2500usb_config_ant,
1867 .config = rt2500usb_config,
1868};
1869
1870static void rt2500usb_queue_init(struct data_queue *queue)
1871{
1872 switch (queue->qid) {
1873 case QID_RX:
1874 queue->limit = 32;
1875 queue->data_size = DATA_FRAME_SIZE;
1876 queue->desc_size = RXD_DESC_SIZE;
1877 queue->priv_size = sizeof(struct queue_entry_priv_usb);
1878 break;
1879
1880 case QID_AC_VO:
1881 case QID_AC_VI:
1882 case QID_AC_BE:
1883 case QID_AC_BK:
1884 queue->limit = 32;
1885 queue->data_size = DATA_FRAME_SIZE;
1886 queue->desc_size = TXD_DESC_SIZE;
1887 queue->priv_size = sizeof(struct queue_entry_priv_usb);
1888 break;
1889
1890 case QID_BEACON:
1891 queue->limit = 1;
1892 queue->data_size = MGMT_FRAME_SIZE;
1893 queue->desc_size = TXD_DESC_SIZE;
1894 queue->priv_size = sizeof(struct queue_entry_priv_usb_bcn);
1895 break;
1896
1897 case QID_ATIM:
1898 queue->limit = 8;
1899 queue->data_size = DATA_FRAME_SIZE;
1900 queue->desc_size = TXD_DESC_SIZE;
1901 queue->priv_size = sizeof(struct queue_entry_priv_usb);
1902 break;
1903
1904 default:
1905 BUG();
1906 break;
1907 }
1908}
1909
1910static const struct rt2x00_ops rt2500usb_ops = {
1911 .name = KBUILD_MODNAME,
1912 .max_ap_intf = 1,
1913 .eeprom_size = EEPROM_SIZE,
1914 .rf_size = RF_SIZE,
1915 .tx_queues = NUM_TX_QUEUES,
1916 .queue_init = rt2500usb_queue_init,
1917 .lib = &rt2500usb_rt2x00_ops,
1918 .hw = &rt2500usb_mac80211_ops,
1919#ifdef CONFIG_RT2X00_LIB_DEBUGFS
1920 .debugfs = &rt2500usb_rt2x00debug,
1921#endif
1922};
1923
1924
1925
1926
1927static struct usb_device_id rt2500usb_device_table[] = {
1928
1929 { USB_DEVICE(0x0b05, 0x1706) },
1930 { USB_DEVICE(0x0b05, 0x1707) },
1931
1932 { USB_DEVICE(0x050d, 0x7050) },
1933 { USB_DEVICE(0x050d, 0x7051) },
1934
1935 { USB_DEVICE(0x13b1, 0x000d) },
1936 { USB_DEVICE(0x13b1, 0x0011) },
1937 { USB_DEVICE(0x13b1, 0x001a) },
1938
1939 { USB_DEVICE(0x14b2, 0x3c02) },
1940
1941 { USB_DEVICE(0x2001, 0x3c00) },
1942
1943 { USB_DEVICE(0x1044, 0x8001) },
1944 { USB_DEVICE(0x1044, 0x8007) },
1945
1946 { USB_DEVICE(0x06f8, 0xe000) },
1947
1948 { USB_DEVICE(0x0411, 0x005e) },
1949 { USB_DEVICE(0x0411, 0x0066) },
1950 { USB_DEVICE(0x0411, 0x0067) },
1951 { USB_DEVICE(0x0411, 0x008b) },
1952 { USB_DEVICE(0x0411, 0x0097) },
1953
1954 { USB_DEVICE(0x0db0, 0x6861) },
1955 { USB_DEVICE(0x0db0, 0x6865) },
1956 { USB_DEVICE(0x0db0, 0x6869) },
1957
1958 { USB_DEVICE(0x148f, 0x1706) },
1959 { USB_DEVICE(0x148f, 0x2570) },
1960 { USB_DEVICE(0x148f, 0x9020) },
1961
1962 { USB_DEVICE(0x079b, 0x004b) },
1963
1964 { USB_DEVICE(0x0681, 0x3c06) },
1965
1966 { USB_DEVICE(0x0707, 0xee13) },
1967
1968 { USB_DEVICE(0x114b, 0x0110) },
1969
1970 { USB_DEVICE(0x0769, 0x11f3) },
1971
1972 { USB_DEVICE(0x0eb0, 0x9020) },
1973
1974 { USB_DEVICE(0x0f88, 0x3012) },
1975
1976 { USB_DEVICE(0x5a57, 0x0260) },
1977 { 0, }
1978};
1979
1980MODULE_AUTHOR(DRV_PROJECT);
1981MODULE_VERSION(DRV_VERSION);
1982MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
1983MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
1984MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
1985MODULE_LICENSE("GPL");
1986
1987static int rt2500usb_probe(struct usb_interface *usb_intf,
1988 const struct usb_device_id *id)
1989{
1990 return rt2x00usb_probe(usb_intf, &rt2500usb_ops);
1991}
1992
1993static struct usb_driver rt2500usb_driver = {
1994 .name = KBUILD_MODNAME,
1995 .id_table = rt2500usb_device_table,
1996 .probe = rt2500usb_probe,
1997 .disconnect = rt2x00usb_disconnect,
1998 .suspend = rt2x00usb_suspend,
1999 .resume = rt2x00usb_resume,
2000 .reset_resume = rt2x00usb_resume,
2001 .disable_hub_initiated_lpm = 1,
2002};
2003
2004module_usb_driver(rt2500usb_driver);
2005