LXR linux/drivers/staging/cxt1e1/pmcc4.h

   1#ifndef _INC_PMCC4_H_
   2#define _INC_PMCC4_H_
   3
   4/*-----------------------------------------------------------------------------
   5 * pmcc4.h -
   6 *
   7 * Copyright (C) 2005  SBE, Inc.
   8 *
   9 *   This program is free software; you can redistribute it and/or modify
  10 *   it under the terms of the GNU General Public License as published by
  11 *   the Free Software Foundation; either version 2 of the License, or
  12 *   (at your option) any later version.
  13 *
  14 *   This program is distributed in the hope that it will be useful,
  15 *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 *   GNU General Public License for more details.
  18 *
  19 * For further information, contact via email: support@sbei.com
  20 * SBE, Inc.  San Ramon, California  U.S.A.
  21 *-----------------------------------------------------------------------------
  22 */
  23
  24#include <linux/types.h>
  25
  26typedef int status_t;
  27
  28#define SBE_DRVR_FAIL     0
  29#define SBE_DRVR_SUCCESS  1
  30
  31/********************/
  32/* PMCC4 memory Map */
  33/********************/
  34
  35#define COMET_OFFSET(x) (0x80000+(x)*0x10000)
  36#define EEPROM_OFFSET   0xC0000
  37#define CPLD_OFFSET     0xD0000
  38
  39    struct pmcc4_timeslot_param
  40    {
  41        u_int8_t    card;       /* the card number */
  42        u_int8_t    port;       /* the port number */
  43        u_int8_t    _reserved1;
  44        u_int8_t    _reserved2;
  45
  46        /*
  47         * each byte in bitmask below represents one timeslot (bitmask[0] is
  48         * for timeslot 0 and so on), each bit in the byte selects timeslot
  49         * bits for this channel (0xff - whole timeslot, 0x7f - 56kbps mode)
  50         */
  51        u_int8_t    bitmask[32];
  52    };
  53
  54    struct c4_musycc_param
  55    {
  56        u_int8_t    RWportnum;
  57                    u_int16_t offset;
  58        u_int32_t   value;
  59    };
  60
  61/*Alarm values */
  62#define sbeE1RMAI      0x100
  63#define sbeYelAlm      0x04
  64#define sbeRedAlm      0x02
  65#define sbeAISAlm      0x01
  66
  67#define sbeE1errSMF    0x02
  68#define sbeE1CRC       0x01
  69
  70#ifdef __KERNEL__
  71
  72/*
  73 * Device Driver interface, routines are for internal use only.
  74 */
  75
  76#include "pmcc4_private.h"
  77
  78char       *get_hdlc_name (hdlc_device *);
  79
  80/*
  81 * external interface
  82 */
  83
  84void        c4_cleanup (void);
  85status_t    c4_chan_up (ci_t *, int channum);
  86status_t    c4_del_chan_stats (int channum);
  87status_t    c4_del_chan (int channum);
  88status_t    c4_get_iidinfo (ci_t *ci, struct sbe_iid_info *iip);
  89int         c4_is_chan_up (int channum);
  90
  91void       *getuserbychan (int channum);
  92void        pci_flush_write (ci_t *ci);
  93void        sbecom_set_loglevel (int debuglevel);
  94char       *sbeid_get_bdname (ci_t *ci);
  95void        sbeid_set_bdtype (ci_t *ci);
  96void        sbeid_set_hdwbid (ci_t *ci);
  97u_int32_t   sbeCrc (u_int8_t *, u_int32_t, u_int32_t, u_int32_t *);
  98
  99void        VMETRO_TRACE (void *);       /* put data into 8 LEDs */
 100void        VMETRO_TRIGGER (ci_t *, int);       /* Note: int = 0(default)
 101                                                 * thru 15 */
 102
 103#if defined (SBE_ISR_TASKLET)
 104void        musycc_intr_bh_tasklet (ci_t *);
 105
 106#endif
 107
 108#endif                          /*** __KERNEL __ ***/
 109#endif                          /* _INC_PMCC4_H_ */
 110