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9#include <linux/interrupt.h>
10#include <linux/device.h>
11#include <linux/kernel.h>
12#include <linux/sysfs.h>
13#include <linux/i2c.h>
14#include <linux/regulator/consumer.h>
15#include <linux/slab.h>
16#include <linux/types.h>
17#include <linux/err.h>
18#include <linux/delay.h>
19#include <linux/module.h>
20#include <asm/div64.h>
21
22#include <linux/iio/iio.h>
23#include <linux/iio/sysfs.h>
24#include <linux/iio/buffer.h>
25#include <linux/iio/kfifo_buf.h>
26
27#include "ad5933.h"
28
29
30#define AD5933_REG_CONTROL_HB 0x80
31#define AD5933_REG_CONTROL_LB 0x81
32#define AD5933_REG_FREQ_START 0x82
33#define AD5933_REG_FREQ_INC 0x85
34#define AD5933_REG_INC_NUM 0x88
35#define AD5933_REG_SETTLING_CYCLES 0x8A
36#define AD5933_REG_STATUS 0x8F
37#define AD5933_REG_TEMP_DATA 0x92
38#define AD5933_REG_REAL_DATA 0x94
39#define AD5933_REG_IMAG_DATA 0x96
40
41
42#define AD5933_CTRL_INIT_START_FREQ (0x1 << 4)
43#define AD5933_CTRL_START_SWEEP (0x2 << 4)
44#define AD5933_CTRL_INC_FREQ (0x3 << 4)
45#define AD5933_CTRL_REPEAT_FREQ (0x4 << 4)
46#define AD5933_CTRL_MEASURE_TEMP (0x9 << 4)
47#define AD5933_CTRL_POWER_DOWN (0xA << 4)
48#define AD5933_CTRL_STANDBY (0xB << 4)
49
50#define AD5933_CTRL_RANGE_2000mVpp (0x0 << 1)
51#define AD5933_CTRL_RANGE_200mVpp (0x1 << 1)
52#define AD5933_CTRL_RANGE_400mVpp (0x2 << 1)
53#define AD5933_CTRL_RANGE_1000mVpp (0x3 << 1)
54#define AD5933_CTRL_RANGE(x) ((x) << 1)
55
56#define AD5933_CTRL_PGA_GAIN_1 (0x1 << 0)
57#define AD5933_CTRL_PGA_GAIN_5 (0x0 << 0)
58
59
60#define AD5933_CTRL_RESET (0x1 << 4)
61#define AD5933_CTRL_INT_SYSCLK (0x0 << 3)
62#define AD5933_CTRL_EXT_SYSCLK (0x1 << 3)
63
64
65#define AD5933_STAT_TEMP_VALID (0x1 << 0)
66#define AD5933_STAT_DATA_VALID (0x1 << 1)
67#define AD5933_STAT_SWEEP_DONE (0x1 << 2)
68
69
70#define AD5933_I2C_BLOCK_WRITE 0xA0
71#define AD5933_I2C_BLOCK_READ 0xA1
72#define AD5933_I2C_ADDR_POINTER 0xB0
73
74
75#define AD5933_INT_OSC_FREQ_Hz 16776000
76#define AD5933_MAX_OUTPUT_FREQ_Hz 100000
77#define AD5933_MAX_RETRIES 100
78
79#define AD5933_OUT_RANGE 1
80#define AD5933_OUT_RANGE_AVAIL 2
81#define AD5933_OUT_SETTLING_CYCLES 3
82#define AD5933_IN_PGA_GAIN 4
83#define AD5933_IN_PGA_GAIN_AVAIL 5
84#define AD5933_FREQ_POINTS 6
85
86#define AD5933_POLL_TIME_ms 10
87#define AD5933_INIT_EXCITATION_TIME_ms 100
88
89struct ad5933_state {
90 struct i2c_client *client;
91 struct regulator *reg;
92 struct ad5933_platform_data *pdata;
93 struct delayed_work work;
94 unsigned long mclk_hz;
95 unsigned char ctrl_hb;
96 unsigned char ctrl_lb;
97 unsigned range_avail[4];
98 unsigned short vref_mv;
99 unsigned short settling_cycles;
100 unsigned short freq_points;
101 unsigned freq_start;
102 unsigned freq_inc;
103 unsigned state;
104 unsigned poll_time_jiffies;
105};
106
107static struct ad5933_platform_data ad5933_default_pdata = {
108 .vref_mv = 3300,
109};
110
111static const struct iio_chan_spec ad5933_channels[] = {
112 {
113 .type = IIO_TEMP,
114 .indexed = 1,
115 .channel = 0,
116 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
117 .address = AD5933_REG_TEMP_DATA,
118 .scan_type = {
119 .sign = 's',
120 .realbits = 14,
121 .storagebits = 16,
122 },
123 }, {
124 .type = IIO_VOLTAGE,
125 .indexed = 1,
126 .channel = 0,
127 .extend_name = "real_raw",
128 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
129 BIT(IIO_CHAN_INFO_SCALE),
130 .address = AD5933_REG_REAL_DATA,
131 .scan_index = 0,
132 .scan_type = {
133 .sign = 's',
134 .realbits = 16,
135 .storagebits = 16,
136 },
137 }, {
138 .type = IIO_VOLTAGE,
139 .indexed = 1,
140 .channel = 0,
141 .extend_name = "imag_raw",
142 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
143 BIT(IIO_CHAN_INFO_SCALE),
144 .address = AD5933_REG_IMAG_DATA,
145 .scan_index = 1,
146 .scan_type = {
147 .sign = 's',
148 .realbits = 16,
149 .storagebits = 16,
150 },
151 },
152};
153
154static int ad5933_i2c_write(struct i2c_client *client,
155 u8 reg, u8 len, u8 *data)
156{
157 int ret;
158
159 while (len--) {
160 ret = i2c_smbus_write_byte_data(client, reg++, *data++);
161 if (ret < 0) {
162 dev_err(&client->dev, "I2C write error\n");
163 return ret;
164 }
165 }
166 return 0;
167}
168
169static int ad5933_i2c_read(struct i2c_client *client,
170 u8 reg, u8 len, u8 *data)
171{
172 int ret;
173
174 while (len--) {
175 ret = i2c_smbus_read_byte_data(client, reg++);
176 if (ret < 0) {
177 dev_err(&client->dev, "I2C read error\n");
178 return ret;
179 }
180 *data++ = ret;
181 }
182 return 0;
183}
184
185static int ad5933_cmd(struct ad5933_state *st, unsigned char cmd)
186{
187 unsigned char dat = st->ctrl_hb | cmd;
188
189 return ad5933_i2c_write(st->client,
190 AD5933_REG_CONTROL_HB, 1, &dat);
191}
192
193static int ad5933_reset(struct ad5933_state *st)
194{
195 unsigned char dat = st->ctrl_lb | AD5933_CTRL_RESET;
196 return ad5933_i2c_write(st->client,
197 AD5933_REG_CONTROL_LB, 1, &dat);
198}
199
200static int ad5933_wait_busy(struct ad5933_state *st, unsigned char event)
201{
202 unsigned char val, timeout = AD5933_MAX_RETRIES;
203 int ret;
204
205 while (timeout--) {
206 ret = ad5933_i2c_read(st->client, AD5933_REG_STATUS, 1, &val);
207 if (ret < 0)
208 return ret;
209 if (val & event)
210 return val;
211 cpu_relax();
212 mdelay(1);
213 }
214
215 return -EAGAIN;
216}
217
218static int ad5933_set_freq(struct ad5933_state *st,
219 unsigned reg, unsigned long freq)
220{
221 unsigned long long freqreg;
222 union {
223 u32 d32;
224 u8 d8[4];
225 } dat;
226
227 freqreg = (u64) freq * (u64) (1 << 27);
228 do_div(freqreg, st->mclk_hz / 4);
229
230 switch (reg) {
231 case AD5933_REG_FREQ_START:
232 st->freq_start = freq;
233 break;
234 case AD5933_REG_FREQ_INC:
235 st->freq_inc = freq;
236 break;
237 default:
238 return -EINVAL;
239 }
240
241 dat.d32 = cpu_to_be32(freqreg);
242 return ad5933_i2c_write(st->client, reg, 3, &dat.d8[1]);
243}
244
245static int ad5933_setup(struct ad5933_state *st)
246{
247 unsigned short dat;
248 int ret;
249
250 ret = ad5933_reset(st);
251 if (ret < 0)
252 return ret;
253
254 ret = ad5933_set_freq(st, AD5933_REG_FREQ_START, 10000);
255 if (ret < 0)
256 return ret;
257
258 ret = ad5933_set_freq(st, AD5933_REG_FREQ_INC, 200);
259 if (ret < 0)
260 return ret;
261
262 st->settling_cycles = 10;
263 dat = cpu_to_be16(st->settling_cycles);
264
265 ret = ad5933_i2c_write(st->client,
266 AD5933_REG_SETTLING_CYCLES, 2, (u8 *)&dat);
267 if (ret < 0)
268 return ret;
269
270 st->freq_points = 100;
271 dat = cpu_to_be16(st->freq_points);
272
273 return ad5933_i2c_write(st->client, AD5933_REG_INC_NUM, 2, (u8 *)&dat);
274}
275
276static void ad5933_calc_out_ranges(struct ad5933_state *st)
277{
278 int i;
279 unsigned normalized_3v3[4] = {1980, 198, 383, 970};
280
281 for (i = 0; i < 4; i++)
282 st->range_avail[i] = normalized_3v3[i] * st->vref_mv / 3300;
283
284}
285
286
287
288
289
290static ssize_t ad5933_show_frequency(struct device *dev,
291 struct device_attribute *attr,
292 char *buf)
293{
294 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
295 struct ad5933_state *st = iio_priv(indio_dev);
296 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
297 int ret;
298 unsigned long long freqreg;
299 union {
300 u32 d32;
301 u8 d8[4];
302 } dat;
303
304 mutex_lock(&indio_dev->mlock);
305 ret = ad5933_i2c_read(st->client, this_attr->address, 3, &dat.d8[1]);
306 mutex_unlock(&indio_dev->mlock);
307 if (ret < 0)
308 return ret;
309
310 freqreg = be32_to_cpu(dat.d32) & 0xFFFFFF;
311
312 freqreg = (u64) freqreg * (u64) (st->mclk_hz / 4);
313 do_div(freqreg, 1 << 27);
314
315 return sprintf(buf, "%d\n", (int) freqreg);
316}
317
318static ssize_t ad5933_store_frequency(struct device *dev,
319 struct device_attribute *attr,
320 const char *buf,
321 size_t len)
322{
323 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
324 struct ad5933_state *st = iio_priv(indio_dev);
325 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
326 long val;
327 int ret;
328
329 ret = strict_strtoul(buf, 10, &val);
330 if (ret)
331 return ret;
332
333 if (val > AD5933_MAX_OUTPUT_FREQ_Hz)
334 return -EINVAL;
335
336 mutex_lock(&indio_dev->mlock);
337 ret = ad5933_set_freq(st, this_attr->address, val);
338 mutex_unlock(&indio_dev->mlock);
339
340 return ret ? ret : len;
341}
342
343static IIO_DEVICE_ATTR(out_voltage0_freq_start, S_IRUGO | S_IWUSR,
344 ad5933_show_frequency,
345 ad5933_store_frequency,
346 AD5933_REG_FREQ_START);
347
348static IIO_DEVICE_ATTR(out_voltage0_freq_increment, S_IRUGO | S_IWUSR,
349 ad5933_show_frequency,
350 ad5933_store_frequency,
351 AD5933_REG_FREQ_INC);
352
353static ssize_t ad5933_show(struct device *dev,
354 struct device_attribute *attr,
355 char *buf)
356{
357 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
358 struct ad5933_state *st = iio_priv(indio_dev);
359 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
360 int ret = 0, len = 0;
361
362 mutex_lock(&indio_dev->mlock);
363 switch ((u32) this_attr->address) {
364 case AD5933_OUT_RANGE:
365 len = sprintf(buf, "%d\n",
366 st->range_avail[(st->ctrl_hb >> 1) & 0x3]);
367 break;
368 case AD5933_OUT_RANGE_AVAIL:
369 len = sprintf(buf, "%d %d %d %d\n", st->range_avail[0],
370 st->range_avail[3], st->range_avail[2],
371 st->range_avail[1]);
372 break;
373 case AD5933_OUT_SETTLING_CYCLES:
374 len = sprintf(buf, "%d\n", st->settling_cycles);
375 break;
376 case AD5933_IN_PGA_GAIN:
377 len = sprintf(buf, "%s\n",
378 (st->ctrl_hb & AD5933_CTRL_PGA_GAIN_1) ?
379 "1" : "0.2");
380 break;
381 case AD5933_IN_PGA_GAIN_AVAIL:
382 len = sprintf(buf, "1 0.2\n");
383 break;
384 case AD5933_FREQ_POINTS:
385 len = sprintf(buf, "%d\n", st->freq_points);
386 break;
387 default:
388 ret = -EINVAL;
389 }
390
391 mutex_unlock(&indio_dev->mlock);
392 return ret ? ret : len;
393}
394
395static ssize_t ad5933_store(struct device *dev,
396 struct device_attribute *attr,
397 const char *buf,
398 size_t len)
399{
400 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
401 struct ad5933_state *st = iio_priv(indio_dev);
402 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
403 long val;
404 int i, ret = 0;
405 unsigned short dat;
406
407 if (this_attr->address != AD5933_IN_PGA_GAIN) {
408 ret = strict_strtol(buf, 10, &val);
409 if (ret)
410 return ret;
411 }
412
413 mutex_lock(&indio_dev->mlock);
414 switch ((u32) this_attr->address) {
415 case AD5933_OUT_RANGE:
416 for (i = 0; i < 4; i++)
417 if (val == st->range_avail[i]) {
418 st->ctrl_hb &= ~AD5933_CTRL_RANGE(0x3);
419 st->ctrl_hb |= AD5933_CTRL_RANGE(i);
420 ret = ad5933_cmd(st, 0);
421 break;
422 }
423 ret = -EINVAL;
424 break;
425 case AD5933_IN_PGA_GAIN:
426 if (sysfs_streq(buf, "1")) {
427 st->ctrl_hb |= AD5933_CTRL_PGA_GAIN_1;
428 } else if (sysfs_streq(buf, "0.2")) {
429 st->ctrl_hb &= ~AD5933_CTRL_PGA_GAIN_1;
430 } else {
431 ret = -EINVAL;
432 break;
433 }
434 ret = ad5933_cmd(st, 0);
435 break;
436 case AD5933_OUT_SETTLING_CYCLES:
437 val = clamp(val, 0L, 0x7FFL);
438 st->settling_cycles = val;
439
440
441 if (val > 511)
442 val = (val >> 1) | (1 << 9);
443 else if (val > 1022)
444 val = (val >> 2) | (3 << 9);
445
446 dat = cpu_to_be16(val);
447 ret = ad5933_i2c_write(st->client,
448 AD5933_REG_SETTLING_CYCLES, 2, (u8 *)&dat);
449 break;
450 case AD5933_FREQ_POINTS:
451 val = clamp(val, 0L, 511L);
452 st->freq_points = val;
453
454 dat = cpu_to_be16(val);
455 ret = ad5933_i2c_write(st->client, AD5933_REG_INC_NUM, 2,
456 (u8 *)&dat);
457 break;
458 default:
459 ret = -EINVAL;
460 }
461
462 mutex_unlock(&indio_dev->mlock);
463 return ret ? ret : len;
464}
465
466static IIO_DEVICE_ATTR(out_voltage0_scale, S_IRUGO | S_IWUSR,
467 ad5933_show,
468 ad5933_store,
469 AD5933_OUT_RANGE);
470
471static IIO_DEVICE_ATTR(out_voltage0_scale_available, S_IRUGO,
472 ad5933_show,
473 NULL,
474 AD5933_OUT_RANGE_AVAIL);
475
476static IIO_DEVICE_ATTR(in_voltage0_scale, S_IRUGO | S_IWUSR,
477 ad5933_show,
478 ad5933_store,
479 AD5933_IN_PGA_GAIN);
480
481static IIO_DEVICE_ATTR(in_voltage0_scale_available, S_IRUGO,
482 ad5933_show,
483 NULL,
484 AD5933_IN_PGA_GAIN_AVAIL);
485
486static IIO_DEVICE_ATTR(out_voltage0_freq_points, S_IRUGO | S_IWUSR,
487 ad5933_show,
488 ad5933_store,
489 AD5933_FREQ_POINTS);
490
491static IIO_DEVICE_ATTR(out_voltage0_settling_cycles, S_IRUGO | S_IWUSR,
492 ad5933_show,
493 ad5933_store,
494 AD5933_OUT_SETTLING_CYCLES);
495
496
497
498
499
500
501static struct attribute *ad5933_attributes[] = {
502 &iio_dev_attr_out_voltage0_scale.dev_attr.attr,
503 &iio_dev_attr_out_voltage0_scale_available.dev_attr.attr,
504 &iio_dev_attr_out_voltage0_freq_start.dev_attr.attr,
505 &iio_dev_attr_out_voltage0_freq_increment.dev_attr.attr,
506 &iio_dev_attr_out_voltage0_freq_points.dev_attr.attr,
507 &iio_dev_attr_out_voltage0_settling_cycles.dev_attr.attr,
508 &iio_dev_attr_in_voltage0_scale.dev_attr.attr,
509 &iio_dev_attr_in_voltage0_scale_available.dev_attr.attr,
510 NULL
511};
512
513static const struct attribute_group ad5933_attribute_group = {
514 .attrs = ad5933_attributes,
515};
516
517static int ad5933_read_raw(struct iio_dev *indio_dev,
518 struct iio_chan_spec const *chan,
519 int *val,
520 int *val2,
521 long m)
522{
523 struct ad5933_state *st = iio_priv(indio_dev);
524 unsigned short dat;
525 int ret = -EINVAL;
526
527 mutex_lock(&indio_dev->mlock);
528 switch (m) {
529 case IIO_CHAN_INFO_RAW:
530 case IIO_CHAN_INFO_PROCESSED:
531 if (iio_buffer_enabled(indio_dev)) {
532 ret = -EBUSY;
533 goto out;
534 }
535 ret = ad5933_cmd(st, AD5933_CTRL_MEASURE_TEMP);
536 if (ret < 0)
537 goto out;
538 ret = ad5933_wait_busy(st, AD5933_STAT_TEMP_VALID);
539 if (ret < 0)
540 goto out;
541
542 ret = ad5933_i2c_read(st->client,
543 AD5933_REG_TEMP_DATA, 2,
544 (u8 *)&dat);
545 if (ret < 0)
546 goto out;
547 mutex_unlock(&indio_dev->mlock);
548 ret = be16_to_cpu(dat);
549
550 if (ret < 8192)
551 *val = ret * 1000 / 32;
552 else
553 *val = (ret - 16384) * 1000 / 32;
554
555 return IIO_VAL_INT;
556 }
557
558out:
559 mutex_unlock(&indio_dev->mlock);
560 return ret;
561}
562
563static const struct iio_info ad5933_info = {
564 .read_raw = &ad5933_read_raw,
565 .attrs = &ad5933_attribute_group,
566 .driver_module = THIS_MODULE,
567};
568
569static int ad5933_ring_preenable(struct iio_dev *indio_dev)
570{
571 struct ad5933_state *st = iio_priv(indio_dev);
572 int ret;
573
574 if (bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength))
575 return -EINVAL;
576
577 ret = iio_sw_buffer_preenable(indio_dev);
578 if (ret < 0)
579 return ret;
580
581 ret = ad5933_reset(st);
582 if (ret < 0)
583 return ret;
584
585 ret = ad5933_cmd(st, AD5933_CTRL_STANDBY);
586 if (ret < 0)
587 return ret;
588
589 ret = ad5933_cmd(st, AD5933_CTRL_INIT_START_FREQ);
590 if (ret < 0)
591 return ret;
592
593 st->state = AD5933_CTRL_INIT_START_FREQ;
594
595 return 0;
596}
597
598static int ad5933_ring_postenable(struct iio_dev *indio_dev)
599{
600 struct ad5933_state *st = iio_priv(indio_dev);
601
602
603
604
605
606
607
608
609
610
611
612 schedule_delayed_work(&st->work,
613 msecs_to_jiffies(AD5933_INIT_EXCITATION_TIME_ms));
614 return 0;
615}
616
617static int ad5933_ring_postdisable(struct iio_dev *indio_dev)
618{
619 struct ad5933_state *st = iio_priv(indio_dev);
620
621 cancel_delayed_work_sync(&st->work);
622 return ad5933_cmd(st, AD5933_CTRL_POWER_DOWN);
623}
624
625static const struct iio_buffer_setup_ops ad5933_ring_setup_ops = {
626 .preenable = &ad5933_ring_preenable,
627 .postenable = &ad5933_ring_postenable,
628 .postdisable = &ad5933_ring_postdisable,
629};
630
631static int ad5933_register_ring_funcs_and_init(struct iio_dev *indio_dev)
632{
633 indio_dev->buffer = iio_kfifo_allocate(indio_dev);
634 if (!indio_dev->buffer)
635 return -ENOMEM;
636
637
638 indio_dev->setup_ops = &ad5933_ring_setup_ops;
639
640 indio_dev->modes |= INDIO_BUFFER_HARDWARE;
641
642 return 0;
643}
644
645static void ad5933_work(struct work_struct *work)
646{
647 struct ad5933_state *st = container_of(work,
648 struct ad5933_state, work.work);
649 struct iio_dev *indio_dev = i2c_get_clientdata(st->client);
650 signed short buf[2];
651 unsigned char status;
652
653 mutex_lock(&indio_dev->mlock);
654 if (st->state == AD5933_CTRL_INIT_START_FREQ) {
655
656 ad5933_cmd(st, AD5933_CTRL_START_SWEEP);
657 st->state = AD5933_CTRL_START_SWEEP;
658 schedule_delayed_work(&st->work, st->poll_time_jiffies);
659 mutex_unlock(&indio_dev->mlock);
660 return;
661 }
662
663 ad5933_i2c_read(st->client, AD5933_REG_STATUS, 1, &status);
664
665 if (status & AD5933_STAT_DATA_VALID) {
666 int scan_count = bitmap_weight(indio_dev->active_scan_mask,
667 indio_dev->masklength);
668 ad5933_i2c_read(st->client,
669 test_bit(1, indio_dev->active_scan_mask) ?
670 AD5933_REG_REAL_DATA : AD5933_REG_IMAG_DATA,
671 scan_count * 2, (u8 *)buf);
672
673 if (scan_count == 2) {
674 buf[0] = be16_to_cpu(buf[0]);
675 buf[1] = be16_to_cpu(buf[1]);
676 } else {
677 buf[0] = be16_to_cpu(buf[0]);
678 }
679 iio_push_to_buffers(indio_dev, (u8 *)buf);
680 } else {
681
682 schedule_delayed_work(&st->work, st->poll_time_jiffies);
683 mutex_unlock(&indio_dev->mlock);
684 return;
685 }
686
687 if (status & AD5933_STAT_SWEEP_DONE) {
688
689
690 ad5933_cmd(st, AD5933_CTRL_POWER_DOWN);
691 } else {
692
693 ad5933_cmd(st, AD5933_CTRL_INC_FREQ);
694 schedule_delayed_work(&st->work, st->poll_time_jiffies);
695 }
696
697 mutex_unlock(&indio_dev->mlock);
698}
699
700static int ad5933_probe(struct i2c_client *client,
701 const struct i2c_device_id *id)
702{
703 int ret, voltage_uv = 0;
704 struct ad5933_platform_data *pdata = client->dev.platform_data;
705 struct ad5933_state *st;
706 struct iio_dev *indio_dev = iio_device_alloc(sizeof(*st));
707 if (indio_dev == NULL)
708 return -ENOMEM;
709
710 st = iio_priv(indio_dev);
711 i2c_set_clientdata(client, indio_dev);
712 st->client = client;
713
714 if (!pdata)
715 st->pdata = &ad5933_default_pdata;
716 else
717 st->pdata = pdata;
718
719 st->reg = regulator_get(&client->dev, "vcc");
720 if (!IS_ERR(st->reg)) {
721 ret = regulator_enable(st->reg);
722 if (ret)
723 goto error_put_reg;
724 voltage_uv = regulator_get_voltage(st->reg);
725 }
726
727 if (voltage_uv)
728 st->vref_mv = voltage_uv / 1000;
729 else
730 st->vref_mv = st->pdata->vref_mv;
731
732 if (st->pdata->ext_clk_Hz) {
733 st->mclk_hz = st->pdata->ext_clk_Hz;
734 st->ctrl_lb = AD5933_CTRL_EXT_SYSCLK;
735 } else {
736 st->mclk_hz = AD5933_INT_OSC_FREQ_Hz;
737 st->ctrl_lb = AD5933_CTRL_INT_SYSCLK;
738 }
739
740 ad5933_calc_out_ranges(st);
741 INIT_DELAYED_WORK(&st->work, ad5933_work);
742 st->poll_time_jiffies = msecs_to_jiffies(AD5933_POLL_TIME_ms);
743
744 indio_dev->dev.parent = &client->dev;
745 indio_dev->info = &ad5933_info;
746 indio_dev->name = id->name;
747 indio_dev->modes = INDIO_DIRECT_MODE;
748 indio_dev->channels = ad5933_channels;
749 indio_dev->num_channels = 1;
750
751 ret = ad5933_register_ring_funcs_and_init(indio_dev);
752 if (ret)
753 goto error_disable_reg;
754
755
756 ret = iio_buffer_register(indio_dev, &ad5933_channels[1], 2);
757 if (ret)
758 goto error_unreg_ring;
759
760
761 iio_scan_mask_set(indio_dev, indio_dev->buffer, 0);
762 iio_scan_mask_set(indio_dev, indio_dev->buffer, 1);
763
764 ret = ad5933_setup(st);
765 if (ret)
766 goto error_uninitialize_ring;
767
768 ret = iio_device_register(indio_dev);
769 if (ret)
770 goto error_uninitialize_ring;
771
772 return 0;
773
774error_uninitialize_ring:
775 iio_buffer_unregister(indio_dev);
776error_unreg_ring:
777 iio_kfifo_free(indio_dev->buffer);
778error_disable_reg:
779 if (!IS_ERR(st->reg))
780 regulator_disable(st->reg);
781error_put_reg:
782 if (!IS_ERR(st->reg))
783 regulator_put(st->reg);
784
785 iio_device_free(indio_dev);
786
787 return ret;
788}
789
790static int ad5933_remove(struct i2c_client *client)
791{
792 struct iio_dev *indio_dev = i2c_get_clientdata(client);
793 struct ad5933_state *st = iio_priv(indio_dev);
794
795 iio_device_unregister(indio_dev);
796 iio_buffer_unregister(indio_dev);
797 iio_kfifo_free(indio_dev->buffer);
798 if (!IS_ERR(st->reg)) {
799 regulator_disable(st->reg);
800 regulator_put(st->reg);
801 }
802 iio_device_free(indio_dev);
803
804 return 0;
805}
806
807static const struct i2c_device_id ad5933_id[] = {
808 { "ad5933", 0 },
809 { "ad5934", 0 },
810 {}
811};
812
813MODULE_DEVICE_TABLE(i2c, ad5933_id);
814
815static struct i2c_driver ad5933_driver = {
816 .driver = {
817 .name = "ad5933",
818 },
819 .probe = ad5933_probe,
820 .remove = ad5933_remove,
821 .id_table = ad5933_id,
822};
823module_i2c_driver(ad5933_driver);
824
825MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
826MODULE_DESCRIPTION("Analog Devices AD5933 Impedance Conv. Network Analyzer");
827MODULE_LICENSE("GPL v2");
828
