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56#ifndef _HFA384x_H
57#define _HFA384x_H
58
59#define HFA384x_FIRMWARE_VERSION(a, b, c) (((a) << 16) + ((b) << 8) + (c))
60
61#include <linux/if_ether.h>
62#include <linux/usb.h>
63
64
65#define HFA384x_PORTID_MAX ((u16)7)
66#define HFA384x_NUMPORTS_MAX ((u16)(HFA384x_PORTID_MAX+1))
67#define HFA384x_PDR_LEN_MAX ((u16)512)
68#define HFA384x_PDA_RECS_MAX ((u16)200)
69#define HFA384x_PDA_LEN_MAX ((u16)1024)
70#define HFA384x_SCANRESULT_MAX ((u16)31)
71#define HFA384x_HSCANRESULT_MAX ((u16)31)
72#define HFA384x_CHINFORESULT_MAX ((u16)16)
73#define HFA384x_RID_GUESSING_MAXLEN 2048
74#define HFA384x_RIDDATA_MAXLEN HFA384x_RID_GUESSING_MAXLEN
75#define HFA384x_USB_RWMEM_MAXLEN 2048
76
77
78#define HFA384x_PORTTYPE_IBSS ((u16)0)
79#define HFA384x_PORTTYPE_BSS ((u16)1)
80#define HFA384x_PORTTYPE_PSUEDOIBSS ((u16)3)
81#define HFA384x_WEPFLAGS_PRIVINVOKED ((u16)BIT(0))
82#define HFA384x_WEPFLAGS_EXCLUDE ((u16)BIT(1))
83#define HFA384x_WEPFLAGS_DISABLE_TXCRYPT ((u16)BIT(4))
84#define HFA384x_WEPFLAGS_DISABLE_RXCRYPT ((u16)BIT(7))
85#define HFA384x_ROAMMODE_HOSTSCAN_HOSTROAM ((u16)3)
86#define HFA384x_PORTSTATUS_DISABLED ((u16)1)
87#define HFA384x_RATEBIT_1 ((u16)1)
88#define HFA384x_RATEBIT_2 ((u16)2)
89#define HFA384x_RATEBIT_5dot5 ((u16)4)
90#define HFA384x_RATEBIT_11 ((u16)8)
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107#define HFA384x_ADDR_FLAT_AUX_PAGE_MASK (0x007fff80)
108#define HFA384x_ADDR_FLAT_AUX_OFF_MASK (0x0000007f)
109#define HFA384x_ADDR_FLAT_CMD_PAGE_MASK (0xffff0000)
110#define HFA384x_ADDR_FLAT_CMD_OFF_MASK (0x0000ffff)
111
112
113
114#define HFA384x_ADDR_AUX_PAGE_MASK (0xffff)
115#define HFA384x_ADDR_AUX_OFF_MASK (0x007f)
116
117
118#define HFA384x_ADDR_AUX_MKFLAT(p, o) \
119 ((((u32)(((u16)(p))&HFA384x_ADDR_AUX_PAGE_MASK)) << 7) | \
120 ((u32)(((u16)(o))&HFA384x_ADDR_AUX_OFF_MASK)))
121
122
123#define HFA384x_ADDR_CMD_MKPAGE(f) \
124 ((u16)((((u32)(f))&HFA384x_ADDR_FLAT_CMD_PAGE_MASK)>>16))
125#define HFA384x_ADDR_CMD_MKOFF(f) \
126 ((u16)(((u32)(f))&HFA384x_ADDR_FLAT_CMD_OFF_MASK))
127
128
129#define HFA3842_PDA_BASE (0x007f0000UL)
130#define HFA3841_PDA_BASE (0x003f0000UL)
131#define HFA3841_PDA_BOGUS_BASE (0x00390000UL)
132
133
134#define HFA384x_DLSTATE_DISABLED 0
135#define HFA384x_DLSTATE_RAMENABLED 1
136#define HFA384x_DLSTATE_FLASHENABLED 2
137
138
139#define HFA384x_CMD_AINFO ((u16)(BIT(14) | BIT(13) \
140 | BIT(12) | BIT(11) \
141 | BIT(10) | BIT(9) \
142 | BIT(8)))
143#define HFA384x_CMD_MACPORT ((u16)(BIT(10) | BIT(9) | \
144 BIT(8)))
145#define HFA384x_CMD_PROGMODE ((u16)(BIT(9) | BIT(8)))
146#define HFA384x_CMD_CMDCODE ((u16)(BIT(5) | BIT(4) | \
147 BIT(3) | BIT(2) | \
148 BIT(1) | BIT(0)))
149
150#define HFA384x_STATUS_RESULT ((u16)(BIT(14) | BIT(13) \
151 | BIT(12) | BIT(11) \
152 | BIT(10) | BIT(9) \
153 | BIT(8)))
154
155
156
157#define HFA384x_CMDCODE_INIT ((u16)0x00)
158#define HFA384x_CMDCODE_ENABLE ((u16)0x01)
159#define HFA384x_CMDCODE_DISABLE ((u16)0x02)
160
161
162#define HFA384x_CMDCODE_INQ ((u16)0x11)
163
164
165#define HFA384x_CMDCODE_DOWNLD ((u16)0x22)
166
167
168#define HFA384x_CMDCODE_MONITOR ((u16)(0x38))
169#define HFA384x_MONITOR_ENABLE ((u16)(0x0b))
170#define HFA384x_MONITOR_DISABLE ((u16)(0x0f))
171
172
173#define HFA384x_CMD_ERR ((u16)(0x7F))
174
175
176
177
178
179
180
181#define HFA384x_PROGMODE_DISABLE ((u16)0x00)
182#define HFA384x_PROGMODE_RAM ((u16)0x01)
183#define HFA384x_PROGMODE_NV ((u16)0x02)
184#define HFA384x_PROGMODE_NVWRITE ((u16)0x03)
185
186
187
188
189
190#define HFA384x_RID_CNFPORTTYPE ((u16)0xFC00)
191#define HFA384x_RID_CNFOWNMACADDR ((u16)0xFC01)
192#define HFA384x_RID_CNFDESIREDSSID ((u16)0xFC02)
193#define HFA384x_RID_CNFOWNCHANNEL ((u16)0xFC03)
194#define HFA384x_RID_CNFOWNSSID ((u16)0xFC04)
195#define HFA384x_RID_CNFMAXDATALEN ((u16)0xFC07)
196
197
198
199
200
201
202#define HFA384x_RID_CNFOWNMACADDR_LEN ((u16)6)
203#define HFA384x_RID_CNFDESIREDSSID_LEN ((u16)34)
204#define HFA384x_RID_CNFOWNSSID_LEN ((u16)34)
205
206
207
208
209#define HFA384x_RID_CREATEIBSS ((u16)0xFC81)
210#define HFA384x_RID_FRAGTHRESH ((u16)0xFC82)
211#define HFA384x_RID_RTSTHRESH ((u16)0xFC83)
212#define HFA384x_RID_TXRATECNTL ((u16)0xFC84)
213#define HFA384x_RID_PROMISCMODE ((u16)0xFC85)
214
215
216
217
218#define HFA384x_RID_MAXLOADTIME ((u16)0xFD00)
219#define HFA384x_RID_DOWNLOADBUFFER ((u16)0xFD01)
220#define HFA384x_RID_PRIIDENTITY ((u16)0xFD02)
221#define HFA384x_RID_PRISUPRANGE ((u16)0xFD03)
222#define HFA384x_RID_PRI_CFIACTRANGES ((u16)0xFD04)
223#define HFA384x_RID_NICSERIALNUMBER ((u16)0xFD0A)
224#define HFA384x_RID_NICIDENTITY ((u16)0xFD0B)
225#define HFA384x_RID_MFISUPRANGE ((u16)0xFD0C)
226#define HFA384x_RID_CFISUPRANGE ((u16)0xFD0D)
227#define HFA384x_RID_STAIDENTITY ((u16)0xFD20)
228#define HFA384x_RID_STASUPRANGE ((u16)0xFD21)
229#define HFA384x_RID_STA_MFIACTRANGES ((u16)0xFD22)
230#define HFA384x_RID_STA_CFIACTRANGES ((u16)0xFD23)
231
232
233
234
235
236
237#define HFA384x_RID_NICSERIALNUMBER_LEN ((u16)12)
238
239
240
241
242#define HFA384x_RID_PORTSTATUS ((u16)0xFD40)
243#define HFA384x_RID_CURRENTSSID ((u16)0xFD41)
244#define HFA384x_RID_CURRENTBSSID ((u16)0xFD42)
245#define HFA384x_RID_CURRENTTXRATE ((u16)0xFD44)
246#define HFA384x_RID_SHORTRETRYLIMIT ((u16)0xFD48)
247#define HFA384x_RID_LONGRETRYLIMIT ((u16)0xFD49)
248#define HFA384x_RID_MAXTXLIFETIME ((u16)0xFD4A)
249#define HFA384x_RID_PRIVACYOPTIMP ((u16)0xFD4F)
250#define HFA384x_RID_DBMCOMMSQUALITY ((u16)0xFD51)
251
252
253
254
255
256
257#define HFA384x_RID_DBMCOMMSQUALITY_LEN \
258 ((u16) sizeof(hfa384x_dbmcommsquality_t))
259#define HFA384x_RID_JOINREQUEST_LEN \
260 ((u16)sizeof(hfa384x_JoinRequest_data_t))
261
262
263
264
265#define HFA384x_RID_CURRENTCHANNEL ((u16)0xFDC1)
266
267
268
269
270#define HFA384x_RID_CNFWEPDEFAULTKEYID ((u16)0xFC23)
271#define HFA384x_RID_CNFWEPDEFAULTKEY0 ((u16)0xFC24)
272#define HFA384x_RID_CNFWEPDEFAULTKEY1 ((u16)0xFC25)
273#define HFA384x_RID_CNFWEPDEFAULTKEY2 ((u16)0xFC26)
274#define HFA384x_RID_CNFWEPDEFAULTKEY3 ((u16)0xFC27)
275#define HFA384x_RID_CNFWEPFLAGS ((u16)0xFC28)
276#define HFA384x_RID_CNFAUTHENTICATION ((u16)0xFC2A)
277#define HFA384x_RID_CNFROAMINGMODE ((u16)0xFC2D)
278#define HFA384x_RID_CNFAPBCNint ((u16)0xFC33)
279#define HFA384x_RID_CNFDBMADJUST ((u16)0xFC46)
280#define HFA384x_RID_CNFWPADATA ((u16)0xFC48)
281#define HFA384x_RID_CNFBASICRATES ((u16)0xFCB3)
282#define HFA384x_RID_CNFSUPPRATES ((u16)0xFCB4)
283#define HFA384x_RID_CNFPASSIVESCANCTRL ((u16)0xFCBA)
284#define HFA384x_RID_TXPOWERMAX ((u16)0xFCBE)
285#define HFA384x_RID_JOINREQUEST ((u16)0xFCE2)
286#define HFA384x_RID_AUTHENTICATESTA ((u16)0xFCE3)
287#define HFA384x_RID_HOSTSCAN ((u16)0xFCE5)
288
289#define HFA384x_RID_CNFWEPDEFAULTKEY_LEN ((u16)6)
290#define HFA384x_RID_CNFWEP128DEFAULTKEY_LEN ((u16)14)
291
292
293
294
295#define HFA384x_PDR_PCB_PARTNUM ((u16)0x0001)
296#define HFA384x_PDR_PDAVER ((u16)0x0002)
297#define HFA384x_PDR_NIC_SERIAL ((u16)0x0003)
298#define HFA384x_PDR_MKK_MEASUREMENTS ((u16)0x0004)
299#define HFA384x_PDR_NIC_RAMSIZE ((u16)0x0005)
300#define HFA384x_PDR_MFISUPRANGE ((u16)0x0006)
301#define HFA384x_PDR_CFISUPRANGE ((u16)0x0007)
302#define HFA384x_PDR_NICID ((u16)0x0008)
303#define HFA384x_PDR_MAC_ADDRESS ((u16)0x0101)
304#define HFA384x_PDR_REGDOMAIN ((u16)0x0103)
305#define HFA384x_PDR_ALLOWED_CHANNEL ((u16)0x0104)
306#define HFA384x_PDR_DEFAULT_CHANNEL ((u16)0x0105)
307#define HFA384x_PDR_TEMPTYPE ((u16)0x0107)
308#define HFA384x_PDR_IFR_SETTING ((u16)0x0200)
309#define HFA384x_PDR_RFR_SETTING ((u16)0x0201)
310#define HFA384x_PDR_HFA3861_BASELINE ((u16)0x0202)
311#define HFA384x_PDR_HFA3861_SHADOW ((u16)0x0203)
312#define HFA384x_PDR_HFA3861_IFRF ((u16)0x0204)
313#define HFA384x_PDR_HFA3861_CHCALSP ((u16)0x0300)
314#define HFA384x_PDR_HFA3861_CHCALI ((u16)0x0301)
315#define HFA384x_PDR_MAX_TX_POWER ((u16)0x0302)
316#define HFA384x_PDR_MASTER_CHAN_LIST ((u16)0x0303)
317#define HFA384x_PDR_3842_NIC_CONFIG ((u16)0x0400)
318#define HFA384x_PDR_USB_ID ((u16)0x0401)
319#define HFA384x_PDR_PCI_ID ((u16)0x0402)
320#define HFA384x_PDR_PCI_IFCONF ((u16)0x0403)
321#define HFA384x_PDR_PCI_PMCONF ((u16)0x0404)
322#define HFA384x_PDR_RFENRGY ((u16)0x0406)
323#define HFA384x_PDR_USB_POWER_TYPE ((u16)0x0407)
324#define HFA384x_PDR_USB_MAX_POWER ((u16)0x0409)
325#define HFA384x_PDR_USB_MANUFACTURER ((u16)0x0410)
326#define HFA384x_PDR_USB_PRODUCT ((u16)0x0411)
327#define HFA384x_PDR_ANT_DIVERSITY ((u16)0x0412)
328#define HFA384x_PDR_HFO_DELAY ((u16)0x0413)
329#define HFA384x_PDR_SCALE_THRESH ((u16)0x0414)
330
331#define HFA384x_PDR_HFA3861_MANF_TESTSP ((u16)0x0900)
332#define HFA384x_PDR_HFA3861_MANF_TESTI ((u16)0x0901)
333#define HFA384x_PDR_END_OF_PDA ((u16)0x0000)
334
335
336
337#define HFA384x_CMD_AINFO_SET(value) ((u16)((u16)(value) << 8))
338#define HFA384x_CMD_MACPORT_SET(value) \
339 ((u16)HFA384x_CMD_AINFO_SET(value))
340#define HFA384x_CMD_PROGMODE_SET(value) \
341 ((u16)HFA384x_CMD_AINFO_SET((u16)value))
342#define HFA384x_CMD_CMDCODE_SET(value) ((u16)(value))
343
344#define HFA384x_STATUS_RESULT_SET(value) (((u16)(value)) << 8)
345
346
347#define HFA384x_STATE_PREINIT 0
348#define HFA384x_STATE_INIT 1
349#define HFA384x_STATE_RUNNING 2
350
351
352
353typedef struct hfa384x_bytestr {
354 u16 len;
355 u8 data[0];
356} __packed hfa384x_bytestr_t;
357
358typedef struct hfa384x_bytestr32 {
359 u16 len;
360 u8 data[32];
361} __packed hfa384x_bytestr32_t;
362
363
364
365
366
367
368
369typedef struct hfa384x_compident {
370 u16 id;
371 u16 variant;
372 u16 major;
373 u16 minor;
374} __packed hfa384x_compident_t;
375
376typedef struct hfa384x_caplevel {
377 u16 role;
378 u16 id;
379 u16 variant;
380 u16 bottom;
381 u16 top;
382} __packed hfa384x_caplevel_t;
383
384
385#define HFA384x_CNFAUTHENTICATION_OPENSYSTEM 0x0001
386#define HFA384x_CNFAUTHENTICATION_SHAREDKEY 0x0002
387#define HFA384x_CNFAUTHENTICATION_LEAP 0x0004
388
389
390
391
392
393
394#define HFA384x_CREATEIBSS_JOINCREATEIBSS 0
395
396
397typedef struct hfa384x_HostScanRequest_data {
398 u16 channelList;
399 u16 txRate;
400 hfa384x_bytestr32_t ssid;
401} __packed hfa384x_HostScanRequest_data_t;
402
403
404typedef struct hfa384x_JoinRequest_data {
405 u8 bssid[WLAN_BSSID_LEN];
406 u16 channel;
407} __packed hfa384x_JoinRequest_data_t;
408
409
410typedef struct hfa384x_authenticateStation_data {
411 u8 address[ETH_ALEN];
412 u16 status;
413 u16 algorithm;
414} __packed hfa384x_authenticateStation_data_t;
415
416
417typedef struct hfa384x_WPAData {
418 u16 datalen;
419 u8 data[0];
420} __packed hfa384x_WPAData_t;
421
422
423
424
425
426
427
428typedef struct hfa384x_downloadbuffer {
429 u16 page;
430 u16 offset;
431 u16 len;
432} __packed hfa384x_downloadbuffer_t;
433
434
435
436
437
438#define HFA384x_PSTATUS_CONN_IBSS ((u16)3)
439
440
441typedef struct hfa384x_commsquality {
442 u16 CQ_currBSS;
443 u16 ASL_currBSS;
444 u16 ANL_currFC;
445} __packed hfa384x_commsquality_t;
446
447
448typedef struct hfa384x_dbmcommsquality {
449 u16 CQdbm_currBSS;
450 u16 ASLdbm_currBSS;
451 u16 ANLdbm_currFC;
452} __packed hfa384x_dbmcommsquality_t;
453
454
455
456
457
458
459
460typedef struct hfa384x_tx_frame {
461 u16 status;
462 u16 reserved1;
463 u16 reserved2;
464 u32 sw_support;
465 u8 tx_retrycount;
466 u8 tx_rate;
467 u16 tx_control;
468
469
470
471 u16 frame_control;
472 u16 duration_id;
473 u8 address1[6];
474 u8 address2[6];
475 u8 address3[6];
476 u16 sequence_control;
477 u8 address4[6];
478 u16 data_len;
479
480
481
482 u8 dest_addr[6];
483 u8 src_addr[6];
484 u16 data_length;
485} __packed hfa384x_tx_frame_t;
486
487
488
489
490#define HFA384x_TXSTATUS_ACKERR ((u16)BIT(5))
491#define HFA384x_TXSTATUS_FORMERR ((u16)BIT(3))
492#define HFA384x_TXSTATUS_DISCON ((u16)BIT(2))
493#define HFA384x_TXSTATUS_AGEDERR ((u16)BIT(1))
494#define HFA384x_TXSTATUS_RETRYERR ((u16)BIT(0))
495
496#define HFA384x_TX_MACPORT ((u16)(BIT(10) | \
497 BIT(9) | BIT(8)))
498#define HFA384x_TX_STRUCTYPE ((u16)(BIT(4) | BIT(3)))
499#define HFA384x_TX_TXEX ((u16)BIT(2))
500#define HFA384x_TX_TXOK ((u16)BIT(1))
501
502
503
504
505#define HFA384x_TXSTATUS_ISERROR(v) \
506 (((u16)(v))&\
507 (HFA384x_TXSTATUS_ACKERR|HFA384x_TXSTATUS_FORMERR|\
508 HFA384x_TXSTATUS_DISCON|HFA384x_TXSTATUS_AGEDERR|\
509 HFA384x_TXSTATUS_RETRYERR))
510
511#define HFA384x_TX_SET(v, m, s) ((((u16)(v))<<((u16)(s)))&((u16)(m)))
512
513#define HFA384x_TX_MACPORT_SET(v) HFA384x_TX_SET(v, HFA384x_TX_MACPORT, 8)
514#define HFA384x_TX_STRUCTYPE_SET(v) HFA384x_TX_SET(v, \
515 HFA384x_TX_STRUCTYPE, 3)
516#define HFA384x_TX_TXEX_SET(v) HFA384x_TX_SET(v, HFA384x_TX_TXEX, 2)
517#define HFA384x_TX_TXOK_SET(v) HFA384x_TX_SET(v, HFA384x_TX_TXOK, 1)
518
519
520
521
522typedef struct hfa384x_rx_frame {
523
524 u16 status;
525 u32 time;
526 u8 silence;
527 u8 signal;
528 u8 rate;
529 u8 rx_flow;
530 u16 reserved1;
531 u16 reserved2;
532
533
534 u16 frame_control;
535 u16 duration_id;
536 u8 address1[6];
537 u8 address2[6];
538 u8 address3[6];
539 u16 sequence_control;
540 u8 address4[6];
541 u16 data_len;
542
543
544 u8 dest_addr[6];
545 u8 src_addr[6];
546 u16 data_length;
547} __packed hfa384x_rx_frame_t;
548
549
550
551
552
553#define HFA384x_RXSTATUS_MACPORT ((u16)(BIT(10) | \
554 BIT(9) | \
555 BIT(8)))
556#define HFA384x_RXSTATUS_FCSERR ((u16)BIT(0))
557
558
559
560#define HFA384x_RXSTATUS_MACPORT_GET(value) ((u16)((((u16)(value)) \
561 & HFA384x_RXSTATUS_MACPORT) >> 8))
562#define HFA384x_RXSTATUS_ISFCSERR(value) ((u16)(((u16)(value)) \
563 & HFA384x_RXSTATUS_FCSERR))
564
565
566
567
568
569#define HFA384x_IT_HANDOVERADDR ((u16)0xF000UL)
570#define HFA384x_IT_COMMTALLIES ((u16)0xF100UL)
571#define HFA384x_IT_SCANRESULTS ((u16)0xF101UL)
572#define HFA384x_IT_CHINFORESULTS ((u16)0xF102UL)
573#define HFA384x_IT_HOSTSCANRESULTS ((u16)0xF103UL)
574#define HFA384x_IT_LINKSTATUS ((u16)0xF200UL)
575#define HFA384x_IT_ASSOCSTATUS ((u16)0xF201UL)
576#define HFA384x_IT_AUTHREQ ((u16)0xF202UL)
577#define HFA384x_IT_PSUSERCNT ((u16)0xF203UL)
578#define HFA384x_IT_KEYIDCHANGED ((u16)0xF204UL)
579#define HFA384x_IT_ASSOCREQ ((u16)0xF205UL)
580#define HFA384x_IT_MICFAILURE ((u16)0xF206UL)
581
582
583
584
585
586
587
588
589typedef struct hfa384x_CommTallies16 {
590 u16 txunicastframes;
591 u16 txmulticastframes;
592 u16 txfragments;
593 u16 txunicastoctets;
594 u16 txmulticastoctets;
595 u16 txdeferredtrans;
596 u16 txsingleretryframes;
597 u16 txmultipleretryframes;
598 u16 txretrylimitexceeded;
599 u16 txdiscards;
600 u16 rxunicastframes;
601 u16 rxmulticastframes;
602 u16 rxfragments;
603 u16 rxunicastoctets;
604 u16 rxmulticastoctets;
605 u16 rxfcserrors;
606 u16 rxdiscardsnobuffer;
607 u16 txdiscardswrongsa;
608 u16 rxdiscardswepundecr;
609 u16 rxmsginmsgfrag;
610 u16 rxmsginbadmsgfrag;
611} __packed hfa384x_CommTallies16_t;
612
613typedef struct hfa384x_CommTallies32 {
614 u32 txunicastframes;
615 u32 txmulticastframes;
616 u32 txfragments;
617 u32 txunicastoctets;
618 u32 txmulticastoctets;
619 u32 txdeferredtrans;
620 u32 txsingleretryframes;
621 u32 txmultipleretryframes;
622 u32 txretrylimitexceeded;
623 u32 txdiscards;
624 u32 rxunicastframes;
625 u32 rxmulticastframes;
626 u32 rxfragments;
627 u32 rxunicastoctets;
628 u32 rxmulticastoctets;
629 u32 rxfcserrors;
630 u32 rxdiscardsnobuffer;
631 u32 txdiscardswrongsa;
632 u32 rxdiscardswepundecr;
633 u32 rxmsginmsgfrag;
634 u32 rxmsginbadmsgfrag;
635} __packed hfa384x_CommTallies32_t;
636
637
638typedef struct hfa384x_ScanResultSub {
639 u16 chid;
640 u16 anl;
641 u16 sl;
642 u8 bssid[WLAN_BSSID_LEN];
643 u16 bcnint;
644 u16 capinfo;
645 hfa384x_bytestr32_t ssid;
646 u8 supprates[10];
647 u16 proberesp_rate;
648} __packed hfa384x_ScanResultSub_t;
649
650typedef struct hfa384x_ScanResult {
651 u16 rsvd;
652 u16 scanreason;
653 hfa384x_ScanResultSub_t result[HFA384x_SCANRESULT_MAX];
654} __packed hfa384x_ScanResult_t;
655
656
657typedef struct hfa384x_ChInfoResultSub {
658 u16 chid;
659 u16 anl;
660 u16 pnl;
661 u16 active;
662} __packed hfa384x_ChInfoResultSub_t;
663
664#define HFA384x_CHINFORESULT_BSSACTIVE BIT(0)
665#define HFA384x_CHINFORESULT_PCFACTIVE BIT(1)
666
667typedef struct hfa384x_ChInfoResult {
668 u16 scanchannels;
669 hfa384x_ChInfoResultSub_t result[HFA384x_CHINFORESULT_MAX];
670} __packed hfa384x_ChInfoResult_t;
671
672
673typedef struct hfa384x_HScanResultSub {
674 u16 chid;
675 u16 anl;
676 u16 sl;
677 u8 bssid[WLAN_BSSID_LEN];
678 u16 bcnint;
679 u16 capinfo;
680 hfa384x_bytestr32_t ssid;
681 u8 supprates[10];
682 u16 proberesp_rate;
683 u16 atim;
684} __packed hfa384x_HScanResultSub_t;
685
686typedef struct hfa384x_HScanResult {
687 u16 nresult;
688 u16 rsvd;
689 hfa384x_HScanResultSub_t result[HFA384x_HSCANRESULT_MAX];
690} __packed hfa384x_HScanResult_t;
691
692
693
694#define HFA384x_LINK_NOTCONNECTED ((u16)0)
695#define HFA384x_LINK_CONNECTED ((u16)1)
696#define HFA384x_LINK_DISCONNECTED ((u16)2)
697#define HFA384x_LINK_AP_CHANGE ((u16)3)
698#define HFA384x_LINK_AP_OUTOFRANGE ((u16)4)
699#define HFA384x_LINK_AP_INRANGE ((u16)5)
700#define HFA384x_LINK_ASSOCFAIL ((u16)6)
701
702typedef struct hfa384x_LinkStatus {
703 u16 linkstatus;
704} __packed hfa384x_LinkStatus_t;
705
706
707
708#define HFA384x_ASSOCSTATUS_STAASSOC ((u16)1)
709#define HFA384x_ASSOCSTATUS_REASSOC ((u16)2)
710#define HFA384x_ASSOCSTATUS_AUTHFAIL ((u16)5)
711
712typedef struct hfa384x_AssocStatus {
713 u16 assocstatus;
714 u8 sta_addr[ETH_ALEN];
715
716 u8 old_ap_addr[ETH_ALEN];
717 u16 reason;
718 u16 reserved;
719} __packed hfa384x_AssocStatus_t;
720
721
722
723typedef struct hfa384x_AuthRequest {
724 u8 sta_addr[ETH_ALEN];
725 u16 algorithm;
726} __packed hfa384x_AuthReq_t;
727
728
729
730typedef struct hfa384x_PSUserCount {
731 u16 usercnt;
732} __packed hfa384x_PSUserCount_t;
733
734typedef struct hfa384x_KeyIDChanged {
735 u8 sta_addr[ETH_ALEN];
736 u16 keyid;
737} __packed hfa384x_KeyIDChanged_t;
738
739
740typedef union hfa384x_infodata {
741 hfa384x_CommTallies16_t commtallies16;
742 hfa384x_CommTallies32_t commtallies32;
743 hfa384x_ScanResult_t scanresult;
744 hfa384x_ChInfoResult_t chinforesult;
745 hfa384x_HScanResult_t hscanresult;
746 hfa384x_LinkStatus_t linkstatus;
747 hfa384x_AssocStatus_t assocstatus;
748 hfa384x_AuthReq_t authreq;
749 hfa384x_PSUserCount_t psusercnt;
750 hfa384x_KeyIDChanged_t keyidchanged;
751} __packed hfa384x_infodata_t;
752
753typedef struct hfa384x_InfFrame {
754 u16 framelen;
755 u16 infotype;
756 hfa384x_infodata_t info;
757} __packed hfa384x_InfFrame_t;
758
759
760
761
762
763
764#define HFA384x_USB_TXFRM 0
765#define HFA384x_USB_CMDREQ 1
766#define HFA384x_USB_WRIDREQ 2
767#define HFA384x_USB_RRIDREQ 3
768#define HFA384x_USB_WMEMREQ 4
769#define HFA384x_USB_RMEMREQ 5
770
771
772#define HFA384x_USB_ISTXFRM(a) (((a) & 0x9000) == 0x1000)
773#define HFA384x_USB_ISRXFRM(a) (!((a) & 0x9000))
774#define HFA384x_USB_INFOFRM 0x8000
775#define HFA384x_USB_CMDRESP 0x8001
776#define HFA384x_USB_WRIDRESP 0x8002
777#define HFA384x_USB_RRIDRESP 0x8003
778#define HFA384x_USB_WMEMRESP 0x8004
779#define HFA384x_USB_RMEMRESP 0x8005
780#define HFA384x_USB_BUFAVAIL 0x8006
781#define HFA384x_USB_ERROR 0x8007
782
783
784
785
786typedef struct hfa384x_usb_txfrm {
787 hfa384x_tx_frame_t desc;
788 u8 data[WLAN_DATA_MAXLEN];
789} __packed hfa384x_usb_txfrm_t;
790
791typedef struct hfa384x_usb_cmdreq {
792 u16 type;
793 u16 cmd;
794 u16 parm0;
795 u16 parm1;
796 u16 parm2;
797 u8 pad[54];
798} __packed hfa384x_usb_cmdreq_t;
799
800typedef struct hfa384x_usb_wridreq {
801 u16 type;
802 u16 frmlen;
803 u16 rid;
804 u8 data[HFA384x_RIDDATA_MAXLEN];
805} __packed hfa384x_usb_wridreq_t;
806
807typedef struct hfa384x_usb_rridreq {
808 u16 type;
809 u16 frmlen;
810 u16 rid;
811 u8 pad[58];
812} __packed hfa384x_usb_rridreq_t;
813
814typedef struct hfa384x_usb_wmemreq {
815 u16 type;
816 u16 frmlen;
817 u16 offset;
818 u16 page;
819 u8 data[HFA384x_USB_RWMEM_MAXLEN];
820} __packed hfa384x_usb_wmemreq_t;
821
822typedef struct hfa384x_usb_rmemreq {
823 u16 type;
824 u16 frmlen;
825 u16 offset;
826 u16 page;
827 u8 pad[56];
828} __packed hfa384x_usb_rmemreq_t;
829
830
831
832
833typedef struct hfa384x_usb_rxfrm {
834 hfa384x_rx_frame_t desc;
835 u8 data[WLAN_DATA_MAXLEN];
836} __packed hfa384x_usb_rxfrm_t;
837
838typedef struct hfa384x_usb_infofrm {
839 u16 type;
840 hfa384x_InfFrame_t info;
841} __packed hfa384x_usb_infofrm_t;
842
843typedef struct hfa384x_usb_statusresp {
844 u16 type;
845 u16 status;
846 u16 resp0;
847 u16 resp1;
848 u16 resp2;
849} __packed hfa384x_usb_cmdresp_t;
850
851typedef hfa384x_usb_cmdresp_t hfa384x_usb_wridresp_t;
852
853typedef struct hfa384x_usb_rridresp {
854 u16 type;
855 u16 frmlen;
856 u16 rid;
857 u8 data[HFA384x_RIDDATA_MAXLEN];
858} __packed hfa384x_usb_rridresp_t;
859
860typedef hfa384x_usb_cmdresp_t hfa384x_usb_wmemresp_t;
861
862typedef struct hfa384x_usb_rmemresp {
863 u16 type;
864 u16 frmlen;
865 u8 data[HFA384x_USB_RWMEM_MAXLEN];
866} __packed hfa384x_usb_rmemresp_t;
867
868typedef struct hfa384x_usb_bufavail {
869 u16 type;
870 u16 frmlen;
871} __packed hfa384x_usb_bufavail_t;
872
873typedef struct hfa384x_usb_error {
874 u16 type;
875 u16 errortype;
876} __packed hfa384x_usb_error_t;
877
878
879
880
881typedef union hfa384x_usbout {
882 u16 type;
883 hfa384x_usb_txfrm_t txfrm;
884 hfa384x_usb_cmdreq_t cmdreq;
885 hfa384x_usb_wridreq_t wridreq;
886 hfa384x_usb_rridreq_t rridreq;
887 hfa384x_usb_wmemreq_t wmemreq;
888 hfa384x_usb_rmemreq_t rmemreq;
889} __packed hfa384x_usbout_t;
890
891typedef union hfa384x_usbin {
892 u16 type;
893 hfa384x_usb_rxfrm_t rxfrm;
894 hfa384x_usb_txfrm_t txfrm;
895 hfa384x_usb_infofrm_t infofrm;
896 hfa384x_usb_cmdresp_t cmdresp;
897 hfa384x_usb_wridresp_t wridresp;
898 hfa384x_usb_rridresp_t rridresp;
899 hfa384x_usb_wmemresp_t wmemresp;
900 hfa384x_usb_rmemresp_t rmemresp;
901 hfa384x_usb_bufavail_t bufavail;
902 hfa384x_usb_error_t usberror;
903 u8 boguspad[3000];
904} __packed hfa384x_usbin_t;
905
906
907
908
909
910typedef struct hfa384x_pdr_pcb_partnum {
911 u8 num[8];
912} __packed hfa384x_pdr_pcb_partnum_t;
913
914typedef struct hfa384x_pdr_pcb_tracenum {
915 u8 num[8];
916} __packed hfa384x_pdr_pcb_tracenum_t;
917
918typedef struct hfa384x_pdr_nic_serial {
919 u8 num[12];
920} __packed hfa384x_pdr_nic_serial_t;
921
922typedef struct hfa384x_pdr_mkk_measurements {
923 double carrier_freq;
924 double occupied_band;
925 double power_density;
926 double tx_spur_f1;
927 double tx_spur_f2;
928 double tx_spur_f3;
929 double tx_spur_f4;
930 double tx_spur_l1;
931 double tx_spur_l2;
932 double tx_spur_l3;
933 double tx_spur_l4;
934 double rx_spur_f1;
935 double rx_spur_f2;
936 double rx_spur_l1;
937 double rx_spur_l2;
938} __packed hfa384x_pdr_mkk_measurements_t;
939
940typedef struct hfa384x_pdr_nic_ramsize {
941 u8 size[12];
942} __packed hfa384x_pdr_nic_ramsize_t;
943
944typedef struct hfa384x_pdr_mfisuprange {
945 u16 id;
946 u16 variant;
947 u16 bottom;
948 u16 top;
949} __packed hfa384x_pdr_mfisuprange_t;
950
951typedef struct hfa384x_pdr_cfisuprange {
952 u16 id;
953 u16 variant;
954 u16 bottom;
955 u16 top;
956} __packed hfa384x_pdr_cfisuprange_t;
957
958typedef struct hfa384x_pdr_nicid {
959 u16 id;
960 u16 variant;
961 u16 major;
962 u16 minor;
963} __packed hfa384x_pdr_nicid_t;
964
965typedef struct hfa384x_pdr_refdac_measurements {
966 u16 value[0];
967} __packed hfa384x_pdr_refdac_measurements_t;
968
969typedef struct hfa384x_pdr_vgdac_measurements {
970 u16 value[0];
971} __packed hfa384x_pdr_vgdac_measurements_t;
972
973typedef struct hfa384x_pdr_level_comp_measurements {
974 u16 value[0];
975} __packed hfa384x_pdr_level_compc_measurements_t;
976
977typedef struct hfa384x_pdr_mac_address {
978 u8 addr[6];
979} __packed hfa384x_pdr_mac_address_t;
980
981typedef struct hfa384x_pdr_mkk_callname {
982 u8 callname[8];
983} __packed hfa384x_pdr_mkk_callname_t;
984
985typedef struct hfa384x_pdr_regdomain {
986 u16 numdomains;
987 u16 domain[5];
988} __packed hfa384x_pdr_regdomain_t;
989
990typedef struct hfa384x_pdr_allowed_channel {
991 u16 ch_bitmap;
992} __packed hfa384x_pdr_allowed_channel_t;
993
994typedef struct hfa384x_pdr_default_channel {
995 u16 channel;
996} __packed hfa384x_pdr_default_channel_t;
997
998typedef struct hfa384x_pdr_privacy_option {
999 u16 available;
1000} __packed hfa384x_pdr_privacy_option_t;
1001
1002typedef struct hfa384x_pdr_temptype {
1003 u16 type;
1004} __packed hfa384x_pdr_temptype_t;
1005
1006typedef struct hfa384x_pdr_refdac_setup {
1007 u16 ch_value[14];
1008} __packed hfa384x_pdr_refdac_setup_t;
1009
1010typedef struct hfa384x_pdr_vgdac_setup {
1011 u16 ch_value[14];
1012} __packed hfa384x_pdr_vgdac_setup_t;
1013
1014typedef struct hfa384x_pdr_level_comp_setup {
1015 u16 ch_value[14];
1016} __packed hfa384x_pdr_level_comp_setup_t;
1017
1018typedef struct hfa384x_pdr_trimdac_setup {
1019 u16 trimidac;
1020 u16 trimqdac;
1021} __packed hfa384x_pdr_trimdac_setup_t;
1022
1023typedef struct hfa384x_pdr_ifr_setting {
1024 u16 value[3];
1025} __packed hfa384x_pdr_ifr_setting_t;
1026
1027typedef struct hfa384x_pdr_rfr_setting {
1028 u16 value[3];
1029} __packed hfa384x_pdr_rfr_setting_t;
1030
1031typedef struct hfa384x_pdr_hfa3861_baseline {
1032 u16 value[50];
1033} __packed hfa384x_pdr_hfa3861_baseline_t;
1034
1035typedef struct hfa384x_pdr_hfa3861_shadow {
1036 u32 value[32];
1037} __packed hfa384x_pdr_hfa3861_shadow_t;
1038
1039typedef struct hfa384x_pdr_hfa3861_ifrf {
1040 u32 value[20];
1041} __packed hfa384x_pdr_hfa3861_ifrf_t;
1042
1043typedef struct hfa384x_pdr_hfa3861_chcalsp {
1044 u16 value[14];
1045} __packed hfa384x_pdr_hfa3861_chcalsp_t;
1046
1047typedef struct hfa384x_pdr_hfa3861_chcali {
1048 u16 value[17];
1049} __packed hfa384x_pdr_hfa3861_chcali_t;
1050
1051typedef struct hfa384x_pdr_hfa3861_nic_config {
1052 u16 config_bitmap;
1053} __packed hfa384x_pdr_nic_config_t;
1054
1055typedef struct hfa384x_pdr_hfo_delay {
1056 u8 hfo_delay;
1057} __packed hfa384x_hfo_delay_t;
1058
1059typedef struct hfa384x_pdr_hfa3861_manf_testsp {
1060 u16 value[30];
1061} __packed hfa384x_pdr_hfa3861_manf_testsp_t;
1062
1063typedef struct hfa384x_pdr_hfa3861_manf_testi {
1064 u16 value[30];
1065} __packed hfa384x_pdr_hfa3861_manf_testi_t;
1066
1067typedef struct hfa384x_end_of_pda {
1068 u16 crc;
1069} __packed hfa384x_pdr_end_of_pda_t;
1070
1071typedef struct hfa384x_pdrec {
1072 u16 len;
1073 u16 code;
1074 union pdr {
1075 hfa384x_pdr_pcb_partnum_t pcb_partnum;
1076 hfa384x_pdr_pcb_tracenum_t pcb_tracenum;
1077 hfa384x_pdr_nic_serial_t nic_serial;
1078 hfa384x_pdr_mkk_measurements_t mkk_measurements;
1079 hfa384x_pdr_nic_ramsize_t nic_ramsize;
1080 hfa384x_pdr_mfisuprange_t mfisuprange;
1081 hfa384x_pdr_cfisuprange_t cfisuprange;
1082 hfa384x_pdr_nicid_t nicid;
1083 hfa384x_pdr_refdac_measurements_t refdac_measurements;
1084 hfa384x_pdr_vgdac_measurements_t vgdac_measurements;
1085 hfa384x_pdr_level_compc_measurements_t level_compc_measurements;
1086 hfa384x_pdr_mac_address_t mac_address;
1087 hfa384x_pdr_mkk_callname_t mkk_callname;
1088 hfa384x_pdr_regdomain_t regdomain;
1089 hfa384x_pdr_allowed_channel_t allowed_channel;
1090 hfa384x_pdr_default_channel_t default_channel;
1091 hfa384x_pdr_privacy_option_t privacy_option;
1092 hfa384x_pdr_temptype_t temptype;
1093 hfa384x_pdr_refdac_setup_t refdac_setup;
1094 hfa384x_pdr_vgdac_setup_t vgdac_setup;
1095 hfa384x_pdr_level_comp_setup_t level_comp_setup;
1096 hfa384x_pdr_trimdac_setup_t trimdac_setup;
1097 hfa384x_pdr_ifr_setting_t ifr_setting;
1098 hfa384x_pdr_rfr_setting_t rfr_setting;
1099 hfa384x_pdr_hfa3861_baseline_t hfa3861_baseline;
1100 hfa384x_pdr_hfa3861_shadow_t hfa3861_shadow;
1101 hfa384x_pdr_hfa3861_ifrf_t hfa3861_ifrf;
1102 hfa384x_pdr_hfa3861_chcalsp_t hfa3861_chcalsp;
1103 hfa384x_pdr_hfa3861_chcali_t hfa3861_chcali;
1104 hfa384x_pdr_nic_config_t nic_config;
1105 hfa384x_hfo_delay_t hfo_delay;
1106 hfa384x_pdr_hfa3861_manf_testsp_t hfa3861_manf_testsp;
1107 hfa384x_pdr_hfa3861_manf_testi_t hfa3861_manf_testi;
1108 hfa384x_pdr_end_of_pda_t end_of_pda;
1109
1110 } data;
1111} __packed hfa384x_pdrec_t;
1112
1113#ifdef __KERNEL__
1114
1115
1116
1117
1118typedef struct hfa384x_statusresult {
1119 u16 status;
1120 u16 resp0;
1121 u16 resp1;
1122 u16 resp2;
1123} hfa384x_cmdresult_t;
1124
1125
1126
1127
1128
1129
1130
1131
1132typedef struct hfa384x_rridresult {
1133 u16 rid;
1134 const void *riddata;
1135 unsigned int riddata_len;
1136} hfa384x_rridresult_t;
1137
1138enum ctlx_state {
1139 CTLX_START = 0,
1140
1141 CTLX_COMPLETE,
1142 CTLX_REQ_FAILED,
1143
1144 CTLX_PENDING,
1145 CTLX_REQ_SUBMITTED,
1146 CTLX_REQ_COMPLETE,
1147 CTLX_RESP_COMPLETE
1148};
1149typedef enum ctlx_state CTLX_STATE;
1150
1151struct hfa384x_usbctlx;
1152struct hfa384x;
1153
1154typedef void (*ctlx_cmdcb_t) (struct hfa384x *, const struct hfa384x_usbctlx *);
1155
1156typedef void (*ctlx_usercb_t) (struct hfa384x *hw,
1157 void *ctlxresult, void *usercb_data);
1158
1159typedef struct hfa384x_usbctlx {
1160 struct list_head list;
1161
1162 size_t outbufsize;
1163 hfa384x_usbout_t outbuf;
1164 hfa384x_usbin_t inbuf;
1165
1166 CTLX_STATE state;
1167
1168 struct completion done;
1169 volatile int reapable;
1170
1171 ctlx_cmdcb_t cmdcb;
1172 ctlx_usercb_t usercb;
1173 void *usercb_data;
1174
1175 int variant;
1176} hfa384x_usbctlx_t;
1177
1178typedef struct hfa384x_usbctlxq {
1179 spinlock_t lock;
1180 struct list_head pending;
1181 struct list_head active;
1182 struct list_head completing;
1183 struct list_head reapable;
1184} hfa384x_usbctlxq_t;
1185
1186typedef struct hfa484x_metacmd {
1187 u16 cmd;
1188
1189 u16 parm0;
1190 u16 parm1;
1191 u16 parm2;
1192
1193 hfa384x_cmdresult_t result;
1194} hfa384x_metacmd_t;
1195
1196#define MAX_GRP_ADDR 32
1197#define WLAN_COMMENT_MAX 80
1198
1199#define WLAN_AUTH_MAX 60
1200#define WLAN_ACCESS_MAX 60
1201#define WLAN_ACCESS_NONE 0
1202#define WLAN_ACCESS_ALL 1
1203#define WLAN_ACCESS_ALLOW 2
1204#define WLAN_ACCESS_DENY 3
1205
1206
1207typedef struct prism2sta_authlist {
1208 unsigned int cnt;
1209 u8 addr[WLAN_AUTH_MAX][ETH_ALEN];
1210 u8 assoc[WLAN_AUTH_MAX];
1211} prism2sta_authlist_t;
1212
1213typedef struct prism2sta_accesslist {
1214 unsigned int modify;
1215 unsigned int cnt;
1216 u8 addr[WLAN_ACCESS_MAX][ETH_ALEN];
1217 unsigned int cnt1;
1218 u8 addr1[WLAN_ACCESS_MAX][ETH_ALEN];
1219} prism2sta_accesslist_t;
1220
1221typedef struct hfa384x {
1222
1223 struct usb_device *usb;
1224 struct urb rx_urb;
1225 struct sk_buff *rx_urb_skb;
1226 struct urb tx_urb;
1227 struct urb ctlx_urb;
1228 hfa384x_usbout_t txbuff;
1229 hfa384x_usbctlxq_t ctlxq;
1230 struct timer_list reqtimer;
1231 struct timer_list resptimer;
1232
1233 struct timer_list throttle;
1234
1235 struct tasklet_struct reaper_bh;
1236 struct tasklet_struct completion_bh;
1237
1238 struct work_struct usb_work;
1239
1240 unsigned long usb_flags;
1241#define THROTTLE_RX 0
1242#define THROTTLE_TX 1
1243#define WORK_RX_HALT 2
1244#define WORK_TX_HALT 3
1245#define WORK_RX_RESUME 4
1246#define WORK_TX_RESUME 5
1247
1248 unsigned short req_timer_done:1;
1249 unsigned short resp_timer_done:1;
1250
1251 int endp_in;
1252 int endp_out;
1253
1254 int sniff_fcs;
1255 int sniff_channel;
1256 int sniff_truncate;
1257 int sniffhdr;
1258
1259 wait_queue_head_t cmdq;
1260
1261
1262 u32 state;
1263 u32 isap;
1264 u8 port_enabled[HFA384x_NUMPORTS_MAX];
1265
1266
1267 unsigned int dlstate;
1268 hfa384x_downloadbuffer_t bufinfo;
1269 u16 dltimeout;
1270
1271 int scanflag;
1272 int join_ap;
1273 int join_retries;
1274 hfa384x_JoinRequest_data_t joinreq;
1275
1276 wlandevice_t *wlandev;
1277
1278 struct work_struct link_bh;
1279
1280 struct work_struct commsqual_bh;
1281 hfa384x_commsquality_t qual;
1282 struct timer_list commsqual_timer;
1283
1284 u16 link_status;
1285 u16 link_status_new;
1286 struct sk_buff_head authq;
1287
1288 u32 txrate;
1289
1290
1291
1292
1293 unsigned int presniff_port_type;
1294 u16 presniff_wepflags;
1295 u32 dot11_desired_bss_type;
1296
1297 int dbmadjust;
1298
1299
1300
1301 u8 dot11_grp_addr[MAX_GRP_ADDR][ETH_ALEN];
1302 unsigned int dot11_grpcnt;
1303
1304
1305 hfa384x_compident_t ident_nic;
1306 hfa384x_compident_t ident_pri_fw;
1307 hfa384x_compident_t ident_sta_fw;
1308 hfa384x_compident_t ident_ap_fw;
1309 u16 mm_mods;
1310
1311
1312 hfa384x_caplevel_t cap_sup_mfi;
1313 hfa384x_caplevel_t cap_sup_cfi;
1314 hfa384x_caplevel_t cap_sup_pri;
1315 hfa384x_caplevel_t cap_sup_sta;
1316 hfa384x_caplevel_t cap_sup_ap;
1317
1318
1319 hfa384x_caplevel_t cap_act_pri_cfi;
1320
1321
1322
1323
1324 hfa384x_caplevel_t cap_act_sta_cfi;
1325
1326
1327
1328
1329 hfa384x_caplevel_t cap_act_sta_mfi;
1330
1331 hfa384x_caplevel_t cap_act_ap_cfi;
1332
1333
1334
1335
1336 hfa384x_caplevel_t cap_act_ap_mfi;
1337
1338 u32 psusercount;
1339 hfa384x_CommTallies32_t tallies;
1340 u8 comment[WLAN_COMMENT_MAX + 1];
1341
1342
1343 struct {
1344 atomic_t done;
1345 u8 count;
1346 hfa384x_ChInfoResult_t results;
1347 } channel_info;
1348
1349 hfa384x_InfFrame_t *scanresults;
1350
1351 prism2sta_authlist_t authlist;
1352 unsigned int accessmode;
1353 prism2sta_accesslist_t allow;
1354 prism2sta_accesslist_t deny;
1355
1356} hfa384x_t;
1357
1358void hfa384x_create(hfa384x_t *hw, struct usb_device *usb);
1359void hfa384x_destroy(hfa384x_t *hw);
1360
1361int
1362hfa384x_corereset(hfa384x_t *hw, int holdtime, int settletime, int genesis);
1363int hfa384x_drvr_commtallies(hfa384x_t *hw);
1364int hfa384x_drvr_disable(hfa384x_t *hw, u16 macport);
1365int hfa384x_drvr_enable(hfa384x_t *hw, u16 macport);
1366int hfa384x_drvr_flashdl_enable(hfa384x_t *hw);
1367int hfa384x_drvr_flashdl_disable(hfa384x_t *hw);
1368int hfa384x_drvr_flashdl_write(hfa384x_t *hw, u32 daddr, void *buf, u32 len);
1369int hfa384x_drvr_getconfig(hfa384x_t *hw, u16 rid, void *buf, u16 len);
1370int hfa384x_drvr_ramdl_enable(hfa384x_t *hw, u32 exeaddr);
1371int hfa384x_drvr_ramdl_disable(hfa384x_t *hw);
1372int hfa384x_drvr_ramdl_write(hfa384x_t *hw, u32 daddr, void *buf, u32 len);
1373int hfa384x_drvr_readpda(hfa384x_t *hw, void *buf, unsigned int len);
1374int hfa384x_drvr_setconfig(hfa384x_t *hw, u16 rid, void *buf, u16 len);
1375
1376static inline int hfa384x_drvr_getconfig16(hfa384x_t *hw, u16 rid, void *val)
1377{
1378 int result = 0;
1379 result = hfa384x_drvr_getconfig(hw, rid, val, sizeof(u16));
1380 if (result == 0)
1381 *((u16 *) val) = le16_to_cpu(*((u16 *) val));
1382 return result;
1383}
1384
1385static inline int hfa384x_drvr_setconfig16(hfa384x_t *hw, u16 rid, u16 val)
1386{
1387 u16 value = cpu_to_le16(val);
1388 return hfa384x_drvr_setconfig(hw, rid, &value, sizeof(value));
1389}
1390
1391int
1392hfa384x_drvr_getconfig_async(hfa384x_t *hw,
1393 u16 rid, ctlx_usercb_t usercb, void *usercb_data);
1394
1395int
1396hfa384x_drvr_setconfig_async(hfa384x_t *hw,
1397 u16 rid,
1398 void *buf,
1399 u16 len, ctlx_usercb_t usercb, void *usercb_data);
1400
1401static inline int
1402hfa384x_drvr_setconfig16_async(hfa384x_t *hw, u16 rid, u16 val)
1403{
1404 u16 value = cpu_to_le16(val);
1405 return hfa384x_drvr_setconfig_async(hw, rid, &value, sizeof(value),
1406 NULL, NULL);
1407}
1408
1409int hfa384x_drvr_start(hfa384x_t *hw);
1410int hfa384x_drvr_stop(hfa384x_t *hw);
1411int
1412hfa384x_drvr_txframe(hfa384x_t *hw, struct sk_buff *skb,
1413 union p80211_hdr *p80211_hdr, struct p80211_metawep *p80211_wep);
1414void hfa384x_tx_timeout(wlandevice_t *wlandev);
1415
1416int hfa384x_cmd_initialize(hfa384x_t *hw);
1417int hfa384x_cmd_enable(hfa384x_t *hw, u16 macport);
1418int hfa384x_cmd_disable(hfa384x_t *hw, u16 macport);
1419int hfa384x_cmd_allocate(hfa384x_t *hw, u16 len);
1420int hfa384x_cmd_monitor(hfa384x_t *hw, u16 enable);
1421int
1422hfa384x_cmd_download(hfa384x_t *hw,
1423 u16 mode, u16 lowaddr, u16 highaddr, u16 codelen);
1424
1425#endif
1426
1427#endif
1428
