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8
9
10static char *serial_version = "$Revision: 1.25 $";
11
12#include <linux/types.h>
13#include <linux/errno.h>
14#include <linux/signal.h>
15#include <linux/sched.h>
16#include <linux/timer.h>
17#include <linux/interrupt.h>
18#include <linux/tty.h>
19#include <linux/tty_flip.h>
20#include <linux/major.h>
21#include <linux/string.h>
22#include <linux/fcntl.h>
23#include <linux/mm.h>
24#include <linux/slab.h>
25#include <linux/init.h>
26#include <linux/kernel.h>
27#include <linux/mutex.h>
28#include <linux/bitops.h>
29#include <linux/seq_file.h>
30#include <linux/delay.h>
31#include <linux/module.h>
32#include <linux/uaccess.h>
33#include <linux/io.h>
34
35#include <asm/irq.h>
36#include <asm/dma.h>
37
38#include <arch/svinto.h>
39#include <arch/system.h>
40
41
42#include <linux/serial.h>
43
44#include "crisv10.h"
45#include <asm/fasttimer.h>
46#include <arch/io_interface_mux.h>
47
48#ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
49#ifndef CONFIG_ETRAX_FAST_TIMER
50#error "Enable FAST_TIMER to use SERIAL_FAST_TIMER"
51#endif
52#endif
53
54#if defined(CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS) && \
55 (CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS == 0)
56#error "RX_TIMEOUT_TICKS == 0 not allowed, use 1"
57#endif
58
59#if defined(CONFIG_ETRAX_RS485_ON_PA) && defined(CONFIG_ETRAX_RS485_ON_PORT_G)
60#error "Disable either CONFIG_ETRAX_RS485_ON_PA or CONFIG_ETRAX_RS485_ON_PORT_G"
61#endif
62
63
64
65
66
67#if defined(LOCAL_HEADERS)
68#include "serial_compat.h"
69#endif
70
71struct tty_driver *serial_driver;
72
73
74#define WAKEUP_CHARS 256
75
76
77
78
79
80
81
82
83
84
85
86
87
88#define SERIAL_HANDLE_EARLY_ERRORS
89
90
91#define SERIAL_DESCR_BUF_SIZE 256
92
93#define SERIAL_PRESCALE_BASE 3125000
94#define DEF_BAUD_BASE SERIAL_PRESCALE_BASE
95
96
97
98#define MIN_FLUSH_TIME_USEC 250
99
100
101#define TIMERD(x)
102
103#define DINTR1(x)
104#define DINTR2(x)
105
106#define DFLIP(x)
107
108#define DFLOW(x)
109#define DBAUD(x)
110#define DLOG_INT_TRIG(x)
111
112
113#ifndef DEBUG_LOG_INCLUDED
114#define DEBUG_LOG(line, string, value)
115#else
116struct debug_log_info
117{
118 unsigned long time;
119 unsigned long timer_data;
120
121 const char *string;
122 int value;
123};
124#define DEBUG_LOG_SIZE 4096
125
126struct debug_log_info debug_log[DEBUG_LOG_SIZE];
127int debug_log_pos = 0;
128
129#define DEBUG_LOG(_line, _string, _value) do { \
130 if ((_line) == SERIAL_DEBUG_LINE) {\
131 debug_log_func(_line, _string, _value); \
132 }\
133}while(0)
134
135void debug_log_func(int line, const char *string, int value)
136{
137 if (debug_log_pos < DEBUG_LOG_SIZE) {
138 debug_log[debug_log_pos].time = jiffies;
139 debug_log[debug_log_pos].timer_data = *R_TIMER_DATA;
140
141 debug_log[debug_log_pos].string = string;
142 debug_log[debug_log_pos].value = value;
143 debug_log_pos++;
144 }
145
146}
147#endif
148
149#ifndef CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS
150
151
152
153
154#define CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS 5
155#endif
156
157unsigned long timer_data_to_ns(unsigned long timer_data);
158
159static void change_speed(struct e100_serial *info);
160static void rs_throttle(struct tty_struct * tty);
161static void rs_wait_until_sent(struct tty_struct *tty, int timeout);
162static int rs_write(struct tty_struct *tty,
163 const unsigned char *buf, int count);
164#ifdef CONFIG_ETRAX_RS485
165static int e100_write_rs485(struct tty_struct *tty,
166 const unsigned char *buf, int count);
167#endif
168static int get_lsr_info(struct e100_serial *info, unsigned int *value);
169
170
171#define DEF_BAUD 115200
172#define DEF_RX 0x20
173
174#define DEF_TX 0x80
175
176
177
178#define REG_DATA 0
179#define REG_DATA_STATUS32 0
180#define REG_TR_DATA 0
181#define REG_STATUS 1
182#define REG_TR_CTRL 1
183#define REG_REC_CTRL 2
184#define REG_BAUD 3
185#define REG_XOFF 4
186
187
188#define SER_RXD_MASK IO_MASK(R_SERIAL0_STATUS, rxd)
189#define SER_DATA_AVAIL_MASK IO_MASK(R_SERIAL0_STATUS, data_avail)
190#define SER_FRAMING_ERR_MASK IO_MASK(R_SERIAL0_STATUS, framing_err)
191#define SER_PAR_ERR_MASK IO_MASK(R_SERIAL0_STATUS, par_err)
192#define SER_OVERRUN_MASK IO_MASK(R_SERIAL0_STATUS, overrun)
193
194#define SER_ERROR_MASK (SER_OVERRUN_MASK | SER_PAR_ERR_MASK | SER_FRAMING_ERR_MASK)
195
196
197#define ERRCODE_SET_BREAK (TTY_BREAK)
198#define ERRCODE_INSERT 0x100
199#define ERRCODE_INSERT_BREAK (ERRCODE_INSERT | TTY_BREAK)
200
201#define FORCE_EOP(info) *R_SET_EOP = 1U << info->iseteop;
202
203
204
205
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208
209
210
211
212
213
214
215
216static const unsigned long e100_ser_int_mask = 0
217#ifdef CONFIG_ETRAX_SERIAL_PORT0
218| IO_MASK(R_IRQ_MASK1_RD, ser0_data) | IO_MASK(R_IRQ_MASK1_RD, ser0_ready)
219#endif
220#ifdef CONFIG_ETRAX_SERIAL_PORT1
221| IO_MASK(R_IRQ_MASK1_RD, ser1_data) | IO_MASK(R_IRQ_MASK1_RD, ser1_ready)
222#endif
223#ifdef CONFIG_ETRAX_SERIAL_PORT2
224| IO_MASK(R_IRQ_MASK1_RD, ser2_data) | IO_MASK(R_IRQ_MASK1_RD, ser2_ready)
225#endif
226#ifdef CONFIG_ETRAX_SERIAL_PORT3
227| IO_MASK(R_IRQ_MASK1_RD, ser3_data) | IO_MASK(R_IRQ_MASK1_RD, ser3_ready)
228#endif
229;
230unsigned long r_alt_ser_baudrate_shadow = 0;
231
232
233
234
235
236static struct e100_serial rs_table[] = {
237 { .baud = DEF_BAUD,
238 .ioport = (unsigned char *)R_SERIAL0_CTRL,
239 .irq = 1U << 12,
240 .oclrintradr = R_DMA_CH6_CLR_INTR,
241 .ofirstadr = R_DMA_CH6_FIRST,
242 .ocmdadr = R_DMA_CH6_CMD,
243 .ostatusadr = R_DMA_CH6_STATUS,
244 .iclrintradr = R_DMA_CH7_CLR_INTR,
245 .ifirstadr = R_DMA_CH7_FIRST,
246 .icmdadr = R_DMA_CH7_CMD,
247 .idescradr = R_DMA_CH7_DESCR,
248 .rx_ctrl = DEF_RX,
249 .tx_ctrl = DEF_TX,
250 .iseteop = 2,
251 .dma_owner = dma_ser0,
252 .io_if = if_serial_0,
253#ifdef CONFIG_ETRAX_SERIAL_PORT0
254 .enabled = 1,
255#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
256 .dma_out_enabled = 1,
257 .dma_out_nbr = SER0_TX_DMA_NBR,
258 .dma_out_irq_nbr = SER0_DMA_TX_IRQ_NBR,
259 .dma_out_irq_flags = 0,
260 .dma_out_irq_description = "serial 0 dma tr",
261#else
262 .dma_out_enabled = 0,
263 .dma_out_nbr = UINT_MAX,
264 .dma_out_irq_nbr = 0,
265 .dma_out_irq_flags = 0,
266 .dma_out_irq_description = NULL,
267#endif
268#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
269 .dma_in_enabled = 1,
270 .dma_in_nbr = SER0_RX_DMA_NBR,
271 .dma_in_irq_nbr = SER0_DMA_RX_IRQ_NBR,
272 .dma_in_irq_flags = 0,
273 .dma_in_irq_description = "serial 0 dma rec",
274#else
275 .dma_in_enabled = 0,
276 .dma_in_nbr = UINT_MAX,
277 .dma_in_irq_nbr = 0,
278 .dma_in_irq_flags = 0,
279 .dma_in_irq_description = NULL,
280#endif
281#else
282 .enabled = 0,
283 .io_if_description = NULL,
284 .dma_out_enabled = 0,
285 .dma_in_enabled = 0
286#endif
287
288},
289#ifndef CONFIG_SVINTO_SIM
290 { .baud = DEF_BAUD,
291 .ioport = (unsigned char *)R_SERIAL1_CTRL,
292 .irq = 1U << 16,
293 .oclrintradr = R_DMA_CH8_CLR_INTR,
294 .ofirstadr = R_DMA_CH8_FIRST,
295 .ocmdadr = R_DMA_CH8_CMD,
296 .ostatusadr = R_DMA_CH8_STATUS,
297 .iclrintradr = R_DMA_CH9_CLR_INTR,
298 .ifirstadr = R_DMA_CH9_FIRST,
299 .icmdadr = R_DMA_CH9_CMD,
300 .idescradr = R_DMA_CH9_DESCR,
301 .rx_ctrl = DEF_RX,
302 .tx_ctrl = DEF_TX,
303 .iseteop = 3,
304 .dma_owner = dma_ser1,
305 .io_if = if_serial_1,
306#ifdef CONFIG_ETRAX_SERIAL_PORT1
307 .enabled = 1,
308 .io_if_description = "ser1",
309#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT
310 .dma_out_enabled = 1,
311 .dma_out_nbr = SER1_TX_DMA_NBR,
312 .dma_out_irq_nbr = SER1_DMA_TX_IRQ_NBR,
313 .dma_out_irq_flags = 0,
314 .dma_out_irq_description = "serial 1 dma tr",
315#else
316 .dma_out_enabled = 0,
317 .dma_out_nbr = UINT_MAX,
318 .dma_out_irq_nbr = 0,
319 .dma_out_irq_flags = 0,
320 .dma_out_irq_description = NULL,
321#endif
322#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN
323 .dma_in_enabled = 1,
324 .dma_in_nbr = SER1_RX_DMA_NBR,
325 .dma_in_irq_nbr = SER1_DMA_RX_IRQ_NBR,
326 .dma_in_irq_flags = 0,
327 .dma_in_irq_description = "serial 1 dma rec",
328#else
329 .dma_in_enabled = 0,
330 .dma_in_enabled = 0,
331 .dma_in_nbr = UINT_MAX,
332 .dma_in_irq_nbr = 0,
333 .dma_in_irq_flags = 0,
334 .dma_in_irq_description = NULL,
335#endif
336#else
337 .enabled = 0,
338 .io_if_description = NULL,
339 .dma_in_irq_nbr = 0,
340 .dma_out_enabled = 0,
341 .dma_in_enabled = 0
342#endif
343},
344
345 { .baud = DEF_BAUD,
346 .ioport = (unsigned char *)R_SERIAL2_CTRL,
347 .irq = 1U << 4,
348 .oclrintradr = R_DMA_CH2_CLR_INTR,
349 .ofirstadr = R_DMA_CH2_FIRST,
350 .ocmdadr = R_DMA_CH2_CMD,
351 .ostatusadr = R_DMA_CH2_STATUS,
352 .iclrintradr = R_DMA_CH3_CLR_INTR,
353 .ifirstadr = R_DMA_CH3_FIRST,
354 .icmdadr = R_DMA_CH3_CMD,
355 .idescradr = R_DMA_CH3_DESCR,
356 .rx_ctrl = DEF_RX,
357 .tx_ctrl = DEF_TX,
358 .iseteop = 0,
359 .dma_owner = dma_ser2,
360 .io_if = if_serial_2,
361#ifdef CONFIG_ETRAX_SERIAL_PORT2
362 .enabled = 1,
363 .io_if_description = "ser2",
364#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
365 .dma_out_enabled = 1,
366 .dma_out_nbr = SER2_TX_DMA_NBR,
367 .dma_out_irq_nbr = SER2_DMA_TX_IRQ_NBR,
368 .dma_out_irq_flags = 0,
369 .dma_out_irq_description = "serial 2 dma tr",
370#else
371 .dma_out_enabled = 0,
372 .dma_out_nbr = UINT_MAX,
373 .dma_out_irq_nbr = 0,
374 .dma_out_irq_flags = 0,
375 .dma_out_irq_description = NULL,
376#endif
377#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
378 .dma_in_enabled = 1,
379 .dma_in_nbr = SER2_RX_DMA_NBR,
380 .dma_in_irq_nbr = SER2_DMA_RX_IRQ_NBR,
381 .dma_in_irq_flags = 0,
382 .dma_in_irq_description = "serial 2 dma rec",
383#else
384 .dma_in_enabled = 0,
385 .dma_in_nbr = UINT_MAX,
386 .dma_in_irq_nbr = 0,
387 .dma_in_irq_flags = 0,
388 .dma_in_irq_description = NULL,
389#endif
390#else
391 .enabled = 0,
392 .io_if_description = NULL,
393 .dma_out_enabled = 0,
394 .dma_in_enabled = 0
395#endif
396 },
397
398 { .baud = DEF_BAUD,
399 .ioport = (unsigned char *)R_SERIAL3_CTRL,
400 .irq = 1U << 8,
401 .oclrintradr = R_DMA_CH4_CLR_INTR,
402 .ofirstadr = R_DMA_CH4_FIRST,
403 .ocmdadr = R_DMA_CH4_CMD,
404 .ostatusadr = R_DMA_CH4_STATUS,
405 .iclrintradr = R_DMA_CH5_CLR_INTR,
406 .ifirstadr = R_DMA_CH5_FIRST,
407 .icmdadr = R_DMA_CH5_CMD,
408 .idescradr = R_DMA_CH5_DESCR,
409 .rx_ctrl = DEF_RX,
410 .tx_ctrl = DEF_TX,
411 .iseteop = 1,
412 .dma_owner = dma_ser3,
413 .io_if = if_serial_3,
414#ifdef CONFIG_ETRAX_SERIAL_PORT3
415 .enabled = 1,
416 .io_if_description = "ser3",
417#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT
418 .dma_out_enabled = 1,
419 .dma_out_nbr = SER3_TX_DMA_NBR,
420 .dma_out_irq_nbr = SER3_DMA_TX_IRQ_NBR,
421 .dma_out_irq_flags = 0,
422 .dma_out_irq_description = "serial 3 dma tr",
423#else
424 .dma_out_enabled = 0,
425 .dma_out_nbr = UINT_MAX,
426 .dma_out_irq_nbr = 0,
427 .dma_out_irq_flags = 0,
428 .dma_out_irq_description = NULL,
429#endif
430#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN
431 .dma_in_enabled = 1,
432 .dma_in_nbr = SER3_RX_DMA_NBR,
433 .dma_in_irq_nbr = SER3_DMA_RX_IRQ_NBR,
434 .dma_in_irq_flags = 0,
435 .dma_in_irq_description = "serial 3 dma rec",
436#else
437 .dma_in_enabled = 0,
438 .dma_in_nbr = UINT_MAX,
439 .dma_in_irq_nbr = 0,
440 .dma_in_irq_flags = 0,
441 .dma_in_irq_description = NULL
442#endif
443#else
444 .enabled = 0,
445 .io_if_description = NULL,
446 .dma_out_enabled = 0,
447 .dma_in_enabled = 0
448#endif
449 }
450#endif
451};
452
453
454#define NR_PORTS (sizeof(rs_table)/sizeof(struct e100_serial))
455
456#ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
457static struct fast_timer fast_timers[NR_PORTS];
458#endif
459
460#ifdef CONFIG_ETRAX_SERIAL_PROC_ENTRY
461#define PROCSTAT(x) x
462struct ser_statistics_type {
463 int overrun_cnt;
464 int early_errors_cnt;
465 int ser_ints_ok_cnt;
466 int errors_cnt;
467 unsigned long int processing_flip;
468 unsigned long processing_flip_still_room;
469 unsigned long int timeout_flush_cnt;
470 int rx_dma_ints;
471 int tx_dma_ints;
472 int rx_tot;
473 int tx_tot;
474};
475
476static struct ser_statistics_type ser_stat[NR_PORTS];
477
478#else
479
480#define PROCSTAT(x)
481
482#endif
483
484
485#if defined(CONFIG_ETRAX_RS485)
486#ifdef CONFIG_ETRAX_FAST_TIMER
487static struct fast_timer fast_timers_rs485[NR_PORTS];
488#endif
489#if defined(CONFIG_ETRAX_RS485_ON_PA)
490static int rs485_pa_bit = CONFIG_ETRAX_RS485_ON_PA_BIT;
491#endif
492#if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
493static int rs485_port_g_bit = CONFIG_ETRAX_RS485_ON_PORT_G_BIT;
494#endif
495#endif
496
497
498#define E100_STRUCT_PORT(line, pinname) \
499 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
500 (R_PORT_PA_DATA): ( \
501 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
502 (R_PORT_PB_DATA):&dummy_ser[line]))
503
504#define E100_STRUCT_SHADOW(line, pinname) \
505 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
506 (&port_pa_data_shadow): ( \
507 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
508 (&port_pb_data_shadow):&dummy_ser[line]))
509#define E100_STRUCT_MASK(line, pinname) \
510 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
511 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT): ( \
512 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
513 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT):DUMMY_##pinname##_MASK))
514
515#define DUMMY_DTR_MASK 1
516#define DUMMY_RI_MASK 2
517#define DUMMY_DSR_MASK 4
518#define DUMMY_CD_MASK 8
519static unsigned char dummy_ser[NR_PORTS] = {0xFF, 0xFF, 0xFF,0xFF};
520
521
522#ifdef CONFIG_ETRAX_SERIAL_PORT0
523
524#define SER0_PA_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PA_BIT+CONFIG_ETRAX_SER0_RI_ON_PA_BIT+CONFIG_ETRAX_SER0_DSR_ON_PA_BIT+CONFIG_ETRAX_SER0_CD_ON_PA_BIT)
525
526#if SER0_PA_BITSUM != -4
527# if CONFIG_ETRAX_SER0_DTR_ON_PA_BIT == -1
528# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
529# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
530# endif
531# endif
532# if CONFIG_ETRAX_SER0_RI_ON_PA_BIT == -1
533# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
534# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
535# endif
536# endif
537# if CONFIG_ETRAX_SER0_DSR_ON_PA_BIT == -1
538# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
539# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
540# endif
541# endif
542# if CONFIG_ETRAX_SER0_CD_ON_PA_BIT == -1
543# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
544# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
545# endif
546# endif
547#endif
548
549#define SER0_PB_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PB_BIT+CONFIG_ETRAX_SER0_RI_ON_PB_BIT+CONFIG_ETRAX_SER0_DSR_ON_PB_BIT+CONFIG_ETRAX_SER0_CD_ON_PB_BIT)
550
551#if SER0_PB_BITSUM != -4
552# if CONFIG_ETRAX_SER0_DTR_ON_PB_BIT == -1
553# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
554# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
555# endif
556# endif
557# if CONFIG_ETRAX_SER0_RI_ON_PB_BIT == -1
558# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
559# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
560# endif
561# endif
562# if CONFIG_ETRAX_SER0_DSR_ON_PB_BIT == -1
563# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
564# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
565# endif
566# endif
567# if CONFIG_ETRAX_SER0_CD_ON_PB_BIT == -1
568# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
569# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
570# endif
571# endif
572#endif
573
574#endif
575
576
577#ifdef CONFIG_ETRAX_SERIAL_PORT1
578
579#define SER1_PA_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PA_BIT+CONFIG_ETRAX_SER1_RI_ON_PA_BIT+CONFIG_ETRAX_SER1_DSR_ON_PA_BIT+CONFIG_ETRAX_SER1_CD_ON_PA_BIT)
580
581#if SER1_PA_BITSUM != -4
582# if CONFIG_ETRAX_SER1_DTR_ON_PA_BIT == -1
583# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
584# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
585# endif
586# endif
587# if CONFIG_ETRAX_SER1_RI_ON_PA_BIT == -1
588# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
589# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
590# endif
591# endif
592# if CONFIG_ETRAX_SER1_DSR_ON_PA_BIT == -1
593# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
594# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
595# endif
596# endif
597# if CONFIG_ETRAX_SER1_CD_ON_PA_BIT == -1
598# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
599# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
600# endif
601# endif
602#endif
603
604#define SER1_PB_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PB_BIT+CONFIG_ETRAX_SER1_RI_ON_PB_BIT+CONFIG_ETRAX_SER1_DSR_ON_PB_BIT+CONFIG_ETRAX_SER1_CD_ON_PB_BIT)
605
606#if SER1_PB_BITSUM != -4
607# if CONFIG_ETRAX_SER1_DTR_ON_PB_BIT == -1
608# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
609# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
610# endif
611# endif
612# if CONFIG_ETRAX_SER1_RI_ON_PB_BIT == -1
613# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
614# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
615# endif
616# endif
617# if CONFIG_ETRAX_SER1_DSR_ON_PB_BIT == -1
618# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
619# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
620# endif
621# endif
622# if CONFIG_ETRAX_SER1_CD_ON_PB_BIT == -1
623# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
624# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
625# endif
626# endif
627#endif
628
629#endif
630
631#ifdef CONFIG_ETRAX_SERIAL_PORT2
632
633#define SER2_PA_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PA_BIT+CONFIG_ETRAX_SER2_RI_ON_PA_BIT+CONFIG_ETRAX_SER2_DSR_ON_PA_BIT+CONFIG_ETRAX_SER2_CD_ON_PA_BIT)
634
635#if SER2_PA_BITSUM != -4
636# if CONFIG_ETRAX_SER2_DTR_ON_PA_BIT == -1
637# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
638# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
639# endif
640# endif
641# if CONFIG_ETRAX_SER2_RI_ON_PA_BIT == -1
642# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
643# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
644# endif
645# endif
646# if CONFIG_ETRAX_SER2_DSR_ON_PA_BIT == -1
647# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
648# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
649# endif
650# endif
651# if CONFIG_ETRAX_SER2_CD_ON_PA_BIT == -1
652# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
653# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
654# endif
655# endif
656#endif
657
658#define SER2_PB_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PB_BIT+CONFIG_ETRAX_SER2_RI_ON_PB_BIT+CONFIG_ETRAX_SER2_DSR_ON_PB_BIT+CONFIG_ETRAX_SER2_CD_ON_PB_BIT)
659
660#if SER2_PB_BITSUM != -4
661# if CONFIG_ETRAX_SER2_DTR_ON_PB_BIT == -1
662# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
663# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
664# endif
665# endif
666# if CONFIG_ETRAX_SER2_RI_ON_PB_BIT == -1
667# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
668# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
669# endif
670# endif
671# if CONFIG_ETRAX_SER2_DSR_ON_PB_BIT == -1
672# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
673# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
674# endif
675# endif
676# if CONFIG_ETRAX_SER2_CD_ON_PB_BIT == -1
677# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
678# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
679# endif
680# endif
681#endif
682
683#endif
684
685#ifdef CONFIG_ETRAX_SERIAL_PORT3
686
687#define SER3_PA_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PA_BIT+CONFIG_ETRAX_SER3_RI_ON_PA_BIT+CONFIG_ETRAX_SER3_DSR_ON_PA_BIT+CONFIG_ETRAX_SER3_CD_ON_PA_BIT)
688
689#if SER3_PA_BITSUM != -4
690# if CONFIG_ETRAX_SER3_DTR_ON_PA_BIT == -1
691# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
692# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
693# endif
694# endif
695# if CONFIG_ETRAX_SER3_RI_ON_PA_BIT == -1
696# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
697# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
698# endif
699# endif
700# if CONFIG_ETRAX_SER3_DSR_ON_PA_BIT == -1
701# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
702# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
703# endif
704# endif
705# if CONFIG_ETRAX_SER3_CD_ON_PA_BIT == -1
706# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
707# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
708# endif
709# endif
710#endif
711
712#define SER3_PB_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PB_BIT+CONFIG_ETRAX_SER3_RI_ON_PB_BIT+CONFIG_ETRAX_SER3_DSR_ON_PB_BIT+CONFIG_ETRAX_SER3_CD_ON_PB_BIT)
713
714#if SER3_PB_BITSUM != -4
715# if CONFIG_ETRAX_SER3_DTR_ON_PB_BIT == -1
716# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
717# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
718# endif
719# endif
720# if CONFIG_ETRAX_SER3_RI_ON_PB_BIT == -1
721# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
722# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
723# endif
724# endif
725# if CONFIG_ETRAX_SER3_DSR_ON_PB_BIT == -1
726# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
727# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
728# endif
729# endif
730# if CONFIG_ETRAX_SER3_CD_ON_PB_BIT == -1
731# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
732# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
733# endif
734# endif
735#endif
736
737#endif
738
739
740#if defined(CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED) || \
741 defined(CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED) || \
742 defined(CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED) || \
743 defined(CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED)
744#define CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
745#endif
746
747#ifdef CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
748
749#define CONTROL_PINS_PORT_NOT_USED(line) \
750 &dummy_ser[line], &dummy_ser[line], \
751 &dummy_ser[line], &dummy_ser[line], \
752 &dummy_ser[line], &dummy_ser[line], \
753 &dummy_ser[line], &dummy_ser[line], \
754 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
755
756
757struct control_pins
758{
759 volatile unsigned char *dtr_port;
760 unsigned char *dtr_shadow;
761 volatile unsigned char *ri_port;
762 unsigned char *ri_shadow;
763 volatile unsigned char *dsr_port;
764 unsigned char *dsr_shadow;
765 volatile unsigned char *cd_port;
766 unsigned char *cd_shadow;
767
768 unsigned char dtr_mask;
769 unsigned char ri_mask;
770 unsigned char dsr_mask;
771 unsigned char cd_mask;
772};
773
774static const struct control_pins e100_modem_pins[NR_PORTS] =
775{
776
777 {
778#ifdef CONFIG_ETRAX_SERIAL_PORT0
779 E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR),
780 E100_STRUCT_PORT(0,RI), E100_STRUCT_SHADOW(0,RI),
781 E100_STRUCT_PORT(0,DSR), E100_STRUCT_SHADOW(0,DSR),
782 E100_STRUCT_PORT(0,CD), E100_STRUCT_SHADOW(0,CD),
783 E100_STRUCT_MASK(0,DTR),
784 E100_STRUCT_MASK(0,RI),
785 E100_STRUCT_MASK(0,DSR),
786 E100_STRUCT_MASK(0,CD)
787#else
788 CONTROL_PINS_PORT_NOT_USED(0)
789#endif
790 },
791
792
793 {
794#ifdef CONFIG_ETRAX_SERIAL_PORT1
795 E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR),
796 E100_STRUCT_PORT(1,RI), E100_STRUCT_SHADOW(1,RI),
797 E100_STRUCT_PORT(1,DSR), E100_STRUCT_SHADOW(1,DSR),
798 E100_STRUCT_PORT(1,CD), E100_STRUCT_SHADOW(1,CD),
799 E100_STRUCT_MASK(1,DTR),
800 E100_STRUCT_MASK(1,RI),
801 E100_STRUCT_MASK(1,DSR),
802 E100_STRUCT_MASK(1,CD)
803#else
804 CONTROL_PINS_PORT_NOT_USED(1)
805#endif
806 },
807
808
809 {
810#ifdef CONFIG_ETRAX_SERIAL_PORT2
811 E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR),
812 E100_STRUCT_PORT(2,RI), E100_STRUCT_SHADOW(2,RI),
813 E100_STRUCT_PORT(2,DSR), E100_STRUCT_SHADOW(2,DSR),
814 E100_STRUCT_PORT(2,CD), E100_STRUCT_SHADOW(2,CD),
815 E100_STRUCT_MASK(2,DTR),
816 E100_STRUCT_MASK(2,RI),
817 E100_STRUCT_MASK(2,DSR),
818 E100_STRUCT_MASK(2,CD)
819#else
820 CONTROL_PINS_PORT_NOT_USED(2)
821#endif
822 },
823
824
825 {
826#ifdef CONFIG_ETRAX_SERIAL_PORT3
827 E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR),
828 E100_STRUCT_PORT(3,RI), E100_STRUCT_SHADOW(3,RI),
829 E100_STRUCT_PORT(3,DSR), E100_STRUCT_SHADOW(3,DSR),
830 E100_STRUCT_PORT(3,CD), E100_STRUCT_SHADOW(3,CD),
831 E100_STRUCT_MASK(3,DTR),
832 E100_STRUCT_MASK(3,RI),
833 E100_STRUCT_MASK(3,DSR),
834 E100_STRUCT_MASK(3,CD)
835#else
836 CONTROL_PINS_PORT_NOT_USED(3)
837#endif
838 }
839};
840#else
841
842
843#define CONTROL_PINS_PORT_NOT_USED(line) \
844 &dummy_ser[line], &dummy_ser[line], \
845 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
846
847
848struct control_pins
849{
850 volatile unsigned char *port;
851 unsigned char *shadow;
852
853 unsigned char dtr_mask;
854 unsigned char ri_mask;
855 unsigned char dsr_mask;
856 unsigned char cd_mask;
857};
858
859#define dtr_port port
860#define dtr_shadow shadow
861#define ri_port port
862#define ri_shadow shadow
863#define dsr_port port
864#define dsr_shadow shadow
865#define cd_port port
866#define cd_shadow shadow
867
868static const struct control_pins e100_modem_pins[NR_PORTS] =
869{
870
871 {
872#ifdef CONFIG_ETRAX_SERIAL_PORT0
873 E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR),
874 E100_STRUCT_MASK(0,DTR),
875 E100_STRUCT_MASK(0,RI),
876 E100_STRUCT_MASK(0,DSR),
877 E100_STRUCT_MASK(0,CD)
878#else
879 CONTROL_PINS_PORT_NOT_USED(0)
880#endif
881 },
882
883
884 {
885#ifdef CONFIG_ETRAX_SERIAL_PORT1
886 E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR),
887 E100_STRUCT_MASK(1,DTR),
888 E100_STRUCT_MASK(1,RI),
889 E100_STRUCT_MASK(1,DSR),
890 E100_STRUCT_MASK(1,CD)
891#else
892 CONTROL_PINS_PORT_NOT_USED(1)
893#endif
894 },
895
896
897 {
898#ifdef CONFIG_ETRAX_SERIAL_PORT2
899 E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR),
900 E100_STRUCT_MASK(2,DTR),
901 E100_STRUCT_MASK(2,RI),
902 E100_STRUCT_MASK(2,DSR),
903 E100_STRUCT_MASK(2,CD)
904#else
905 CONTROL_PINS_PORT_NOT_USED(2)
906#endif
907 },
908
909
910 {
911#ifdef CONFIG_ETRAX_SERIAL_PORT3
912 E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR),
913 E100_STRUCT_MASK(3,DTR),
914 E100_STRUCT_MASK(3,RI),
915 E100_STRUCT_MASK(3,DSR),
916 E100_STRUCT_MASK(3,CD)
917#else
918 CONTROL_PINS_PORT_NOT_USED(3)
919#endif
920 }
921};
922#endif
923
924#define E100_RTS_MASK 0x20
925#define E100_CTS_MASK 0x40
926
927
928
929
930
931
932
933
934
935#define E100_RTS_GET(info) ((info)->rx_ctrl & E100_RTS_MASK)
936
937#define E100_CTS_GET(info) ((info)->ioport[REG_STATUS] & E100_CTS_MASK)
938
939
940
941#define E100_DTR_GET(info) ((*e100_modem_pins[(info)->line].dtr_shadow) & e100_modem_pins[(info)->line].dtr_mask)
942
943
944#define E100_RI_GET(info) ((*e100_modem_pins[(info)->line].ri_port) & e100_modem_pins[(info)->line].ri_mask)
945#define E100_CD_GET(info) ((*e100_modem_pins[(info)->line].cd_port) & e100_modem_pins[(info)->line].cd_mask)
946
947
948#define E100_DSR_GET(info) ((*e100_modem_pins[(info)->line].dsr_port) & e100_modem_pins[(info)->line].dsr_mask)
949
950
951static void update_char_time(struct e100_serial * info)
952{
953 tcflag_t cflags = info->port.tty->termios.c_cflag;
954 int bits;
955
956
957
958 if ((cflags & CSIZE) == CS7)
959 bits = 9;
960 else
961 bits = 10;
962
963 if (cflags & CSTOPB)
964 bits++;
965
966 if (cflags & PARENB)
967 bits++;
968
969
970 info->char_time_usec = ((bits * 1000000) / info->baud) + 1;
971 info->flush_time_usec = 4*info->char_time_usec;
972 if (info->flush_time_usec < MIN_FLUSH_TIME_USEC)
973 info->flush_time_usec = MIN_FLUSH_TIME_USEC;
974
975}
976
977
978
979
980
981
982static int
983cflag_to_baud(unsigned int cflag)
984{
985 static int baud_table[] = {
986 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400,
987 4800, 9600, 19200, 38400 };
988
989 static int ext_baud_table[] = {
990 0, 57600, 115200, 230400, 460800, 921600, 1843200, 6250000,
991 0, 0, 0, 0, 0, 0, 0, 0 };
992
993 if (cflag & CBAUDEX)
994 return ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
995 else
996 return baud_table[cflag & CBAUD];
997}
998
999
1000
1001static unsigned char
1002cflag_to_etrax_baud(unsigned int cflag)
1003{
1004 char retval;
1005
1006 static char baud_table[] = {
1007 -1, -1, -1, -1, -1, -1, -1, 0, 1, 2, -1, 3, 4, 5, 6, 7 };
1008
1009 static char ext_baud_table[] = {
1010 -1, 8, 9, 10, 11, 12, 13, 14, -1, -1, -1, -1, -1, -1, -1, -1 };
1011
1012 if (cflag & CBAUDEX)
1013 retval = ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
1014 else
1015 retval = baud_table[cflag & CBAUD];
1016
1017 if (retval < 0) {
1018 printk(KERN_WARNING "serdriver tried setting invalid baud rate, flags %x.\n", cflag);
1019 retval = 5;
1020 }
1021
1022 return retval | (retval << 4);
1023}
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035static inline void
1036e100_dtr(struct e100_serial *info, int set)
1037{
1038#ifndef CONFIG_SVINTO_SIM
1039 unsigned char mask = e100_modem_pins[info->line].dtr_mask;
1040
1041#ifdef SERIAL_DEBUG_IO
1042 printk("ser%i dtr %i mask: 0x%02X\n", info->line, set, mask);
1043 printk("ser%i shadow before 0x%02X get: %i\n",
1044 info->line, *e100_modem_pins[info->line].dtr_shadow,
1045 E100_DTR_GET(info));
1046#endif
1047
1048 {
1049 unsigned long flags;
1050
1051 local_irq_save(flags);
1052 *e100_modem_pins[info->line].dtr_shadow &= ~mask;
1053 *e100_modem_pins[info->line].dtr_shadow |= (set ? 0 : mask);
1054 *e100_modem_pins[info->line].dtr_port = *e100_modem_pins[info->line].dtr_shadow;
1055 local_irq_restore(flags);
1056 }
1057
1058#ifdef SERIAL_DEBUG_IO
1059 printk("ser%i shadow after 0x%02X get: %i\n",
1060 info->line, *e100_modem_pins[info->line].dtr_shadow,
1061 E100_DTR_GET(info));
1062#endif
1063#endif
1064}
1065
1066
1067
1068
1069static inline void
1070e100_rts(struct e100_serial *info, int set)
1071{
1072#ifndef CONFIG_SVINTO_SIM
1073 unsigned long flags;
1074 local_irq_save(flags);
1075 info->rx_ctrl &= ~E100_RTS_MASK;
1076 info->rx_ctrl |= (set ? 0 : E100_RTS_MASK);
1077 info->ioport[REG_REC_CTRL] = info->rx_ctrl;
1078 local_irq_restore(flags);
1079#ifdef SERIAL_DEBUG_IO
1080 printk("ser%i rts %i\n", info->line, set);
1081#endif
1082#endif
1083}
1084
1085
1086
1087static inline void
1088e100_ri_out(struct e100_serial *info, int set)
1089{
1090#ifndef CONFIG_SVINTO_SIM
1091
1092 {
1093 unsigned char mask = e100_modem_pins[info->line].ri_mask;
1094 unsigned long flags;
1095
1096 local_irq_save(flags);
1097 *e100_modem_pins[info->line].ri_shadow &= ~mask;
1098 *e100_modem_pins[info->line].ri_shadow |= (set ? 0 : mask);
1099 *e100_modem_pins[info->line].ri_port = *e100_modem_pins[info->line].ri_shadow;
1100 local_irq_restore(flags);
1101 }
1102#endif
1103}
1104static inline void
1105e100_cd_out(struct e100_serial *info, int set)
1106{
1107#ifndef CONFIG_SVINTO_SIM
1108
1109 {
1110 unsigned char mask = e100_modem_pins[info->line].cd_mask;
1111 unsigned long flags;
1112
1113 local_irq_save(flags);
1114 *e100_modem_pins[info->line].cd_shadow &= ~mask;
1115 *e100_modem_pins[info->line].cd_shadow |= (set ? 0 : mask);
1116 *e100_modem_pins[info->line].cd_port = *e100_modem_pins[info->line].cd_shadow;
1117 local_irq_restore(flags);
1118 }
1119#endif
1120}
1121
1122static inline void
1123e100_disable_rx(struct e100_serial *info)
1124{
1125#ifndef CONFIG_SVINTO_SIM
1126
1127 info->ioport[REG_REC_CTRL] =
1128 (info->rx_ctrl &= ~IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1129#endif
1130}
1131
1132static inline void
1133e100_enable_rx(struct e100_serial *info)
1134{
1135#ifndef CONFIG_SVINTO_SIM
1136
1137 info->ioport[REG_REC_CTRL] =
1138 (info->rx_ctrl |= IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1139#endif
1140}
1141
1142
1143
1144static inline void
1145e100_disable_rxdma_irq(struct e100_serial *info)
1146{
1147#ifdef SERIAL_DEBUG_INTR
1148 printk("rxdma_irq(%d): 0\n",info->line);
1149#endif
1150 DINTR1(DEBUG_LOG(info->line,"IRQ disable_rxdma_irq %i\n", info->line));
1151 *R_IRQ_MASK2_CLR = (info->irq << 2) | (info->irq << 3);
1152}
1153
1154static inline void
1155e100_enable_rxdma_irq(struct e100_serial *info)
1156{
1157#ifdef SERIAL_DEBUG_INTR
1158 printk("rxdma_irq(%d): 1\n",info->line);
1159#endif
1160 DINTR1(DEBUG_LOG(info->line,"IRQ enable_rxdma_irq %i\n", info->line));
1161 *R_IRQ_MASK2_SET = (info->irq << 2) | (info->irq << 3);
1162}
1163
1164
1165
1166static void e100_disable_txdma_irq(struct e100_serial *info)
1167{
1168#ifdef SERIAL_DEBUG_INTR
1169 printk("txdma_irq(%d): 0\n",info->line);
1170#endif
1171 DINTR1(DEBUG_LOG(info->line,"IRQ disable_txdma_irq %i\n", info->line));
1172 *R_IRQ_MASK2_CLR = info->irq;
1173}
1174
1175static void e100_enable_txdma_irq(struct e100_serial *info)
1176{
1177#ifdef SERIAL_DEBUG_INTR
1178 printk("txdma_irq(%d): 1\n",info->line);
1179#endif
1180 DINTR1(DEBUG_LOG(info->line,"IRQ enable_txdma_irq %i\n", info->line));
1181 *R_IRQ_MASK2_SET = info->irq;
1182}
1183
1184static void e100_disable_txdma_channel(struct e100_serial *info)
1185{
1186 unsigned long flags;
1187
1188
1189
1190
1191 local_irq_save(flags);
1192 DFLOW(DEBUG_LOG(info->line, "disable_txdma_channel %i\n", info->line));
1193 if (info->line == 0) {
1194 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma6)) ==
1195 IO_STATE(R_GEN_CONFIG, dma6, serial0)) {
1196 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6);
1197 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, unused);
1198 }
1199 } else if (info->line == 1) {
1200 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma8)) ==
1201 IO_STATE(R_GEN_CONFIG, dma8, serial1)) {
1202 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8);
1203 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, usb);
1204 }
1205 } else if (info->line == 2) {
1206 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma2)) ==
1207 IO_STATE(R_GEN_CONFIG, dma2, serial2)) {
1208 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2);
1209 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, par0);
1210 }
1211 } else if (info->line == 3) {
1212 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma4)) ==
1213 IO_STATE(R_GEN_CONFIG, dma4, serial3)) {
1214 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4);
1215 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, par1);
1216 }
1217 }
1218 *R_GEN_CONFIG = genconfig_shadow;
1219 local_irq_restore(flags);
1220}
1221
1222
1223static void e100_enable_txdma_channel(struct e100_serial *info)
1224{
1225 unsigned long flags;
1226
1227 local_irq_save(flags);
1228 DFLOW(DEBUG_LOG(info->line, "enable_txdma_channel %i\n", info->line));
1229
1230 if (info->line == 0) {
1231 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6);
1232 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, serial0);
1233 } else if (info->line == 1) {
1234 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8);
1235 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, serial1);
1236 } else if (info->line == 2) {
1237 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2);
1238 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, serial2);
1239 } else if (info->line == 3) {
1240 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4);
1241 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, serial3);
1242 }
1243 *R_GEN_CONFIG = genconfig_shadow;
1244 local_irq_restore(flags);
1245}
1246
1247static void e100_disable_rxdma_channel(struct e100_serial *info)
1248{
1249 unsigned long flags;
1250
1251
1252
1253
1254 local_irq_save(flags);
1255 if (info->line == 0) {
1256 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma7)) ==
1257 IO_STATE(R_GEN_CONFIG, dma7, serial0)) {
1258 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma7);
1259 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, unused);
1260 }
1261 } else if (info->line == 1) {
1262 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma9)) ==
1263 IO_STATE(R_GEN_CONFIG, dma9, serial1)) {
1264 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma9);
1265 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, usb);
1266 }
1267 } else if (info->line == 2) {
1268 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma3)) ==
1269 IO_STATE(R_GEN_CONFIG, dma3, serial2)) {
1270 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma3);
1271 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, par0);
1272 }
1273 } else if (info->line == 3) {
1274 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma5)) ==
1275 IO_STATE(R_GEN_CONFIG, dma5, serial3)) {
1276 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma5);
1277 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, par1);
1278 }
1279 }
1280 *R_GEN_CONFIG = genconfig_shadow;
1281 local_irq_restore(flags);
1282}
1283
1284
1285static void e100_enable_rxdma_channel(struct e100_serial *info)
1286{
1287 unsigned long flags;
1288
1289 local_irq_save(flags);
1290
1291 if (info->line == 0) {
1292 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma7);
1293 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, serial0);
1294 } else if (info->line == 1) {
1295 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma9);
1296 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, serial1);
1297 } else if (info->line == 2) {
1298 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma3);
1299 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, serial2);
1300 } else if (info->line == 3) {
1301 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma5);
1302 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, serial3);
1303 }
1304 *R_GEN_CONFIG = genconfig_shadow;
1305 local_irq_restore(flags);
1306}
1307
1308#ifdef SERIAL_HANDLE_EARLY_ERRORS
1309
1310
1311
1312static inline void
1313e100_disable_serial_data_irq(struct e100_serial *info)
1314{
1315#ifdef SERIAL_DEBUG_INTR
1316 printk("ser_irq(%d): 0\n",info->line);
1317#endif
1318 DINTR1(DEBUG_LOG(info->line,"IRQ disable data_irq %i\n", info->line));
1319 *R_IRQ_MASK1_CLR = (1U << (8+2*info->line));
1320}
1321
1322static inline void
1323e100_enable_serial_data_irq(struct e100_serial *info)
1324{
1325#ifdef SERIAL_DEBUG_INTR
1326 printk("ser_irq(%d): 1\n",info->line);
1327 printk("**** %d = %d\n",
1328 (8+2*info->line),
1329 (1U << (8+2*info->line)));
1330#endif
1331 DINTR1(DEBUG_LOG(info->line,"IRQ enable data_irq %i\n", info->line));
1332 *R_IRQ_MASK1_SET = (1U << (8+2*info->line));
1333}
1334#endif
1335
1336static inline void
1337e100_disable_serial_tx_ready_irq(struct e100_serial *info)
1338{
1339#ifdef SERIAL_DEBUG_INTR
1340 printk("ser_tx_irq(%d): 0\n",info->line);
1341#endif
1342 DINTR1(DEBUG_LOG(info->line,"IRQ disable ready_irq %i\n", info->line));
1343 *R_IRQ_MASK1_CLR = (1U << (8+1+2*info->line));
1344}
1345
1346static inline void
1347e100_enable_serial_tx_ready_irq(struct e100_serial *info)
1348{
1349#ifdef SERIAL_DEBUG_INTR
1350 printk("ser_tx_irq(%d): 1\n",info->line);
1351 printk("**** %d = %d\n",
1352 (8+1+2*info->line),
1353 (1U << (8+1+2*info->line)));
1354#endif
1355 DINTR2(DEBUG_LOG(info->line,"IRQ enable ready_irq %i\n", info->line));
1356 *R_IRQ_MASK1_SET = (1U << (8+1+2*info->line));
1357}
1358
1359static inline void e100_enable_rx_irq(struct e100_serial *info)
1360{
1361 if (info->uses_dma_in)
1362 e100_enable_rxdma_irq(info);
1363 else
1364 e100_enable_serial_data_irq(info);
1365}
1366static inline void e100_disable_rx_irq(struct e100_serial *info)
1367{
1368 if (info->uses_dma_in)
1369 e100_disable_rxdma_irq(info);
1370 else
1371 e100_disable_serial_data_irq(info);
1372}
1373
1374#if defined(CONFIG_ETRAX_RS485)
1375
1376static int
1377e100_enable_rs485(struct tty_struct *tty, struct serial_rs485 *r)
1378{
1379 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
1380
1381#if defined(CONFIG_ETRAX_RS485_ON_PA)
1382 *R_PORT_PA_DATA = port_pa_data_shadow |= (1 << rs485_pa_bit);
1383#endif
1384#if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
1385 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1386 rs485_port_g_bit, 1);
1387#endif
1388#if defined(CONFIG_ETRAX_RS485_LTC1387)
1389 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1390 CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT, 1);
1391 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1392 CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 1);
1393#endif
1394
1395 info->rs485 = *r;
1396
1397
1398 if (info->rs485.delay_rts_before_send >= 1000)
1399 info->rs485.delay_rts_before_send = 1000;
1400
1401
1402
1403
1404
1405
1406
1407 return 0;
1408}
1409
1410static int
1411e100_write_rs485(struct tty_struct *tty,
1412 const unsigned char *buf, int count)
1413{
1414 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
1415 int old_value = (info->rs485.flags) & SER_RS485_ENABLED;
1416
1417
1418
1419
1420
1421
1422 info->rs485.flags |= SER_RS485_ENABLED;
1423
1424 count = rs_write(tty, buf, count);
1425 if (!old_value)
1426 info->rs485.flags &= ~(SER_RS485_ENABLED);
1427 return count;
1428}
1429
1430#ifdef CONFIG_ETRAX_FAST_TIMER
1431
1432static void rs485_toggle_rts_timer_function(unsigned long data)
1433{
1434 struct e100_serial *info = (struct e100_serial *)data;
1435
1436 fast_timers_rs485[info->line].function = NULL;
1437 e100_rts(info, (info->rs485.flags & SER_RS485_RTS_AFTER_SEND));
1438#if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
1439 e100_enable_rx(info);
1440 e100_enable_rx_irq(info);
1441#endif
1442}
1443#endif
1444#endif
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455static void
1456rs_stop(struct tty_struct *tty)
1457{
1458 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
1459 if (info) {
1460 unsigned long flags;
1461 unsigned long xoff;
1462
1463 local_irq_save(flags);
1464 DFLOW(DEBUG_LOG(info->line, "XOFF rs_stop xmit %i\n",
1465 CIRC_CNT(info->xmit.head,
1466 info->xmit.tail,SERIAL_XMIT_SIZE)));
1467
1468 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char,
1469 STOP_CHAR(info->port.tty));
1470 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, stop);
1471 if (tty->termios.c_iflag & IXON ) {
1472 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
1473 }
1474
1475 *((unsigned long *)&info->ioport[REG_XOFF]) = xoff;
1476 local_irq_restore(flags);
1477 }
1478}
1479
1480static void
1481rs_start(struct tty_struct *tty)
1482{
1483 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
1484 if (info) {
1485 unsigned long flags;
1486 unsigned long xoff;
1487
1488 local_irq_save(flags);
1489 DFLOW(DEBUG_LOG(info->line, "XOFF rs_start xmit %i\n",
1490 CIRC_CNT(info->xmit.head,
1491 info->xmit.tail,SERIAL_XMIT_SIZE)));
1492 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(tty));
1493 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable);
1494 if (tty->termios.c_iflag & IXON ) {
1495 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
1496 }
1497
1498 *((unsigned long *)&info->ioport[REG_XOFF]) = xoff;
1499 if (!info->uses_dma_out &&
1500 info->xmit.head != info->xmit.tail && info->xmit.buf)
1501 e100_enable_serial_tx_ready_irq(info);
1502
1503 local_irq_restore(flags);
1504 }
1505}
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532static void rs_sched_event(struct e100_serial *info, int event)
1533{
1534 if (info->event & (1 << event))
1535 return;
1536 info->event |= 1 << event;
1537 schedule_work(&info->work);
1538}
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551static void
1552transmit_chars_dma(struct e100_serial *info)
1553{
1554 unsigned int c, sentl;
1555 struct etrax_dma_descr *descr;
1556
1557#ifdef CONFIG_SVINTO_SIM
1558
1559
1560
1561
1562
1563 if (info->xmit.tail)
1564 printk("Error in serial.c:transmit_chars-dma(), tail!=0\n");
1565 if (info->xmit.head != info->xmit.tail) {
1566 SIMCOUT(info->xmit.buf + info->xmit.tail,
1567 CIRC_CNT(info->xmit.head,
1568 info->xmit.tail,
1569 SERIAL_XMIT_SIZE));
1570 info->xmit.head = info->xmit.tail;
1571 info->tr_running = 0;
1572 }
1573 return;
1574#endif
1575
1576 *info->oclrintradr =
1577 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
1578 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
1579
1580#ifdef SERIAL_DEBUG_INTR
1581 if (info->line == SERIAL_DEBUG_LINE)
1582 printk("tc\n");
1583#endif
1584 if (!info->tr_running) {
1585
1586 printk(KERN_WARNING "Achtung: transmit_chars_dma with !tr_running\n");
1587 return;
1588 }
1589
1590 descr = &info->tr_descr;
1591
1592
1593
1594
1595
1596 if (!(descr->status & d_stop)) {
1597 sentl = descr->sw_len;
1598 } else
1599
1600 sentl = descr->hw_len;
1601
1602 DFLOW(DEBUG_LOG(info->line, "TX %i done\n", sentl));
1603
1604
1605 info->icount.tx += sentl;
1606
1607
1608 info->xmit.tail = (info->xmit.tail + sentl) & (SERIAL_XMIT_SIZE - 1);
1609
1610
1611
1612 if (CIRC_CNT(info->xmit.head,
1613 info->xmit.tail,
1614 SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
1615 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
1616
1617
1618
1619 c = CIRC_CNT_TO_END(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
1620
1621
1622
1623
1624
1625 if (c >= 4*WAKEUP_CHARS)
1626 c = c/2;
1627
1628 if (c <= 0) {
1629
1630 info->tr_running = 0;
1631
1632#if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
1633 if (info->rs485.flags & SER_RS485_ENABLED) {
1634
1635 start_one_shot_timer(&fast_timers_rs485[info->line],
1636 rs485_toggle_rts_timer_function,
1637 (unsigned long)info,
1638 info->char_time_usec*2,
1639 "RS-485");
1640 }
1641#endif
1642 return;
1643 }
1644
1645
1646
1647 DFLOW(DEBUG_LOG(info->line, "TX %i\n", c));
1648 descr->ctrl = d_int | d_eol | d_wait;
1649 descr->sw_len = c;
1650 descr->buf = virt_to_phys(info->xmit.buf + info->xmit.tail);
1651 descr->status = 0;
1652
1653 *info->ofirstadr = virt_to_phys(descr);
1654 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start);
1655
1656
1657}
1658
1659static void
1660start_transmit(struct e100_serial *info)
1661{
1662#if 0
1663 if (info->line == SERIAL_DEBUG_LINE)
1664 printk("x\n");
1665#endif
1666
1667 info->tr_descr.sw_len = 0;
1668 info->tr_descr.hw_len = 0;
1669 info->tr_descr.status = 0;
1670 info->tr_running = 1;
1671 if (info->uses_dma_out)
1672 transmit_chars_dma(info);
1673 else
1674 e100_enable_serial_tx_ready_irq(info);
1675}
1676
1677#ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
1678static int serial_fast_timer_started = 0;
1679static int serial_fast_timer_expired = 0;
1680static void flush_timeout_function(unsigned long data);
1681#define START_FLUSH_FAST_TIMER_TIME(info, string, usec) {\
1682 unsigned long timer_flags; \
1683 local_irq_save(timer_flags); \
1684 if (fast_timers[info->line].function == NULL) { \
1685 serial_fast_timer_started++; \
1686 TIMERD(DEBUG_LOG(info->line, "start_timer %i ", info->line)); \
1687 TIMERD(DEBUG_LOG(info->line, "num started: %i\n", serial_fast_timer_started)); \
1688 start_one_shot_timer(&fast_timers[info->line], \
1689 flush_timeout_function, \
1690 (unsigned long)info, \
1691 (usec), \
1692 string); \
1693 } \
1694 else { \
1695 TIMERD(DEBUG_LOG(info->line, "timer %i already running\n", info->line)); \
1696 } \
1697 local_irq_restore(timer_flags); \
1698}
1699#define START_FLUSH_FAST_TIMER(info, string) START_FLUSH_FAST_TIMER_TIME(info, string, info->flush_time_usec)
1700
1701#else
1702#define START_FLUSH_FAST_TIMER_TIME(info, string, usec)
1703#define START_FLUSH_FAST_TIMER(info, string)
1704#endif
1705
1706static struct etrax_recv_buffer *
1707alloc_recv_buffer(unsigned int size)
1708{
1709 struct etrax_recv_buffer *buffer;
1710
1711 if (!(buffer = kmalloc(sizeof *buffer + size, GFP_ATOMIC)))
1712 return NULL;
1713
1714 buffer->next = NULL;
1715 buffer->length = 0;
1716 buffer->error = TTY_NORMAL;
1717
1718 return buffer;
1719}
1720
1721static void
1722append_recv_buffer(struct e100_serial *info, struct etrax_recv_buffer *buffer)
1723{
1724 unsigned long flags;
1725
1726 local_irq_save(flags);
1727
1728 if (!info->first_recv_buffer)
1729 info->first_recv_buffer = buffer;
1730 else
1731 info->last_recv_buffer->next = buffer;
1732
1733 info->last_recv_buffer = buffer;
1734
1735 info->recv_cnt += buffer->length;
1736 if (info->recv_cnt > info->max_recv_cnt)
1737 info->max_recv_cnt = info->recv_cnt;
1738
1739 local_irq_restore(flags);
1740}
1741
1742static int
1743add_char_and_flag(struct e100_serial *info, unsigned char data, unsigned char flag)
1744{
1745 struct etrax_recv_buffer *buffer;
1746 if (info->uses_dma_in) {
1747 if (!(buffer = alloc_recv_buffer(4)))
1748 return 0;
1749
1750 buffer->length = 1;
1751 buffer->error = flag;
1752 buffer->buffer[0] = data;
1753
1754 append_recv_buffer(info, buffer);
1755
1756 info->icount.rx++;
1757 } else {
1758 tty_insert_flip_char(&info->port, data, flag);
1759 info->icount.rx++;
1760 }
1761
1762 return 1;
1763}
1764
1765static unsigned int handle_descr_data(struct e100_serial *info,
1766 struct etrax_dma_descr *descr,
1767 unsigned int recvl)
1768{
1769 struct etrax_recv_buffer *buffer = phys_to_virt(descr->buf) - sizeof *buffer;
1770
1771 if (info->recv_cnt + recvl > 65536) {
1772 printk(KERN_WARNING
1773 "%s: Too much pending incoming serial data! Dropping %u bytes.\n", __func__, recvl);
1774 return 0;
1775 }
1776
1777 buffer->length = recvl;
1778
1779 if (info->errorcode == ERRCODE_SET_BREAK)
1780 buffer->error = TTY_BREAK;
1781 info->errorcode = 0;
1782
1783 append_recv_buffer(info, buffer);
1784
1785 if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE)))
1786 panic("%s: Failed to allocate memory for receive buffer!\n", __func__);
1787
1788 descr->buf = virt_to_phys(buffer->buffer);
1789
1790 return recvl;
1791}
1792
1793static unsigned int handle_all_descr_data(struct e100_serial *info)
1794{
1795 struct etrax_dma_descr *descr;
1796 unsigned int recvl;
1797 unsigned int ret = 0;
1798
1799 while (1)
1800 {
1801 descr = &info->rec_descr[info->cur_rec_descr];
1802
1803 if (descr == phys_to_virt(*info->idescradr))
1804 break;
1805
1806 if (++info->cur_rec_descr == SERIAL_RECV_DESCRIPTORS)
1807 info->cur_rec_descr = 0;
1808
1809
1810
1811
1812 if (!(descr->status & d_eop)) {
1813 recvl = descr->sw_len;
1814 } else {
1815
1816 recvl = descr->hw_len;
1817 }
1818
1819
1820 descr->status = 0;
1821
1822 DFLOW( DEBUG_LOG(info->line, "RX %lu\n", recvl);
1823 if (info->port.tty->stopped) {
1824 unsigned char *buf = phys_to_virt(descr->buf);
1825 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[0]);
1826 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[1]);
1827 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[2]);
1828 }
1829 );
1830
1831
1832 info->icount.rx += recvl;
1833
1834 ret += handle_descr_data(info, descr, recvl);
1835 }
1836
1837 return ret;
1838}
1839
1840static void receive_chars_dma(struct e100_serial *info)
1841{
1842 struct tty_struct *tty;
1843 unsigned char rstat;
1844
1845#ifdef CONFIG_SVINTO_SIM
1846
1847
1848
1849 return;
1850#endif
1851
1852
1853 *info->iclrintradr =
1854 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
1855 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
1856
1857 tty = info->port.tty;
1858 if (!tty)
1859 return;
1860
1861#ifdef SERIAL_HANDLE_EARLY_ERRORS
1862 if (info->uses_dma_in)
1863 e100_enable_serial_data_irq(info);
1864#endif
1865
1866 if (info->errorcode == ERRCODE_INSERT_BREAK)
1867 add_char_and_flag(info, '\0', TTY_BREAK);
1868
1869 handle_all_descr_data(info);
1870
1871
1872 rstat = info->ioport[REG_STATUS];
1873 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) {
1874 DFLOW(DEBUG_LOG(info->line, "XOFF detect stat %x\n", rstat));
1875 }
1876
1877 if (rstat & SER_ERROR_MASK) {
1878
1879
1880
1881 unsigned char data = info->ioport[REG_DATA];
1882
1883 PROCSTAT(ser_stat[info->line].errors_cnt++);
1884 DEBUG_LOG(info->line, "#dERR: s d 0x%04X\n",
1885 ((rstat & SER_ERROR_MASK) << 8) | data);
1886
1887 if (rstat & SER_PAR_ERR_MASK)
1888 add_char_and_flag(info, data, TTY_PARITY);
1889 else if (rstat & SER_OVERRUN_MASK)
1890 add_char_and_flag(info, data, TTY_OVERRUN);
1891 else if (rstat & SER_FRAMING_ERR_MASK)
1892 add_char_and_flag(info, data, TTY_FRAME);
1893 }
1894
1895 START_FLUSH_FAST_TIMER(info, "receive_chars");
1896
1897
1898 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart);
1899}
1900
1901static int start_recv_dma(struct e100_serial *info)
1902{
1903 struct etrax_dma_descr *descr = info->rec_descr;
1904 struct etrax_recv_buffer *buffer;
1905 int i;
1906
1907
1908 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++) {
1909 if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE)))
1910 panic("%s: Failed to allocate memory for receive buffer!\n", __func__);
1911
1912 descr[i].ctrl = d_int;
1913 descr[i].buf = virt_to_phys(buffer->buffer);
1914 descr[i].sw_len = SERIAL_DESCR_BUF_SIZE;
1915 descr[i].hw_len = 0;
1916 descr[i].status = 0;
1917 descr[i].next = virt_to_phys(&descr[i+1]);
1918 }
1919
1920
1921 descr[i-1].next = virt_to_phys(&descr[0]);
1922
1923
1924 info->cur_rec_descr = 0;
1925
1926
1927 *info->ifirstadr = virt_to_phys(&descr[info->cur_rec_descr]);
1928 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start);
1929
1930
1931 return 1;
1932}
1933
1934static void
1935start_receive(struct e100_serial *info)
1936{
1937#ifdef CONFIG_SVINTO_SIM
1938
1939
1940
1941 return;
1942#endif
1943 if (info->uses_dma_in) {
1944
1945
1946 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
1947 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) ==
1948 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
1949
1950 start_recv_dma(info);
1951 }
1952}
1953
1954
1955
1956
1957
1958
1959
1960
1961
1962
1963
1964
1965
1966
1967static irqreturn_t
1968tr_interrupt(int irq, void *dev_id)
1969{
1970 struct e100_serial *info;
1971 unsigned long ireg;
1972 int i;
1973 int handled = 0;
1974
1975#ifdef CONFIG_SVINTO_SIM
1976
1977
1978
1979 {
1980 const char *s = "What? tr_interrupt in simulator??\n";
1981 SIMCOUT(s,strlen(s));
1982 }
1983 return IRQ_HANDLED;
1984#endif
1985
1986
1987
1988 ireg = *R_IRQ_MASK2_RD;
1989
1990 for (i = 0; i < NR_PORTS; i++) {
1991 info = rs_table + i;
1992 if (!info->enabled || !info->uses_dma_out)
1993 continue;
1994
1995 if (ireg & info->irq) {
1996 handled = 1;
1997
1998 DINTR2(DEBUG_LOG(info->line, "tr_interrupt %i\n", i));
1999
2000
2001
2002 PROCSTAT(ser_stat[info->line].tx_dma_ints++);
2003 info->last_tx_active_usec = GET_JIFFIES_USEC();
2004 info->last_tx_active = jiffies;
2005 transmit_chars_dma(info);
2006 }
2007
2008
2009
2010 }
2011 return IRQ_RETVAL(handled);
2012}
2013
2014
2015
2016static irqreturn_t
2017rec_interrupt(int irq, void *dev_id)
2018{
2019 struct e100_serial *info;
2020 unsigned long ireg;
2021 int i;
2022 int handled = 0;
2023
2024#ifdef CONFIG_SVINTO_SIM
2025
2026
2027
2028 {
2029 const char *s = "What? rec_interrupt in simulator??\n";
2030 SIMCOUT(s,strlen(s));
2031 }
2032 return IRQ_HANDLED;
2033#endif
2034
2035
2036
2037 ireg = *R_IRQ_MASK2_RD;
2038
2039 for (i = 0; i < NR_PORTS; i++) {
2040 info = rs_table + i;
2041 if (!info->enabled || !info->uses_dma_in)
2042 continue;
2043
2044 if (ireg & ((info->irq << 2) | (info->irq << 3))) {
2045 handled = 1;
2046
2047 receive_chars_dma(info);
2048 }
2049
2050
2051
2052 }
2053 return IRQ_RETVAL(handled);
2054}
2055
2056static int force_eop_if_needed(struct e100_serial *info)
2057{
2058
2059
2060
2061 unsigned char rstat = info->ioport[REG_STATUS];
2062
2063
2064 if (rstat & SER_ERROR_MASK) {
2065
2066
2067
2068
2069
2070 DEBUG_LOG(info->line, "timeout err: rstat 0x%03X\n",
2071 rstat | (info->line << 8));
2072 return 0;
2073 }
2074
2075 if (rstat & SER_DATA_AVAIL_MASK) {
2076
2077 TIMERD(DEBUG_LOG(info->line, "timeout: rstat 0x%03X\n",
2078 rstat | (info->line << 8)));
2079
2080 (void)info->ioport[REG_DATA];
2081
2082 info->forced_eop = 0;
2083 START_FLUSH_FAST_TIMER(info, "magic");
2084 return 0;
2085 }
2086
2087
2088
2089
2090 if (!info->forced_eop) {
2091 info->forced_eop = 1;
2092 PROCSTAT(ser_stat[info->line].timeout_flush_cnt++);
2093 TIMERD(DEBUG_LOG(info->line, "timeout EOP %i\n", info->line));
2094 FORCE_EOP(info);
2095 }
2096
2097 return 1;
2098}
2099
2100static void flush_to_flip_buffer(struct e100_serial *info)
2101{
2102 struct etrax_recv_buffer *buffer;
2103 unsigned long flags;
2104
2105 local_irq_save(flags);
2106
2107 while ((buffer = info->first_recv_buffer) != NULL) {
2108 unsigned int count = buffer->length;
2109
2110 tty_insert_flip_string(&info->port, buffer->buffer, count);
2111 info->recv_cnt -= count;
2112
2113 if (count == buffer->length) {
2114 info->first_recv_buffer = buffer->next;
2115 kfree(buffer);
2116 } else {
2117 buffer->length -= count;
2118 memmove(buffer->buffer, buffer->buffer + count, buffer->length);
2119 buffer->error = TTY_NORMAL;
2120 }
2121 }
2122
2123 if (!info->first_recv_buffer)
2124 info->last_recv_buffer = NULL;
2125
2126 local_irq_restore(flags);
2127
2128
2129 tty_flip_buffer_push(&info->port);
2130}
2131
2132static void check_flush_timeout(struct e100_serial *info)
2133{
2134
2135 flush_to_flip_buffer(info);
2136
2137
2138
2139 if (info->first_recv_buffer)
2140 START_FLUSH_FAST_TIMER_TIME(info, "flip", 2000);
2141
2142
2143
2144
2145
2146 force_eop_if_needed(info);
2147}
2148
2149#ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
2150static void flush_timeout_function(unsigned long data)
2151{
2152 struct e100_serial *info = (struct e100_serial *)data;
2153
2154 fast_timers[info->line].function = NULL;
2155 serial_fast_timer_expired++;
2156 TIMERD(DEBUG_LOG(info->line, "flush_timout %i ", info->line));
2157 TIMERD(DEBUG_LOG(info->line, "num expired: %i\n", serial_fast_timer_expired));
2158 check_flush_timeout(info);
2159}
2160
2161#else
2162
2163
2164
2165
2166
2167
2168static struct timer_list flush_timer;
2169
2170static void
2171timed_flush_handler(unsigned long ptr)
2172{
2173 struct e100_serial *info;
2174 int i;
2175
2176#ifdef CONFIG_SVINTO_SIM
2177 return;
2178#endif
2179
2180 for (i = 0; i < NR_PORTS; i++) {
2181 info = rs_table + i;
2182 if (info->uses_dma_in)
2183 check_flush_timeout(info);
2184 }
2185
2186
2187 mod_timer(&flush_timer, jiffies + CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS);
2188}
2189#endif
2190
2191#ifdef SERIAL_HANDLE_EARLY_ERRORS
2192
2193
2194
2195
2196
2197
2198
2199
2200
2201
2202
2203
2204
2205
2206
2207
2208
2209
2210
2211
2212
2213
2214
2215
2216
2217
2218
2219
2220
2221
2222
2223
2224
2225
2226
2227
2228
2229
2230
2231
2232
2233
2234
2235
2236
2237
2238
2239
2240
2241
2242
2243
2244
2245
2246
2247
2248
2249
2250
2251
2252
2253
2254
2255
2256
2257
2258
2259
2260
2261static void handle_ser_rx_interrupt_no_dma(struct e100_serial *info)
2262{
2263 unsigned long data_read;
2264
2265
2266 data_read = *((unsigned long *)&info->ioport[REG_DATA_STATUS32]);
2267more_data:
2268 if (data_read & IO_MASK(R_SERIAL0_READ, xoff_detect) ) {
2269 DFLOW(DEBUG_LOG(info->line, "XOFF detect\n", 0));
2270 }
2271 DINTR2(DEBUG_LOG(info->line, "ser_rx %c\n", IO_EXTRACT(R_SERIAL0_READ, data_in, data_read)));
2272
2273 if (data_read & ( IO_MASK(R_SERIAL0_READ, framing_err) |
2274 IO_MASK(R_SERIAL0_READ, par_err) |
2275 IO_MASK(R_SERIAL0_READ, overrun) )) {
2276
2277 info->last_rx_active_usec = GET_JIFFIES_USEC();
2278 info->last_rx_active = jiffies;
2279 DINTR1(DEBUG_LOG(info->line, "ser_rx err stat_data %04X\n", data_read));
2280 DLOG_INT_TRIG(
2281 if (!log_int_trig1_pos) {
2282 log_int_trig1_pos = log_int_pos;
2283 log_int(rdpc(), 0, 0);
2284 }
2285 );
2286
2287
2288 if ( ((data_read & IO_MASK(R_SERIAL0_READ, data_in)) == 0) &&
2289 (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) ) {
2290
2291
2292
2293
2294 if (!info->break_detected_cnt) {
2295 DEBUG_LOG(info->line, "#BRK start\n", 0);
2296 }
2297 if (data_read & IO_MASK(R_SERIAL0_READ, rxd)) {
2298
2299
2300
2301
2302
2303
2304
2305 DEBUG_LOG(info->line, "# BL BRK\n", 0);
2306 info->errorcode = ERRCODE_INSERT_BREAK;
2307 }
2308 info->break_detected_cnt++;
2309 } else {
2310
2311
2312
2313 if (info->break_detected_cnt) {
2314 DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
2315 info->errorcode = ERRCODE_INSERT_BREAK;
2316 } else {
2317 unsigned char data = IO_EXTRACT(R_SERIAL0_READ,
2318 data_in, data_read);
2319 char flag = TTY_NORMAL;
2320 if (info->errorcode == ERRCODE_INSERT_BREAK) {
2321 tty_insert_flip_char(&info->port, 0, flag);
2322 info->icount.rx++;
2323 }
2324
2325 if (data_read & IO_MASK(R_SERIAL0_READ, par_err)) {
2326 info->icount.parity++;
2327 flag = TTY_PARITY;
2328 } else if (data_read & IO_MASK(R_SERIAL0_READ, overrun)) {
2329 info->icount.overrun++;
2330 flag = TTY_OVERRUN;
2331 } else if (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) {
2332 info->icount.frame++;
2333 flag = TTY_FRAME;
2334 }
2335 tty_insert_flip_char(&info->port, data, flag);
2336 info->errorcode = 0;
2337 }
2338 info->break_detected_cnt = 0;
2339 }
2340 } else if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) {
2341
2342 DLOG_INT_TRIG(
2343 if (!log_int_trig1_pos) {
2344 if (log_int_pos >= log_int_size) {
2345 log_int_pos = 0;
2346 }
2347 log_int_trig0_pos = log_int_pos;
2348 log_int(rdpc(), 0, 0);
2349 }
2350 );
2351 tty_insert_flip_char(&info->port,
2352 IO_EXTRACT(R_SERIAL0_READ, data_in, data_read),
2353 TTY_NORMAL);
2354 } else {
2355 DEBUG_LOG(info->line, "ser_rx int but no data_avail %08lX\n", data_read);
2356 }
2357
2358
2359 info->icount.rx++;
2360 data_read = *((unsigned long *)&info->ioport[REG_DATA_STATUS32]);
2361 if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) {
2362 DEBUG_LOG(info->line, "ser_rx %c in loop\n", IO_EXTRACT(R_SERIAL0_READ, data_in, data_read));
2363 goto more_data;
2364 }
2365
2366 tty_flip_buffer_push(&info->port);
2367}
2368
2369static void handle_ser_rx_interrupt(struct e100_serial *info)
2370{
2371 unsigned char rstat;
2372
2373#ifdef SERIAL_DEBUG_INTR
2374 printk("Interrupt from serport %d\n", i);
2375#endif
2376
2377 if (!info->uses_dma_in) {
2378 handle_ser_rx_interrupt_no_dma(info);
2379 return;
2380 }
2381
2382 rstat = info->ioport[REG_STATUS];
2383 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) {
2384 DFLOW(DEBUG_LOG(info->line, "XOFF detect\n", 0));
2385 }
2386
2387 if (rstat & SER_ERROR_MASK) {
2388 unsigned char data;
2389
2390 info->last_rx_active_usec = GET_JIFFIES_USEC();
2391 info->last_rx_active = jiffies;
2392
2393
2394
2395 data = info->ioport[REG_DATA];
2396 DINTR1(DEBUG_LOG(info->line, "ser_rx! %c\n", data));
2397 DINTR1(DEBUG_LOG(info->line, "ser_rx err stat %02X\n", rstat));
2398 if (!data && (rstat & SER_FRAMING_ERR_MASK)) {
2399
2400
2401
2402
2403 if (!info->break_detected_cnt) {
2404 DEBUG_LOG(info->line, "#BRK start\n", 0);
2405 }
2406 if (rstat & SER_RXD_MASK) {
2407
2408
2409
2410
2411
2412
2413
2414 DEBUG_LOG(info->line, "# BL BRK\n", 0);
2415 info->errorcode = ERRCODE_INSERT_BREAK;
2416 }
2417 info->break_detected_cnt++;
2418 } else {
2419
2420
2421
2422 if (info->break_detected_cnt) {
2423 DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
2424 info->errorcode = ERRCODE_INSERT_BREAK;
2425 } else {
2426 if (info->errorcode == ERRCODE_INSERT_BREAK) {
2427 info->icount.brk++;
2428 add_char_and_flag(info, '\0', TTY_BREAK);
2429 }
2430
2431 if (rstat & SER_PAR_ERR_MASK) {
2432 info->icount.parity++;
2433 add_char_and_flag(info, data, TTY_PARITY);
2434 } else if (rstat & SER_OVERRUN_MASK) {
2435 info->icount.overrun++;
2436 add_char_and_flag(info, data, TTY_OVERRUN);
2437 } else if (rstat & SER_FRAMING_ERR_MASK) {
2438 info->icount.frame++;
2439 add_char_and_flag(info, data, TTY_FRAME);
2440 }
2441
2442 info->errorcode = 0;
2443 }
2444 info->break_detected_cnt = 0;
2445 DEBUG_LOG(info->line, "#iERR s d %04X\n",
2446 ((rstat & SER_ERROR_MASK) << 8) | data);
2447 }
2448 PROCSTAT(ser_stat[info->line].early_errors_cnt++);
2449 } else {
2450 unsigned long curr_time_u = GET_JIFFIES_USEC();
2451 unsigned long curr_time = jiffies;
2452
2453 if (info->break_detected_cnt) {
2454
2455
2456
2457
2458
2459 long elapsed_usec =
2460 (curr_time - info->last_rx_active) * (1000000/HZ) +
2461 curr_time_u - info->last_rx_active_usec;
2462 if (elapsed_usec < 2*info->char_time_usec) {
2463 DEBUG_LOG(info->line, "FBRK %i\n", info->line);
2464
2465
2466
2467 info->errorcode = ERRCODE_SET_BREAK;
2468 } else {
2469 DEBUG_LOG(info->line, "Not end of BRK (V)%i\n", info->line);
2470 }
2471 DEBUG_LOG(info->line, "num brk %i\n", info->break_detected_cnt);
2472 }
2473
2474#ifdef SERIAL_DEBUG_INTR
2475 printk("** OK, disabling ser_interrupts\n");
2476#endif
2477 e100_disable_serial_data_irq(info);
2478 DINTR2(DEBUG_LOG(info->line, "ser_rx OK %d\n", info->line));
2479 info->break_detected_cnt = 0;
2480
2481 PROCSTAT(ser_stat[info->line].ser_ints_ok_cnt++);
2482 }
2483
2484 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart);
2485 START_FLUSH_FAST_TIMER(info, "ser_int");
2486}
2487
2488static void handle_ser_tx_interrupt(struct e100_serial *info)
2489{
2490 unsigned long flags;
2491
2492 if (info->x_char) {
2493 unsigned char rstat;
2494 DFLOW(DEBUG_LOG(info->line, "tx_int: xchar 0x%02X\n", info->x_char));
2495 local_irq_save(flags);
2496 rstat = info->ioport[REG_STATUS];
2497 DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
2498
2499 info->ioport[REG_TR_DATA] = info->x_char;
2500 info->icount.tx++;
2501 info->x_char = 0;
2502
2503 e100_enable_serial_tx_ready_irq(info);
2504 local_irq_restore(flags);
2505 return;
2506 }
2507 if (info->uses_dma_out) {
2508 unsigned char rstat;
2509 int i;
2510
2511 DFLOW(DEBUG_LOG(info->line, "tx_int: xchar sent\n", 0));
2512 local_irq_save(flags);
2513 rstat = info->ioport[REG_STATUS];
2514 DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
2515 e100_disable_serial_tx_ready_irq(info);
2516 if (info->port.tty->stopped)
2517 rs_stop(info->port.tty);
2518
2519 e100_enable_txdma_channel(info);
2520
2521 for(i = 6; i > 0; i--)
2522 nop();
2523
2524 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, continue);
2525 local_irq_restore(flags);
2526 return;
2527 }
2528
2529 if (info->xmit.head == info->xmit.tail
2530 || info->port.tty->stopped) {
2531 DFLOW(DEBUG_LOG(info->line, "tx_int: stopped %i\n",
2532 info->port.tty->stopped));
2533 e100_disable_serial_tx_ready_irq(info);
2534 info->tr_running = 0;
2535 return;
2536 }
2537 DINTR2(DEBUG_LOG(info->line, "tx_int %c\n", info->xmit.buf[info->xmit.tail]));
2538
2539 local_irq_save(flags);
2540 info->ioport[REG_TR_DATA] = info->xmit.buf[info->xmit.tail];
2541 info->xmit.tail = (info->xmit.tail + 1) & (SERIAL_XMIT_SIZE-1);
2542 info->icount.tx++;
2543 if (info->xmit.head == info->xmit.tail) {
2544#if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
2545 if (info->rs485.flags & SER_RS485_ENABLED) {
2546
2547 start_one_shot_timer(&fast_timers_rs485[info->line],
2548 rs485_toggle_rts_timer_function,
2549 (unsigned long)info,
2550 info->char_time_usec*2,
2551 "RS-485");
2552 }
2553#endif
2554 info->last_tx_active_usec = GET_JIFFIES_USEC();
2555 info->last_tx_active = jiffies;
2556 e100_disable_serial_tx_ready_irq(info);
2557 info->tr_running = 0;
2558 DFLOW(DEBUG_LOG(info->line, "tx_int: stop2\n", 0));
2559 } else {
2560
2561 e100_enable_serial_tx_ready_irq(info);
2562 }
2563 local_irq_restore(flags);
2564
2565 if (CIRC_CNT(info->xmit.head,
2566 info->xmit.tail,
2567 SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
2568 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
2569
2570}
2571
2572
2573
2574
2575
2576static irqreturn_t
2577ser_interrupt(int irq, void *dev_id)
2578{
2579 static volatile int tx_started = 0;
2580 struct e100_serial *info;
2581 int i;
2582 unsigned long flags;
2583 unsigned long irq_mask1_rd;
2584 unsigned long data_mask = (1 << (8+2*0));
2585 int handled = 0;
2586 static volatile unsigned long reentered_ready_mask = 0;
2587
2588 local_irq_save(flags);
2589 irq_mask1_rd = *R_IRQ_MASK1_RD;
2590
2591 info = rs_table;
2592 irq_mask1_rd &= e100_ser_int_mask;
2593 for (i = 0; i < NR_PORTS; i++) {
2594
2595 if (irq_mask1_rd & data_mask) {
2596 handled = 1;
2597 handle_ser_rx_interrupt(info);
2598 }
2599 info += 1;
2600 data_mask <<= 2;
2601 }
2602
2603
2604
2605
2606
2607
2608
2609
2610
2611
2612
2613
2614
2615
2616
2617
2618 if (!tx_started) {
2619 unsigned long ready_mask;
2620 unsigned long
2621 tx_started = 1;
2622
2623 irq_mask1_rd &= (IO_MASK(R_IRQ_MASK1_RD, ser0_ready) |
2624 IO_MASK(R_IRQ_MASK1_RD, ser1_ready) |
2625 IO_MASK(R_IRQ_MASK1_RD, ser2_ready) |
2626 IO_MASK(R_IRQ_MASK1_RD, ser3_ready));
2627 while (irq_mask1_rd) {
2628
2629 *R_IRQ_MASK1_CLR = irq_mask1_rd;
2630
2631 *R_VECT_MASK_SET = IO_STATE(R_VECT_MASK_SET, serial, set);
2632
2633 local_irq_enable();
2634 ready_mask = (1 << (8+1+2*0));
2635 info = rs_table;
2636 for (i = 0; i < NR_PORTS; i++) {
2637
2638 if (irq_mask1_rd & ready_mask) {
2639 handled = 1;
2640 handle_ser_tx_interrupt(info);
2641 }
2642 info += 1;
2643 ready_mask <<= 2;
2644 }
2645
2646 local_irq_disable();
2647
2648 irq_mask1_rd = reentered_ready_mask;
2649 }
2650 local_irq_disable();
2651 tx_started = 0;
2652 } else {
2653 unsigned long ready_mask;
2654 ready_mask = irq_mask1_rd & (IO_MASK(R_IRQ_MASK1_RD, ser0_ready) |
2655 IO_MASK(R_IRQ_MASK1_RD, ser1_ready) |
2656 IO_MASK(R_IRQ_MASK1_RD, ser2_ready) |
2657 IO_MASK(R_IRQ_MASK1_RD, ser3_ready));
2658 if (ready_mask) {
2659 reentered_ready_mask |= ready_mask;
2660
2661 *R_IRQ_MASK1_CLR = ready_mask;
2662 DFLOW(DEBUG_LOG(SERIAL_DEBUG_LINE, "ser_int reentered with TX %X\n", ready_mask));
2663 }
2664 }
2665
2666 local_irq_restore(flags);
2667 return IRQ_RETVAL(handled);
2668}
2669#endif
2670
2671
2672
2673
2674
2675
2676
2677
2678
2679
2680
2681
2682
2683
2684
2685
2686static void
2687do_softint(struct work_struct *work)
2688{
2689 struct e100_serial *info;
2690 struct tty_struct *tty;
2691
2692 info = container_of(work, struct e100_serial, work);
2693
2694 tty = info->port.tty;
2695 if (!tty)
2696 return;
2697
2698 if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event))
2699 tty_wakeup(tty);
2700}
2701
2702static int
2703startup(struct e100_serial * info)
2704{
2705 unsigned long flags;
2706 unsigned long xmit_page;
2707 int i;
2708
2709 xmit_page = get_zeroed_page(GFP_KERNEL);
2710 if (!xmit_page)
2711 return -ENOMEM;
2712
2713 local_irq_save(flags);
2714
2715
2716
2717 if (info->port.flags & ASYNC_INITIALIZED) {
2718 local_irq_restore(flags);
2719 free_page(xmit_page);
2720 return 0;
2721 }
2722
2723 if (info->xmit.buf)
2724 free_page(xmit_page);
2725 else
2726 info->xmit.buf = (unsigned char *) xmit_page;
2727
2728#ifdef SERIAL_DEBUG_OPEN
2729 printk("starting up ttyS%d (xmit_buf 0x%p)...\n", info->line, info->xmit.buf);
2730#endif
2731
2732#ifdef CONFIG_SVINTO_SIM
2733
2734
2735
2736 if (info->port.tty)
2737 clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
2738
2739 info->xmit.head = info->xmit.tail = 0;
2740 info->first_recv_buffer = info->last_recv_buffer = NULL;
2741 info->recv_cnt = info->max_recv_cnt = 0;
2742
2743 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
2744 info->rec_descr[i].buf = NULL;
2745
2746
2747
2748 change_speed(info);
2749#else
2750
2751
2752
2753
2754
2755
2756
2757
2758
2759
2760 if (info->dma_in_enabled) {
2761 info->uses_dma_in = 1;
2762 e100_enable_rxdma_channel(info);
2763
2764 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2765
2766
2767 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) ==
2768 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
2769
2770
2771 *info->iclrintradr =
2772 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
2773 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
2774 } else {
2775 e100_disable_rxdma_channel(info);
2776 }
2777
2778 if (info->dma_out_enabled) {
2779 info->uses_dma_out = 1;
2780 e100_enable_txdma_channel(info);
2781 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2782
2783 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) ==
2784 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
2785
2786
2787 *info->oclrintradr =
2788 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
2789 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
2790 } else {
2791 e100_disable_txdma_channel(info);
2792 }
2793
2794 if (info->port.tty)
2795 clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
2796
2797 info->xmit.head = info->xmit.tail = 0;
2798 info->first_recv_buffer = info->last_recv_buffer = NULL;
2799 info->recv_cnt = info->max_recv_cnt = 0;
2800
2801 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
2802 info->rec_descr[i].buf = 0;
2803
2804
2805
2806
2807
2808#ifdef SERIAL_HANDLE_EARLY_ERRORS
2809 e100_enable_serial_data_irq(info);
2810#endif
2811 change_speed(info);
2812
2813
2814
2815 (void)info->ioport[REG_DATA];
2816
2817
2818 if (info->uses_dma_out)
2819 e100_enable_txdma_irq(info);
2820
2821 e100_enable_rx_irq(info);
2822
2823 info->tr_running = 0;
2824
2825
2826
2827 start_receive(info);
2828
2829
2830
2831 info->tr_descr.sw_len = 0;
2832 info->tr_descr.hw_len = 0;
2833 info->tr_descr.status = 0;
2834
2835
2836
2837 e100_rts(info, 1);
2838 e100_dtr(info, 1);
2839
2840#endif
2841
2842 info->port.flags |= ASYNC_INITIALIZED;
2843
2844 local_irq_restore(flags);
2845 return 0;
2846}
2847
2848
2849
2850
2851
2852static void
2853shutdown(struct e100_serial * info)
2854{
2855 unsigned long flags;
2856 struct etrax_dma_descr *descr = info->rec_descr;
2857 struct etrax_recv_buffer *buffer;
2858 int i;
2859
2860#ifndef CONFIG_SVINTO_SIM
2861
2862 DFLOW(DEBUG_LOG(info->line, "shutdown %i\n", info->line));
2863 e100_disable_rx(info);
2864 info->ioport[REG_TR_CTRL] = (info->tx_ctrl &= ~0x40);
2865
2866
2867 if (info->uses_dma_in) {
2868 e100_disable_rxdma_irq(info);
2869 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2870 info->uses_dma_in = 0;
2871 } else {
2872 e100_disable_serial_data_irq(info);
2873 }
2874
2875 if (info->uses_dma_out) {
2876 e100_disable_txdma_irq(info);
2877 info->tr_running = 0;
2878 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2879 info->uses_dma_out = 0;
2880 } else {
2881 e100_disable_serial_tx_ready_irq(info);
2882 info->tr_running = 0;
2883 }
2884
2885#endif
2886
2887 if (!(info->port.flags & ASYNC_INITIALIZED))
2888 return;
2889
2890#ifdef SERIAL_DEBUG_OPEN
2891 printk("Shutting down serial port %d (irq %d)....\n", info->line,
2892 info->irq);
2893#endif
2894
2895 local_irq_save(flags);
2896
2897 if (info->xmit.buf) {
2898 free_page((unsigned long)info->xmit.buf);
2899 info->xmit.buf = NULL;
2900 }
2901
2902 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
2903 if (descr[i].buf) {
2904 buffer = phys_to_virt(descr[i].buf) - sizeof *buffer;
2905 kfree(buffer);
2906 descr[i].buf = 0;
2907 }
2908
2909 if (!info->port.tty || (info->port.tty->termios.c_cflag & HUPCL)) {
2910
2911 e100_dtr(info, 0);
2912 e100_rts(info, 0);
2913 }
2914
2915 if (info->port.tty)
2916 set_bit(TTY_IO_ERROR, &info->port.tty->flags);
2917
2918 info->port.flags &= ~ASYNC_INITIALIZED;
2919 local_irq_restore(flags);
2920}
2921
2922
2923
2924
2925static void
2926change_speed(struct e100_serial *info)
2927{
2928 unsigned int cflag;
2929 unsigned long xoff;
2930 unsigned long flags;
2931
2932
2933 if (!info->port.tty)
2934 return;
2935 if (!info->ioport)
2936 return;
2937
2938 cflag = info->port.tty->termios.c_cflag;
2939
2940
2941
2942
2943 if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST) {
2944
2945 u32 mask = 0xFF << (info->line*8);
2946 unsigned long alt_source =
2947 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) |
2948 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal);
2949
2950 DBAUD(printk("Custom baudrate: baud_base/divisor %lu/%i\n",
2951 (unsigned long)info->baud_base, info->custom_divisor));
2952 if (info->baud_base == SERIAL_PRESCALE_BASE) {
2953
2954 u16 divisor = info->custom_divisor;
2955
2956
2957 alt_source =
2958 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, prescale) |
2959 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, prescale);
2960 alt_source = 0x11;
2961 DBAUD(printk("Writing SERIAL_PRESCALE: divisor %i\n", divisor));
2962 *R_SERIAL_PRESCALE = divisor;
2963 info->baud = SERIAL_PRESCALE_BASE/divisor;
2964 }
2965#ifdef CONFIG_ETRAX_EXTERN_PB6CLK_ENABLED
2966 else if ((info->baud_base==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8 &&
2967 info->custom_divisor == 1) ||
2968 (info->baud_base==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ &&
2969 info->custom_divisor == 8)) {
2970
2971 alt_source =
2972 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, extern) |
2973 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, extern);
2974 DBAUD(printk("using external baudrate: %lu\n", CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8));
2975 info->baud = CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8;
2976 }
2977#endif
2978 else
2979 {
2980
2981
2982
2983 printk(KERN_WARNING "Bad baud_base/custom_divisor: %lu/%i\n",
2984 (unsigned long)info->baud_base, info->custom_divisor);
2985 }
2986 r_alt_ser_baudrate_shadow &= ~mask;
2987 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8));
2988 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow;
2989 } else {
2990
2991
2992 u32 mask = 0xFF << (info->line*8);
2993 unsigned long alt_source =
2994 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) |
2995 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal);
2996 r_alt_ser_baudrate_shadow &= ~mask;
2997 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8));
2998#ifndef CONFIG_SVINTO_SIM
2999 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow;
3000#endif
3001
3002 info->baud = cflag_to_baud(cflag);
3003#ifndef CONFIG_SVINTO_SIM
3004 info->ioport[REG_BAUD] = cflag_to_etrax_baud(cflag);
3005#endif
3006 }
3007
3008#ifndef CONFIG_SVINTO_SIM
3009
3010 local_irq_save(flags);
3011
3012 info->rx_ctrl &= ~(IO_MASK(R_SERIAL0_REC_CTRL, rec_bitnr) |
3013 IO_MASK(R_SERIAL0_REC_CTRL, rec_par_en) |
3014 IO_MASK(R_SERIAL0_REC_CTRL, rec_par));
3015
3016
3017 info->tx_ctrl &= ~(IO_MASK(R_SERIAL0_TR_CTRL, tr_bitnr) |
3018 IO_MASK(R_SERIAL0_TR_CTRL, tr_par_en) |
3019 IO_MASK(R_SERIAL0_TR_CTRL, tr_par) |
3020 IO_MASK(R_SERIAL0_TR_CTRL, stop_bits) |
3021 IO_MASK(R_SERIAL0_TR_CTRL, auto_cts));
3022
3023 if ((cflag & CSIZE) == CS7) {
3024
3025 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_bitnr, tr_7bit);
3026 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_bitnr, rec_7bit);
3027 }
3028
3029 if (cflag & CSTOPB) {
3030
3031 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, stop_bits, two_bits);
3032 }
3033
3034 if (cflag & PARENB) {
3035
3036 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par_en, enable);
3037 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par_en, enable);
3038 }
3039
3040 if (cflag & CMSPAR) {
3041
3042 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_stick_par, stick);
3043 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_stick_par, stick);
3044 }
3045 if (cflag & PARODD) {
3046
3047 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par, odd);
3048 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par, odd);
3049 }
3050
3051 if (cflag & CRTSCTS) {
3052
3053 DFLOW(DEBUG_LOG(info->line, "FLOW auto_cts enabled\n", 0));
3054 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, auto_cts, active);
3055 }
3056
3057
3058
3059 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_enable, enable);
3060 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_enable, enable);
3061
3062
3063
3064 info->ioport[REG_TR_CTRL] = info->tx_ctrl;
3065 info->ioport[REG_REC_CTRL] = info->rx_ctrl;
3066 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(info->port.tty));
3067 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable);
3068 if (info->port.tty->termios.c_iflag & IXON ) {
3069 DFLOW(DEBUG_LOG(info->line, "FLOW XOFF enabled 0x%02X\n",
3070 STOP_CHAR(info->port.tty)));
3071 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
3072 }
3073
3074 *((unsigned long *)&info->ioport[REG_XOFF]) = xoff;
3075 local_irq_restore(flags);
3076#endif
3077
3078 update_char_time(info);
3079
3080}
3081
3082
3083
3084static void
3085rs_flush_chars(struct tty_struct *tty)
3086{
3087 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3088 unsigned long flags;
3089
3090 if (info->tr_running ||
3091 info->xmit.head == info->xmit.tail ||
3092 tty->stopped ||
3093 !info->xmit.buf)
3094 return;
3095
3096#ifdef SERIAL_DEBUG_FLOW
3097 printk("rs_flush_chars\n");
3098#endif
3099
3100
3101
3102 local_irq_save(flags);
3103 start_transmit(info);
3104 local_irq_restore(flags);
3105}
3106
3107static int rs_raw_write(struct tty_struct *tty,
3108 const unsigned char *buf, int count)
3109{
3110 int c, ret = 0;
3111 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3112 unsigned long flags;
3113
3114
3115
3116 if (!info->xmit.buf)
3117 return 0;
3118
3119#ifdef SERIAL_DEBUG_DATA
3120 if (info->line == SERIAL_DEBUG_LINE)
3121 printk("rs_raw_write (%d), status %d\n",
3122 count, info->ioport[REG_STATUS]);
3123#endif
3124
3125#ifdef CONFIG_SVINTO_SIM
3126
3127 SIMCOUT(buf, count);
3128 return count;
3129#endif
3130 local_save_flags(flags);
3131 DFLOW(DEBUG_LOG(info->line, "write count %i ", count));
3132 DFLOW(DEBUG_LOG(info->line, "ldisc %i\n", tty->ldisc.chars_in_buffer(tty)));
3133
3134
3135
3136
3137
3138
3139
3140
3141
3142 local_irq_disable();
3143 while (count) {
3144 c = CIRC_SPACE_TO_END(info->xmit.head,
3145 info->xmit.tail,
3146 SERIAL_XMIT_SIZE);
3147
3148 if (count < c)
3149 c = count;
3150 if (c <= 0)
3151 break;
3152
3153 memcpy(info->xmit.buf + info->xmit.head, buf, c);
3154 info->xmit.head = (info->xmit.head + c) &
3155 (SERIAL_XMIT_SIZE-1);
3156 buf += c;
3157 count -= c;
3158 ret += c;
3159 }
3160 local_irq_restore(flags);
3161
3162
3163
3164
3165
3166 DFLOW(DEBUG_LOG(info->line, "write ret %i\n", ret));
3167
3168 if (info->xmit.head != info->xmit.tail &&
3169 !tty->stopped &&
3170 !info->tr_running) {
3171 start_transmit(info);
3172 }
3173
3174 return ret;
3175}
3176
3177static int
3178rs_write(struct tty_struct *tty,
3179 const unsigned char *buf, int count)
3180{
3181#if defined(CONFIG_ETRAX_RS485)
3182 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3183
3184 if (info->rs485.flags & SER_RS485_ENABLED)
3185 {
3186
3187
3188
3189#ifdef CONFIG_ETRAX_FAST_TIMER
3190
3191 fast_timers_rs485[info->line].function = NULL;
3192 del_fast_timer(&fast_timers_rs485[info->line]);
3193#endif
3194 e100_rts(info, (info->rs485.flags & SER_RS485_RTS_ON_SEND));
3195#if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
3196 e100_disable_rx(info);
3197 e100_enable_rx_irq(info);
3198#endif
3199 if (info->rs485.delay_rts_before_send > 0)
3200 msleep(info->rs485.delay_rts_before_send);
3201 }
3202#endif
3203
3204 count = rs_raw_write(tty, buf, count);
3205
3206#if defined(CONFIG_ETRAX_RS485)
3207 if (info->rs485.flags & SER_RS485_ENABLED)
3208 {
3209 unsigned int val;
3210
3211
3212
3213
3214
3215
3216
3217
3218 tty_wait_until_sent(tty, 0);
3219#ifdef CONFIG_ETRAX_FAST_TIMER
3220
3221 schedule_usleep(info->char_time_usec * 2);
3222#endif
3223
3224 do{
3225 get_lsr_info(info, &val);
3226 }while (!(val & TIOCSER_TEMT));
3227
3228 e100_rts(info, (info->rs485.flags & SER_RS485_RTS_AFTER_SEND));
3229
3230#if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
3231 e100_enable_rx(info);
3232 e100_enable_rxdma_irq(info);
3233#endif
3234 }
3235#endif
3236
3237 return count;
3238}
3239
3240
3241
3242
3243static int
3244rs_write_room(struct tty_struct *tty)
3245{
3246 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3247
3248 return CIRC_SPACE(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
3249}
3250
3251
3252
3253
3254
3255
3256static int
3257rs_chars_in_buffer(struct tty_struct *tty)
3258{
3259 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3260
3261 return CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
3262}
3263
3264
3265
3266static void
3267rs_flush_buffer(struct tty_struct *tty)
3268{
3269 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3270 unsigned long flags;
3271
3272 local_irq_save(flags);
3273 info->xmit.head = info->xmit.tail = 0;
3274 local_irq_restore(flags);
3275
3276 tty_wakeup(tty);
3277}
3278
3279
3280
3281
3282
3283
3284
3285
3286
3287
3288static void rs_send_xchar(struct tty_struct *tty, char ch)
3289{
3290 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3291 unsigned long flags;
3292 local_irq_save(flags);
3293 if (info->uses_dma_out) {
3294
3295 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, hold);
3296 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) !=
3297 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, hold));
3298 e100_disable_txdma_channel(info);
3299 }
3300
3301
3302 if (tty->stopped)
3303 rs_start(tty);
3304
3305
3306 DFLOW(DEBUG_LOG(info->line, "rs_send_xchar 0x%02X\n", ch));
3307 info->x_char = ch;
3308 e100_enable_serial_tx_ready_irq(info);
3309 local_irq_restore(flags);
3310}
3311
3312
3313
3314
3315
3316
3317
3318
3319
3320static void
3321rs_throttle(struct tty_struct * tty)
3322{
3323 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3324#ifdef SERIAL_DEBUG_THROTTLE
3325 char buf[64];
3326
3327 printk("throttle %s: %lu....\n", tty_name(tty, buf),
3328 (unsigned long)tty->ldisc.chars_in_buffer(tty));
3329#endif
3330 DFLOW(DEBUG_LOG(info->line,"rs_throttle %lu\n", tty->ldisc.chars_in_buffer(tty)));
3331
3332
3333 if (tty->termios.c_cflag & CRTSCTS) {
3334
3335 e100_rts(info, 0);
3336 }
3337 if (I_IXOFF(tty))
3338 rs_send_xchar(tty, STOP_CHAR(tty));
3339
3340}
3341
3342static void
3343rs_unthrottle(struct tty_struct * tty)
3344{
3345 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3346#ifdef SERIAL_DEBUG_THROTTLE
3347 char buf[64];
3348
3349 printk("unthrottle %s: %lu....\n", tty_name(tty, buf),
3350 (unsigned long)tty->ldisc.chars_in_buffer(tty));
3351#endif
3352 DFLOW(DEBUG_LOG(info->line,"rs_unthrottle ldisc %d\n", tty->ldisc.chars_in_buffer(tty)));
3353 DFLOW(DEBUG_LOG(info->line,"rs_unthrottle flip.count: %i\n", tty->flip.count));
3354
3355 if (tty->termios.c_cflag & CRTSCTS) {
3356
3357 e100_rts(info, 1);
3358 }
3359
3360 if (I_IXOFF(tty)) {
3361 if (info->x_char)
3362 info->x_char = 0;
3363 else
3364 rs_send_xchar(tty, START_CHAR(tty));
3365 }
3366
3367}
3368
3369
3370
3371
3372
3373
3374
3375static int
3376get_serial_info(struct e100_serial * info,
3377 struct serial_struct * retinfo)
3378{
3379 struct serial_struct tmp;
3380
3381
3382
3383
3384
3385
3386 if (!retinfo)
3387 return -EFAULT;
3388 memset(&tmp, 0, sizeof(tmp));
3389 tmp.type = info->type;
3390 tmp.line = info->line;
3391 tmp.port = (int)info->ioport;
3392 tmp.irq = info->irq;
3393 tmp.flags = info->port.flags;
3394 tmp.baud_base = info->baud_base;
3395 tmp.close_delay = info->port.close_delay;
3396 tmp.closing_wait = info->port.closing_wait;
3397 tmp.custom_divisor = info->custom_divisor;
3398 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
3399 return -EFAULT;
3400 return 0;
3401}
3402
3403static int
3404set_serial_info(struct e100_serial *info,
3405 struct serial_struct *new_info)
3406{
3407 struct serial_struct new_serial;
3408 struct e100_serial old_info;
3409 int retval = 0;
3410
3411 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
3412 return -EFAULT;
3413
3414 old_info = *info;
3415
3416 if (!capable(CAP_SYS_ADMIN)) {
3417 if ((new_serial.type != info->type) ||
3418 (new_serial.close_delay != info->port.close_delay) ||
3419 ((new_serial.flags & ~ASYNC_USR_MASK) !=
3420 (info->port.flags & ~ASYNC_USR_MASK)))
3421 return -EPERM;
3422 info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
3423 (new_serial.flags & ASYNC_USR_MASK));
3424 goto check_and_exit;
3425 }
3426
3427 if (info->port.count > 1)
3428 return -EBUSY;
3429
3430
3431
3432
3433
3434
3435 info->baud_base = new_serial.baud_base;
3436 info->port.flags = ((info->port.flags & ~ASYNC_FLAGS) |
3437 (new_serial.flags & ASYNC_FLAGS));
3438 info->custom_divisor = new_serial.custom_divisor;
3439 info->type = new_serial.type;
3440 info->port.close_delay = new_serial.close_delay;
3441 info->port.closing_wait = new_serial.closing_wait;
3442 info->port.low_latency = (info->port.flags & ASYNC_LOW_LATENCY) ? 1 : 0;
3443
3444 check_and_exit:
3445 if (info->port.flags & ASYNC_INITIALIZED) {
3446 change_speed(info);
3447 } else
3448 retval = startup(info);
3449 return retval;
3450}
3451
3452
3453
3454
3455
3456
3457
3458
3459
3460
3461
3462static int
3463get_lsr_info(struct e100_serial * info, unsigned int *value)
3464{
3465 unsigned int result = TIOCSER_TEMT;
3466#ifndef CONFIG_SVINTO_SIM
3467 unsigned long curr_time = jiffies;
3468 unsigned long curr_time_usec = GET_JIFFIES_USEC();
3469 unsigned long elapsed_usec =
3470 (curr_time - info->last_tx_active) * 1000000/HZ +
3471 curr_time_usec - info->last_tx_active_usec;
3472
3473 if (info->xmit.head != info->xmit.tail ||
3474 elapsed_usec < 2*info->char_time_usec) {
3475 result = 0;
3476 }
3477#endif
3478
3479 if (copy_to_user(value, &result, sizeof(int)))
3480 return -EFAULT;
3481 return 0;
3482}
3483
3484#ifdef SERIAL_DEBUG_IO
3485struct state_str
3486{
3487 int state;
3488 const char *str;
3489};
3490
3491const struct state_str control_state_str[] = {
3492 {TIOCM_DTR, "DTR" },
3493 {TIOCM_RTS, "RTS"},
3494 {TIOCM_ST, "ST?" },
3495 {TIOCM_SR, "SR?" },
3496 {TIOCM_CTS, "CTS" },
3497 {TIOCM_CD, "CD" },
3498 {TIOCM_RI, "RI" },
3499 {TIOCM_DSR, "DSR" },
3500 {0, NULL }
3501};
3502
3503char *get_control_state_str(int MLines, char *s)
3504{
3505 int i = 0;
3506
3507 s[0]='\0';
3508 while (control_state_str[i].str != NULL) {
3509 if (MLines & control_state_str[i].state) {
3510 if (s[0] != '\0') {
3511 strcat(s, ", ");
3512 }
3513 strcat(s, control_state_str[i].str);
3514 }
3515 i++;
3516 }
3517 return s;
3518}
3519#endif
3520
3521static int
3522rs_break(struct tty_struct *tty, int break_state)
3523{
3524 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3525 unsigned long flags;
3526
3527 if (!info->ioport)
3528 return -EIO;
3529
3530 local_irq_save(flags);
3531 if (break_state == -1) {
3532
3533
3534 info->tx_ctrl &= 0x3F;
3535 } else {
3536
3537 info->tx_ctrl |= (0x80 | 0x40);
3538 }
3539 info->ioport[REG_TR_CTRL] = info->tx_ctrl;
3540 local_irq_restore(flags);
3541 return 0;
3542}
3543
3544static int
3545rs_tiocmset(struct tty_struct *tty, unsigned int set, unsigned int clear)
3546{
3547 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3548 unsigned long flags;
3549
3550 local_irq_save(flags);
3551
3552 if (clear & TIOCM_RTS)
3553 e100_rts(info, 0);
3554 if (clear & TIOCM_DTR)
3555 e100_dtr(info, 0);
3556
3557 if (clear & TIOCM_RI)
3558 e100_ri_out(info, 0);
3559 if (clear & TIOCM_CD)
3560 e100_cd_out(info, 0);
3561
3562 if (set & TIOCM_RTS)
3563 e100_rts(info, 1);
3564 if (set & TIOCM_DTR)
3565 e100_dtr(info, 1);
3566
3567 if (set & TIOCM_RI)
3568 e100_ri_out(info, 1);
3569 if (set & TIOCM_CD)
3570 e100_cd_out(info, 1);
3571
3572 local_irq_restore(flags);
3573 return 0;
3574}
3575
3576static int
3577rs_tiocmget(struct tty_struct *tty)
3578{
3579 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3580 unsigned int result;
3581 unsigned long flags;
3582
3583 local_irq_save(flags);
3584
3585 result =
3586 (!E100_RTS_GET(info) ? TIOCM_RTS : 0)
3587 | (!E100_DTR_GET(info) ? TIOCM_DTR : 0)
3588 | (!E100_RI_GET(info) ? TIOCM_RNG : 0)
3589 | (!E100_DSR_GET(info) ? TIOCM_DSR : 0)
3590 | (!E100_CD_GET(info) ? TIOCM_CAR : 0)
3591 | (!E100_CTS_GET(info) ? TIOCM_CTS : 0);
3592
3593 local_irq_restore(flags);
3594
3595#ifdef SERIAL_DEBUG_IO
3596 printk(KERN_DEBUG "ser%i: modem state: %i 0x%08X\n",
3597 info->line, result, result);
3598 {
3599 char s[100];
3600
3601 get_control_state_str(result, s);
3602 printk(KERN_DEBUG "state: %s\n", s);
3603 }
3604#endif
3605 return result;
3606
3607}
3608
3609
3610static int
3611rs_ioctl(struct tty_struct *tty,
3612 unsigned int cmd, unsigned long arg)
3613{
3614 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
3615
3616 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
3617 (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD) &&
3618 (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT)) {
3619 if (tty->flags & (1 << TTY_IO_ERROR))
3620 return -EIO;
3621 }
3622
3623 switch (cmd) {
3624 case TIOCGSERIAL:
3625 return get_serial_info(info,
3626 (struct serial_struct *) arg);
3627 case TIOCSSERIAL:
3628 return set_serial_info(info,
3629 (struct serial_struct *) arg);
3630 case TIOCSERGETLSR:
3631 return get_lsr_info(info, (unsigned int *) arg);
3632
3633 case TIOCSERGSTRUCT:
3634 if (copy_to_user((struct e100_serial *) arg,
3635 info, sizeof(struct e100_serial)))
3636 return -EFAULT;
3637 return 0;
3638
3639#if defined(CONFIG_ETRAX_RS485)
3640 case TIOCSERSETRS485:
3641 {
3642
3643
3644
3645
3646
3647
3648 struct rs485_control rs485ctrl;
3649 struct serial_rs485 rs485data;
3650 printk(KERN_DEBUG "The use of this ioctl is deprecated. Use TIOCSRS485 instead\n");
3651 if (copy_from_user(&rs485ctrl, (struct rs485_control *)arg,
3652 sizeof(rs485ctrl)))
3653 return -EFAULT;
3654
3655 rs485data.delay_rts_before_send = rs485ctrl.delay_rts_before_send;
3656 rs485data.flags = 0;
3657
3658 if (rs485ctrl.enabled)
3659 rs485data.flags |= SER_RS485_ENABLED;
3660 else
3661 rs485data.flags &= ~(SER_RS485_ENABLED);
3662
3663 if (rs485ctrl.rts_on_send)
3664 rs485data.flags |= SER_RS485_RTS_ON_SEND;
3665 else
3666 rs485data.flags &= ~(SER_RS485_RTS_ON_SEND);
3667
3668 if (rs485ctrl.rts_after_sent)
3669 rs485data.flags |= SER_RS485_RTS_AFTER_SEND;
3670 else
3671 rs485data.flags &= ~(SER_RS485_RTS_AFTER_SEND);
3672
3673 return e100_enable_rs485(tty, &rs485data);
3674 }
3675
3676 case TIOCSRS485:
3677 {
3678
3679
3680 struct serial_rs485 rs485data;
3681 if (copy_from_user(&rs485data, (struct rs485_control *)arg,
3682 sizeof(rs485data)))
3683 return -EFAULT;
3684
3685 return e100_enable_rs485(tty, &rs485data);
3686 }
3687
3688 case TIOCGRS485:
3689 {
3690 struct serial_rs485 *rs485data =
3691 &(((struct e100_serial *)tty->driver_data)->rs485);
3692
3693 if (copy_to_user((struct serial_rs485 *) arg,
3694 rs485data,
3695 sizeof(struct serial_rs485)))
3696 return -EFAULT;
3697 break;
3698 }
3699
3700 case TIOCSERWRRS485:
3701 {
3702 struct rs485_write rs485wr;
3703 if (copy_from_user(&rs485wr, (struct rs485_write *)arg,
3704 sizeof(rs485wr)))
3705 return -EFAULT;
3706
3707 return e100_write_rs485(tty, rs485wr.outc, rs485wr.outc_size);
3708 }
3709#endif
3710
3711 default:
3712 return -ENOIOCTLCMD;
3713 }
3714 return 0;
3715}
3716
3717static void
3718rs_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
3719{
3720 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3721
3722 change_speed(info);
3723
3724
3725 if ((old_termios->c_cflag & CRTSCTS) &&
3726 !(tty->termios.c_cflag & CRTSCTS))
3727 rs_start(tty);
3728
3729}
3730
3731
3732
3733
3734
3735
3736
3737
3738
3739
3740
3741static void
3742rs_close(struct tty_struct *tty, struct file * filp)
3743{
3744 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
3745 unsigned long flags;
3746
3747 if (!info)
3748 return;
3749
3750
3751
3752 local_irq_save(flags);
3753
3754 if (tty_hung_up_p(filp)) {
3755 local_irq_restore(flags);
3756 return;
3757 }
3758
3759#ifdef SERIAL_DEBUG_OPEN
3760 printk("[%d] rs_close ttyS%d, count = %d\n", current->pid,
3761 info->line, info->count);
3762#endif
3763 if ((tty->count == 1) && (info->port.count != 1)) {
3764
3765
3766
3767
3768
3769
3770
3771 printk(KERN_ERR
3772 "rs_close: bad serial port count; tty->count is 1, "
3773 "info->count is %d\n", info->port.count);
3774 info->port.count = 1;
3775 }
3776 if (--info->port.count < 0) {
3777 printk(KERN_ERR "rs_close: bad serial port count for ttyS%d: %d\n",
3778 info->line, info->port.count);
3779 info->port.count = 0;
3780 }
3781 if (info->port.count) {
3782 local_irq_restore(flags);
3783 return;
3784 }
3785 info->port.flags |= ASYNC_CLOSING;
3786
3787
3788
3789
3790 if (info->port.flags & ASYNC_NORMAL_ACTIVE)
3791 info->normal_termios = tty->termios;
3792
3793
3794
3795
3796 tty->closing = 1;
3797 if (info->port.closing_wait != ASYNC_CLOSING_WAIT_NONE)
3798 tty_wait_until_sent(tty, info->port.closing_wait);
3799
3800
3801
3802
3803#ifdef SERIAL_HANDLE_EARLY_ERRORS
3804 e100_disable_serial_data_irq(info);
3805#endif
3806
3807#ifndef CONFIG_SVINTO_SIM
3808 e100_disable_rx(info);
3809 e100_disable_rx_irq(info);
3810
3811 if (info->port.flags & ASYNC_INITIALIZED) {
3812
3813
3814
3815
3816
3817 rs_wait_until_sent(tty, HZ);
3818 }
3819#endif
3820
3821 shutdown(info);
3822 rs_flush_buffer(tty);
3823 tty_ldisc_flush(tty);
3824 tty->closing = 0;
3825 info->event = 0;
3826 info->port.tty = NULL;
3827 if (info->port.blocked_open) {
3828 if (info->port.close_delay)
3829 schedule_timeout_interruptible(info->port.close_delay);
3830 wake_up_interruptible(&info->port.open_wait);
3831 }
3832 info->port.flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
3833 wake_up_interruptible(&info->port.close_wait);
3834 local_irq_restore(flags);
3835
3836
3837
3838#if defined(CONFIG_ETRAX_RS485)
3839 if (info->rs485.flags & SER_RS485_ENABLED) {
3840 info->rs485.flags &= ~(SER_RS485_ENABLED);
3841#if defined(CONFIG_ETRAX_RS485_ON_PA)
3842 *R_PORT_PA_DATA = port_pa_data_shadow &= ~(1 << rs485_pa_bit);
3843#endif
3844#if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
3845 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
3846 rs485_port_g_bit, 0);
3847#endif
3848#if defined(CONFIG_ETRAX_RS485_LTC1387)
3849 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
3850 CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT, 0);
3851 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
3852 CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 0);
3853#endif
3854 }
3855#endif
3856
3857
3858
3859
3860 if (info->dma_in_enabled) {
3861 free_irq(info->dma_in_irq_nbr, info);
3862 cris_free_dma(info->dma_in_nbr, info->dma_in_irq_description);
3863 info->uses_dma_in = 0;
3864#ifdef SERIAL_DEBUG_OPEN
3865 printk(KERN_DEBUG "DMA irq '%s' freed\n",
3866 info->dma_in_irq_description);
3867#endif
3868 }
3869 if (info->dma_out_enabled) {
3870 free_irq(info->dma_out_irq_nbr, info);
3871 cris_free_dma(info->dma_out_nbr, info->dma_out_irq_description);
3872 info->uses_dma_out = 0;
3873#ifdef SERIAL_DEBUG_OPEN
3874 printk(KERN_DEBUG "DMA irq '%s' freed\n",
3875 info->dma_out_irq_description);
3876#endif
3877 }
3878}
3879
3880
3881
3882
3883static void rs_wait_until_sent(struct tty_struct *tty, int timeout)
3884{
3885 unsigned long orig_jiffies;
3886 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3887 unsigned long curr_time = jiffies;
3888 unsigned long curr_time_usec = GET_JIFFIES_USEC();
3889 long elapsed_usec =
3890 (curr_time - info->last_tx_active) * (1000000/HZ) +
3891 curr_time_usec - info->last_tx_active_usec;
3892
3893
3894
3895
3896
3897 orig_jiffies = jiffies;
3898 while (info->xmit.head != info->xmit.tail ||
3899 (*info->ostatusadr & 0x007f) ||
3900 (elapsed_usec < 2*info->char_time_usec)) {
3901 schedule_timeout_interruptible(1);
3902 if (signal_pending(current))
3903 break;
3904 if (timeout && time_after(jiffies, orig_jiffies + timeout))
3905 break;
3906 curr_time = jiffies;
3907 curr_time_usec = GET_JIFFIES_USEC();
3908 elapsed_usec =
3909 (curr_time - info->last_tx_active) * (1000000/HZ) +
3910 curr_time_usec - info->last_tx_active_usec;
3911 }
3912 set_current_state(TASK_RUNNING);
3913}
3914
3915
3916
3917
3918void
3919rs_hangup(struct tty_struct *tty)
3920{
3921 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
3922
3923 rs_flush_buffer(tty);
3924 shutdown(info);
3925 info->event = 0;
3926 info->port.count = 0;
3927 info->port.flags &= ~ASYNC_NORMAL_ACTIVE;
3928 info->port.tty = NULL;
3929 wake_up_interruptible(&info->port.open_wait);
3930}
3931
3932
3933
3934
3935
3936
3937static int
3938block_til_ready(struct tty_struct *tty, struct file * filp,
3939 struct e100_serial *info)
3940{
3941 DECLARE_WAITQUEUE(wait, current);
3942 unsigned long flags;
3943 int retval;
3944 int do_clocal = 0, extra_count = 0;
3945
3946
3947
3948
3949
3950 if (tty_hung_up_p(filp) ||
3951 (info->port.flags & ASYNC_CLOSING)) {
3952 wait_event_interruptible_tty(tty, info->port.close_wait,
3953 !(info->port.flags & ASYNC_CLOSING));
3954#ifdef SERIAL_DO_RESTART
3955 if (info->port.flags & ASYNC_HUP_NOTIFY)
3956 return -EAGAIN;
3957 else
3958 return -ERESTARTSYS;
3959#else
3960 return -EAGAIN;
3961#endif
3962 }
3963
3964
3965
3966
3967
3968 if ((filp->f_flags & O_NONBLOCK) ||
3969 (tty->flags & (1 << TTY_IO_ERROR))) {
3970 info->port.flags |= ASYNC_NORMAL_ACTIVE;
3971 return 0;
3972 }
3973
3974 if (tty->termios.c_cflag & CLOCAL) {
3975 do_clocal = 1;
3976 }
3977
3978
3979
3980
3981
3982
3983
3984
3985 retval = 0;
3986 add_wait_queue(&info->port.open_wait, &wait);
3987#ifdef SERIAL_DEBUG_OPEN
3988 printk("block_til_ready before block: ttyS%d, count = %d\n",
3989 info->line, info->port.count);
3990#endif
3991 local_irq_save(flags);
3992 if (!tty_hung_up_p(filp)) {
3993 extra_count++;
3994 info->port.count--;
3995 }
3996 local_irq_restore(flags);
3997 info->port.blocked_open++;
3998 while (1) {
3999 local_irq_save(flags);
4000
4001 e100_rts(info, 1);
4002 e100_dtr(info, 1);
4003 local_irq_restore(flags);
4004 set_current_state(TASK_INTERRUPTIBLE);
4005 if (tty_hung_up_p(filp) ||
4006 !(info->port.flags & ASYNC_INITIALIZED)) {
4007#ifdef SERIAL_DO_RESTART
4008 if (info->port.flags & ASYNC_HUP_NOTIFY)
4009 retval = -EAGAIN;
4010 else
4011 retval = -ERESTARTSYS;
4012#else
4013 retval = -EAGAIN;
4014#endif
4015 break;
4016 }
4017 if (!(info->port.flags & ASYNC_CLOSING) && do_clocal)
4018
4019 break;
4020 if (signal_pending(current)) {
4021 retval = -ERESTARTSYS;
4022 break;
4023 }
4024#ifdef SERIAL_DEBUG_OPEN
4025 printk("block_til_ready blocking: ttyS%d, count = %d\n",
4026 info->line, info->port.count);
4027#endif
4028 tty_unlock(tty);
4029 schedule();
4030 tty_lock(tty);
4031 }
4032 set_current_state(TASK_RUNNING);
4033 remove_wait_queue(&info->port.open_wait, &wait);
4034 if (extra_count)
4035 info->port.count++;
4036 info->port.blocked_open--;
4037#ifdef SERIAL_DEBUG_OPEN
4038 printk("block_til_ready after blocking: ttyS%d, count = %d\n",
4039 info->line, info->port.count);
4040#endif
4041 if (retval)
4042 return retval;
4043 info->port.flags |= ASYNC_NORMAL_ACTIVE;
4044 return 0;
4045}
4046
4047static void
4048deinit_port(struct e100_serial *info)
4049{
4050 if (info->dma_out_enabled) {
4051 cris_free_dma(info->dma_out_nbr, info->dma_out_irq_description);
4052 free_irq(info->dma_out_irq_nbr, info);
4053 }
4054 if (info->dma_in_enabled) {
4055 cris_free_dma(info->dma_in_nbr, info->dma_in_irq_description);
4056 free_irq(info->dma_in_irq_nbr, info);
4057 }
4058}
4059
4060
4061
4062
4063
4064static int
4065rs_open(struct tty_struct *tty, struct file * filp)
4066{
4067 struct e100_serial *info;
4068 int retval;
4069 int allocated_resources = 0;
4070
4071 info = rs_table + tty->index;
4072 if (!info->enabled)
4073 return -ENODEV;
4074
4075#ifdef SERIAL_DEBUG_OPEN
4076 printk("[%d] rs_open %s, count = %d\n", current->pid, tty->name,
4077 info->port.count);
4078#endif
4079
4080 info->port.count++;
4081 tty->driver_data = info;
4082 info->port.tty = tty;
4083
4084 info->port.low_latency = !!(info->port.flags & ASYNC_LOW_LATENCY);
4085
4086
4087
4088
4089 if (tty_hung_up_p(filp) ||
4090 (info->port.flags & ASYNC_CLOSING)) {
4091 wait_event_interruptible_tty(tty, info->port.close_wait,
4092 !(info->port.flags & ASYNC_CLOSING));
4093#ifdef SERIAL_DO_RESTART
4094 return ((info->port.flags & ASYNC_HUP_NOTIFY) ?
4095 -EAGAIN : -ERESTARTSYS);
4096#else
4097 return -EAGAIN;
4098#endif
4099 }
4100
4101
4102
4103
4104 if (info->port.count == 1) {
4105 allocated_resources = 1;
4106 if (info->dma_in_enabled) {
4107 if (request_irq(info->dma_in_irq_nbr,
4108 rec_interrupt,
4109 info->dma_in_irq_flags,
4110 info->dma_in_irq_description,
4111 info)) {
4112 printk(KERN_WARNING "DMA irq '%s' busy; "
4113 "falling back to non-DMA mode\n",
4114 info->dma_in_irq_description);
4115
4116
4117 info->dma_in_enabled = 0;
4118 } else if (cris_request_dma(info->dma_in_nbr,
4119 info->dma_in_irq_description,
4120 DMA_VERBOSE_ON_ERROR,
4121 info->dma_owner)) {
4122 free_irq(info->dma_in_irq_nbr, info);
4123 printk(KERN_WARNING "DMA '%s' busy; "
4124 "falling back to non-DMA mode\n",
4125 info->dma_in_irq_description);
4126
4127
4128 info->dma_in_enabled = 0;
4129 }
4130#ifdef SERIAL_DEBUG_OPEN
4131 else
4132 printk(KERN_DEBUG "DMA irq '%s' allocated\n",
4133 info->dma_in_irq_description);
4134#endif
4135 }
4136 if (info->dma_out_enabled) {
4137 if (request_irq(info->dma_out_irq_nbr,
4138 tr_interrupt,
4139 info->dma_out_irq_flags,
4140 info->dma_out_irq_description,
4141 info)) {
4142 printk(KERN_WARNING "DMA irq '%s' busy; "
4143 "falling back to non-DMA mode\n",
4144 info->dma_out_irq_description);
4145
4146
4147 info->dma_out_enabled = 0;
4148 } else if (cris_request_dma(info->dma_out_nbr,
4149 info->dma_out_irq_description,
4150 DMA_VERBOSE_ON_ERROR,
4151 info->dma_owner)) {
4152 free_irq(info->dma_out_irq_nbr, info);
4153 printk(KERN_WARNING "DMA '%s' busy; "
4154 "falling back to non-DMA mode\n",
4155 info->dma_out_irq_description);
4156
4157
4158 info->dma_out_enabled = 0;
4159 }
4160#ifdef SERIAL_DEBUG_OPEN
4161 else
4162 printk(KERN_DEBUG "DMA irq '%s' allocated\n",
4163 info->dma_out_irq_description);
4164#endif
4165 }
4166 }
4167
4168
4169
4170
4171
4172 retval = startup(info);
4173 if (retval) {
4174 if (allocated_resources)
4175 deinit_port(info);
4176
4177
4178 return retval;
4179 }
4180
4181
4182 retval = block_til_ready(tty, filp, info);
4183 if (retval) {
4184#ifdef SERIAL_DEBUG_OPEN
4185 printk("rs_open returning after block_til_ready with %d\n",
4186 retval);
4187#endif
4188 if (allocated_resources)
4189 deinit_port(info);
4190
4191 return retval;
4192 }
4193
4194 if ((info->port.count == 1) && (info->port.flags & ASYNC_SPLIT_TERMIOS)) {
4195 tty->termios = info->normal_termios;
4196 change_speed(info);
4197 }
4198
4199#ifdef SERIAL_DEBUG_OPEN
4200 printk("rs_open ttyS%d successful...\n", info->line);
4201#endif
4202 DLOG_INT_TRIG( log_int_pos = 0);
4203
4204 DFLIP( if (info->line == SERIAL_DEBUG_LINE) {
4205 info->icount.rx = 0;
4206 } );
4207
4208 return 0;
4209}
4210
4211#ifdef CONFIG_PROC_FS
4212
4213
4214
4215
4216static void seq_line_info(struct seq_file *m, struct e100_serial *info)
4217{
4218 unsigned long tmp;
4219
4220 seq_printf(m, "%d: uart:E100 port:%lX irq:%d",
4221 info->line, (unsigned long)info->ioport, info->irq);
4222
4223 if (!info->ioport || (info->type == PORT_UNKNOWN)) {
4224 seq_printf(m, "\n");
4225 return;
4226 }
4227
4228 seq_printf(m, " baud:%d", info->baud);
4229 seq_printf(m, " tx:%lu rx:%lu",
4230 (unsigned long)info->icount.tx,
4231 (unsigned long)info->icount.rx);
4232 tmp = CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
4233 if (tmp)
4234 seq_printf(m, " tx_pend:%lu/%lu",
4235 (unsigned long)tmp,
4236 (unsigned long)SERIAL_XMIT_SIZE);
4237
4238 seq_printf(m, " rx_pend:%lu/%lu",
4239 (unsigned long)info->recv_cnt,
4240 (unsigned long)info->max_recv_cnt);
4241
4242#if 1
4243 if (info->port.tty) {
4244 if (info->port.tty->stopped)
4245 seq_printf(m, " stopped:%i",
4246 (int)info->port.tty->stopped);
4247 }
4248
4249 {
4250 unsigned char rstat = info->ioport[REG_STATUS];
4251 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect))
4252 seq_printf(m, " xoff_detect:1");
4253 }
4254
4255#endif
4256
4257 if (info->icount.frame)
4258 seq_printf(m, " fe:%lu", (unsigned long)info->icount.frame);
4259
4260 if (info->icount.parity)
4261 seq_printf(m, " pe:%lu", (unsigned long)info->icount.parity);
4262
4263 if (info->icount.brk)
4264 seq_printf(m, " brk:%lu", (unsigned long)info->icount.brk);
4265
4266 if (info->icount.overrun)
4267 seq_printf(m, " oe:%lu", (unsigned long)info->icount.overrun);
4268
4269
4270
4271
4272 if (!E100_RTS_GET(info))
4273 seq_puts(m, "|RTS");
4274 if (!E100_CTS_GET(info))
4275 seq_puts(m, "|CTS");
4276 if (!E100_DTR_GET(info))
4277 seq_puts(m, "|DTR");
4278 if (!E100_DSR_GET(info))
4279 seq_puts(m, "|DSR");
4280 if (!E100_CD_GET(info))
4281 seq_puts(m, "|CD");
4282 if (!E100_RI_GET(info))
4283 seq_puts(m, "|RI");
4284 seq_puts(m, "\n");
4285}
4286
4287
4288static int crisv10_proc_show(struct seq_file *m, void *v)
4289{
4290 int i;
4291
4292 seq_printf(m, "serinfo:1.0 driver:%s\n", serial_version);
4293
4294 for (i = 0; i < NR_PORTS; i++) {
4295 if (!rs_table[i].enabled)
4296 continue;
4297 seq_line_info(m, &rs_table[i]);
4298 }
4299#ifdef DEBUG_LOG_INCLUDED
4300 for (i = 0; i < debug_log_pos; i++) {
4301 seq_printf(m, "%-4i %lu.%lu ",
4302 i, debug_log[i].time,
4303 timer_data_to_ns(debug_log[i].timer_data));
4304 seq_printf(m, debug_log[i].string, debug_log[i].value);
4305 }
4306 seq_printf(m, "debug_log %i/%i\n", i, DEBUG_LOG_SIZE);
4307 debug_log_pos = 0;
4308#endif
4309 return 0;
4310}
4311
4312static int crisv10_proc_open(struct inode *inode, struct file *file)
4313{
4314 return single_open(file, crisv10_proc_show, NULL);
4315}
4316
4317static const struct file_operations crisv10_proc_fops = {
4318 .owner = THIS_MODULE,
4319 .open = crisv10_proc_open,
4320 .read = seq_read,
4321 .llseek = seq_lseek,
4322 .release = single_release,
4323};
4324#endif
4325
4326
4327
4328
4329static void show_serial_version(void)
4330{
4331 printk(KERN_INFO
4332 "ETRAX 100LX serial-driver %s, "
4333 "(c) 2000-2004 Axis Communications AB\r\n",
4334 &serial_version[11]);
4335}
4336
4337
4338
4339static const struct tty_operations rs_ops = {
4340 .open = rs_open,
4341 .close = rs_close,
4342 .write = rs_write,
4343 .flush_chars = rs_flush_chars,
4344 .write_room = rs_write_room,
4345 .chars_in_buffer = rs_chars_in_buffer,
4346 .flush_buffer = rs_flush_buffer,
4347 .ioctl = rs_ioctl,
4348 .throttle = rs_throttle,
4349 .unthrottle = rs_unthrottle,
4350 .set_termios = rs_set_termios,
4351 .stop = rs_stop,
4352 .start = rs_start,
4353 .hangup = rs_hangup,
4354 .break_ctl = rs_break,
4355 .send_xchar = rs_send_xchar,
4356 .wait_until_sent = rs_wait_until_sent,
4357 .tiocmget = rs_tiocmget,
4358 .tiocmset = rs_tiocmset,
4359#ifdef CONFIG_PROC_FS
4360 .proc_fops = &crisv10_proc_fops,
4361#endif
4362};
4363
4364static int __init rs_init(void)
4365{
4366 int i;
4367 struct e100_serial *info;
4368 struct tty_driver *driver = alloc_tty_driver(NR_PORTS);
4369
4370 if (!driver)
4371 return -ENOMEM;
4372
4373 show_serial_version();
4374
4375
4376
4377#if !defined(CONFIG_ETRAX_SERIAL_FAST_TIMER)
4378 setup_timer(&flush_timer, timed_flush_handler, 0);
4379 mod_timer(&flush_timer, jiffies + 5);
4380#endif
4381
4382#if defined(CONFIG_ETRAX_RS485)
4383#if defined(CONFIG_ETRAX_RS485_ON_PA)
4384 if (cris_io_interface_allocate_pins(if_serial_0, 'a', rs485_pa_bit,
4385 rs485_pa_bit)) {
4386 printk(KERN_ERR "ETRAX100LX serial: Could not allocate "
4387 "RS485 pin\n");
4388 put_tty_driver(driver);
4389 return -EBUSY;
4390 }
4391#endif
4392#if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
4393 if (cris_io_interface_allocate_pins(if_serial_0, 'g', rs485_pa_bit,
4394 rs485_port_g_bit)) {
4395 printk(KERN_ERR "ETRAX100LX serial: Could not allocate "
4396 "RS485 pin\n");
4397 put_tty_driver(driver);
4398 return -EBUSY;
4399 }
4400#endif
4401#endif
4402
4403
4404
4405 driver->driver_name = "serial";
4406 driver->name = "ttyS";
4407 driver->major = TTY_MAJOR;
4408 driver->minor_start = 64;
4409 driver->type = TTY_DRIVER_TYPE_SERIAL;
4410 driver->subtype = SERIAL_TYPE_NORMAL;
4411 driver->init_termios = tty_std_termios;
4412 driver->init_termios.c_cflag =
4413 B115200 | CS8 | CREAD | HUPCL | CLOCAL;
4414 driver->init_termios.c_ispeed = 115200;
4415 driver->init_termios.c_ospeed = 115200;
4416 driver->flags = TTY_DRIVER_REAL_RAW;
4417
4418 tty_set_operations(driver, &rs_ops);
4419 serial_driver = driver;
4420
4421
4422 for (i = 0, info = rs_table; i < NR_PORTS; i++,info++) {
4423 if (info->enabled) {
4424 if (cris_request_io_interface(info->io_if,
4425 info->io_if_description)) {
4426 printk(KERN_ERR "ETRAX100LX async serial: "
4427 "Could not allocate IO pins for "
4428 "%s, port %d\n",
4429 info->io_if_description, i);
4430 info->enabled = 0;
4431 }
4432 }
4433 tty_port_init(&info->port);
4434 info->uses_dma_in = 0;
4435 info->uses_dma_out = 0;
4436 info->line = i;
4437 info->port.tty = NULL;
4438 info->type = PORT_ETRAX;
4439 info->tr_running = 0;
4440 info->forced_eop = 0;
4441 info->baud_base = DEF_BAUD_BASE;
4442 info->custom_divisor = 0;
4443 info->x_char = 0;
4444 info->event = 0;
4445 info->normal_termios = driver->init_termios;
4446 info->xmit.buf = NULL;
4447 info->xmit.tail = info->xmit.head = 0;
4448 info->first_recv_buffer = info->last_recv_buffer = NULL;
4449 info->recv_cnt = info->max_recv_cnt = 0;
4450 info->last_tx_active_usec = 0;
4451 info->last_tx_active = 0;
4452
4453#if defined(CONFIG_ETRAX_RS485)
4454
4455 info->rs485.flags &= ~(SER_RS485_RTS_ON_SEND);
4456 info->rs485.flags |= SER_RS485_RTS_AFTER_SEND;
4457 info->rs485.delay_rts_before_send = 0;
4458 info->rs485.flags &= ~(SER_RS485_ENABLED);
4459#endif
4460 INIT_WORK(&info->work, do_softint);
4461
4462 if (info->enabled) {
4463 printk(KERN_INFO "%s%d at %p is a builtin UART with DMA\n",
4464 serial_driver->name, info->line, info->ioport);
4465 }
4466 tty_port_link_device(&info->port, driver, i);
4467 }
4468
4469 if (tty_register_driver(driver))
4470 panic("Couldn't register serial driver\n");
4471
4472#ifdef CONFIG_ETRAX_FAST_TIMER
4473#ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
4474 memset(fast_timers, 0, sizeof(fast_timers));
4475#endif
4476#ifdef CONFIG_ETRAX_RS485
4477 memset(fast_timers_rs485, 0, sizeof(fast_timers_rs485));
4478#endif
4479 fast_timer_init();
4480#endif
4481
4482#ifndef CONFIG_SVINTO_SIM
4483#ifndef CONFIG_ETRAX_KGDB
4484
4485
4486
4487 if (request_irq(SERIAL_IRQ_NBR, ser_interrupt,
4488 IRQF_SHARED, "serial ", driver))
4489 panic("%s: Failed to request irq8", __func__);
4490
4491#endif
4492#endif
4493
4494 return 0;
4495}
4496
4497
4498
4499module_init(rs_init);
4500