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12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/errno.h>
16#include <linux/err.h>
17#include <linux/platform_device.h>
18#include <linux/delay.h>
19#include <linux/list.h>
20#include <linux/interrupt.h>
21#include <linux/proc_fs.h>
22#include <linux/clk.h>
23#include <linux/irq.h>
24#include <linux/gpio.h>
25#include <linux/slab.h>
26#include <linux/prefetch.h>
27#include <linux/byteorder/generic.h>
28#include <linux/platform_data/pxa2xx_udc.h>
29
30#include <linux/usb.h>
31#include <linux/usb/ch9.h>
32#include <linux/usb/gadget.h>
33
34#include "pxa27x_udc.h"
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72
73#define DRIVER_VERSION "2008-04-18"
74#define DRIVER_DESC "PXA 27x USB Device Controller driver"
75
76static const char driver_name[] = "pxa27x_udc";
77static struct pxa_udc *the_controller;
78
79static void handle_ep(struct pxa_ep *ep);
80
81
82
83
84#ifdef CONFIG_USB_GADGET_DEBUG_FS
85
86#include <linux/debugfs.h>
87#include <linux/uaccess.h>
88#include <linux/seq_file.h>
89
90static int state_dbg_show(struct seq_file *s, void *p)
91{
92 struct pxa_udc *udc = s->private;
93 int pos = 0, ret;
94 u32 tmp;
95
96 ret = -ENODEV;
97 if (!udc->driver)
98 goto out;
99
100
101 pos += seq_printf(s, DRIVER_DESC "\n"
102 "%s version: %s\nGadget driver: %s\n",
103 driver_name, DRIVER_VERSION,
104 udc->driver ? udc->driver->driver.name : "(none)");
105
106 tmp = udc_readl(udc, UDCCR);
107 pos += seq_printf(s,
108 "udccr=0x%0x(%s%s%s%s%s%s%s%s%s%s), "
109 "con=%d,inter=%d,altinter=%d\n", tmp,
110 (tmp & UDCCR_OEN) ? " oen":"",
111 (tmp & UDCCR_AALTHNP) ? " aalthnp":"",
112 (tmp & UDCCR_AHNP) ? " rem" : "",
113 (tmp & UDCCR_BHNP) ? " rstir" : "",
114 (tmp & UDCCR_DWRE) ? " dwre" : "",
115 (tmp & UDCCR_SMAC) ? " smac" : "",
116 (tmp & UDCCR_EMCE) ? " emce" : "",
117 (tmp & UDCCR_UDR) ? " udr" : "",
118 (tmp & UDCCR_UDA) ? " uda" : "",
119 (tmp & UDCCR_UDE) ? " ude" : "",
120 (tmp & UDCCR_ACN) >> UDCCR_ACN_S,
121 (tmp & UDCCR_AIN) >> UDCCR_AIN_S,
122 (tmp & UDCCR_AAISN) >> UDCCR_AAISN_S);
123
124 pos += seq_printf(s, "udcicr0=0x%08x udcicr1=0x%08x\n",
125 udc_readl(udc, UDCICR0), udc_readl(udc, UDCICR1));
126 pos += seq_printf(s, "udcisr0=0x%08x udcisr1=0x%08x\n",
127 udc_readl(udc, UDCISR0), udc_readl(udc, UDCISR1));
128 pos += seq_printf(s, "udcfnr=%d\n", udc_readl(udc, UDCFNR));
129 pos += seq_printf(s, "irqs: reset=%lu, suspend=%lu, resume=%lu, "
130 "reconfig=%lu\n",
131 udc->stats.irqs_reset, udc->stats.irqs_suspend,
132 udc->stats.irqs_resume, udc->stats.irqs_reconfig);
133
134 ret = 0;
135out:
136 return ret;
137}
138
139static int queues_dbg_show(struct seq_file *s, void *p)
140{
141 struct pxa_udc *udc = s->private;
142 struct pxa_ep *ep;
143 struct pxa27x_request *req;
144 int pos = 0, i, maxpkt, ret;
145
146 ret = -ENODEV;
147 if (!udc->driver)
148 goto out;
149
150
151 for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
152 ep = &udc->pxa_ep[i];
153 maxpkt = ep->fifo_size;
154 pos += seq_printf(s, "%-12s max_pkt=%d %s\n",
155 EPNAME(ep), maxpkt, "pio");
156
157 if (list_empty(&ep->queue)) {
158 pos += seq_printf(s, "\t(nothing queued)\n");
159 continue;
160 }
161
162 list_for_each_entry(req, &ep->queue, queue) {
163 pos += seq_printf(s, "\treq %p len %d/%d buf %p\n",
164 &req->req, req->req.actual,
165 req->req.length, req->req.buf);
166 }
167 }
168
169 ret = 0;
170out:
171 return ret;
172}
173
174static int eps_dbg_show(struct seq_file *s, void *p)
175{
176 struct pxa_udc *udc = s->private;
177 struct pxa_ep *ep;
178 int pos = 0, i, ret;
179 u32 tmp;
180
181 ret = -ENODEV;
182 if (!udc->driver)
183 goto out;
184
185 ep = &udc->pxa_ep[0];
186 tmp = udc_ep_readl(ep, UDCCSR);
187 pos += seq_printf(s, "udccsr0=0x%03x(%s%s%s%s%s%s%s)\n", tmp,
188 (tmp & UDCCSR0_SA) ? " sa" : "",
189 (tmp & UDCCSR0_RNE) ? " rne" : "",
190 (tmp & UDCCSR0_FST) ? " fst" : "",
191 (tmp & UDCCSR0_SST) ? " sst" : "",
192 (tmp & UDCCSR0_DME) ? " dme" : "",
193 (tmp & UDCCSR0_IPR) ? " ipr" : "",
194 (tmp & UDCCSR0_OPC) ? " opc" : "");
195 for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
196 ep = &udc->pxa_ep[i];
197 tmp = i? udc_ep_readl(ep, UDCCR) : udc_readl(udc, UDCCR);
198 pos += seq_printf(s, "%-12s: "
199 "IN %lu(%lu reqs), OUT %lu(%lu reqs), "
200 "irqs=%lu, udccr=0x%08x, udccsr=0x%03x, "
201 "udcbcr=%d\n",
202 EPNAME(ep),
203 ep->stats.in_bytes, ep->stats.in_ops,
204 ep->stats.out_bytes, ep->stats.out_ops,
205 ep->stats.irqs,
206 tmp, udc_ep_readl(ep, UDCCSR),
207 udc_ep_readl(ep, UDCBCR));
208 }
209
210 ret = 0;
211out:
212 return ret;
213}
214
215static int eps_dbg_open(struct inode *inode, struct file *file)
216{
217 return single_open(file, eps_dbg_show, inode->i_private);
218}
219
220static int queues_dbg_open(struct inode *inode, struct file *file)
221{
222 return single_open(file, queues_dbg_show, inode->i_private);
223}
224
225static int state_dbg_open(struct inode *inode, struct file *file)
226{
227 return single_open(file, state_dbg_show, inode->i_private);
228}
229
230static const struct file_operations state_dbg_fops = {
231 .owner = THIS_MODULE,
232 .open = state_dbg_open,
233 .llseek = seq_lseek,
234 .read = seq_read,
235 .release = single_release,
236};
237
238static const struct file_operations queues_dbg_fops = {
239 .owner = THIS_MODULE,
240 .open = queues_dbg_open,
241 .llseek = seq_lseek,
242 .read = seq_read,
243 .release = single_release,
244};
245
246static const struct file_operations eps_dbg_fops = {
247 .owner = THIS_MODULE,
248 .open = eps_dbg_open,
249 .llseek = seq_lseek,
250 .read = seq_read,
251 .release = single_release,
252};
253
254static void pxa_init_debugfs(struct pxa_udc *udc)
255{
256 struct dentry *root, *state, *queues, *eps;
257
258 root = debugfs_create_dir(udc->gadget.name, NULL);
259 if (IS_ERR(root) || !root)
260 goto err_root;
261
262 state = debugfs_create_file("udcstate", 0400, root, udc,
263 &state_dbg_fops);
264 if (!state)
265 goto err_state;
266 queues = debugfs_create_file("queues", 0400, root, udc,
267 &queues_dbg_fops);
268 if (!queues)
269 goto err_queues;
270 eps = debugfs_create_file("epstate", 0400, root, udc,
271 &eps_dbg_fops);
272 if (!eps)
273 goto err_eps;
274
275 udc->debugfs_root = root;
276 udc->debugfs_state = state;
277 udc->debugfs_queues = queues;
278 udc->debugfs_eps = eps;
279 return;
280err_eps:
281 debugfs_remove(eps);
282err_queues:
283 debugfs_remove(queues);
284err_state:
285 debugfs_remove(root);
286err_root:
287 dev_err(udc->dev, "debugfs is not available\n");
288}
289
290static void pxa_cleanup_debugfs(struct pxa_udc *udc)
291{
292 debugfs_remove(udc->debugfs_eps);
293 debugfs_remove(udc->debugfs_queues);
294 debugfs_remove(udc->debugfs_state);
295 debugfs_remove(udc->debugfs_root);
296 udc->debugfs_eps = NULL;
297 udc->debugfs_queues = NULL;
298 udc->debugfs_state = NULL;
299 udc->debugfs_root = NULL;
300}
301
302#else
303static inline void pxa_init_debugfs(struct pxa_udc *udc)
304{
305}
306
307static inline void pxa_cleanup_debugfs(struct pxa_udc *udc)
308{
309}
310#endif
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321
322static int is_match_usb_pxa(struct udc_usb_ep *udc_usb_ep, struct pxa_ep *ep,
323 int config, int interface, int altsetting)
324{
325 if (usb_endpoint_num(&udc_usb_ep->desc) != ep->addr)
326 return 0;
327 if (usb_endpoint_dir_in(&udc_usb_ep->desc) != ep->dir_in)
328 return 0;
329 if (usb_endpoint_type(&udc_usb_ep->desc) != ep->type)
330 return 0;
331 if ((ep->config != config) || (ep->interface != interface)
332 || (ep->alternate != altsetting))
333 return 0;
334 return 1;
335}
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362static struct pxa_ep *find_pxa_ep(struct pxa_udc *udc,
363 struct udc_usb_ep *udc_usb_ep)
364{
365 int i;
366 struct pxa_ep *ep;
367 int cfg = udc->config;
368 int iface = udc->last_interface;
369 int alt = udc->last_alternate;
370
371 if (udc_usb_ep == &udc->udc_usb_ep[0])
372 return &udc->pxa_ep[0];
373
374 for (i = 1; i < NR_PXA_ENDPOINTS; i++) {
375 ep = &udc->pxa_ep[i];
376 if (is_match_usb_pxa(udc_usb_ep, ep, cfg, iface, alt))
377 return ep;
378 }
379 return NULL;
380}
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390
391
392static void update_pxa_ep_matches(struct pxa_udc *udc)
393{
394 int i;
395 struct udc_usb_ep *udc_usb_ep;
396
397 for (i = 1; i < NR_USB_ENDPOINTS; i++) {
398 udc_usb_ep = &udc->udc_usb_ep[i];
399 if (udc_usb_ep->pxa_ep)
400 udc_usb_ep->pxa_ep = find_pxa_ep(udc, udc_usb_ep);
401 }
402}
403
404
405
406
407
408static void pio_irq_enable(struct pxa_ep *ep)
409{
410 struct pxa_udc *udc = ep->dev;
411 int index = EPIDX(ep);
412 u32 udcicr0 = udc_readl(udc, UDCICR0);
413 u32 udcicr1 = udc_readl(udc, UDCICR1);
414
415 if (index < 16)
416 udc_writel(udc, UDCICR0, udcicr0 | (3 << (index * 2)));
417 else
418 udc_writel(udc, UDCICR1, udcicr1 | (3 << ((index - 16) * 2)));
419}
420
421
422
423
424
425static void pio_irq_disable(struct pxa_ep *ep)
426{
427 struct pxa_udc *udc = ep->dev;
428 int index = EPIDX(ep);
429 u32 udcicr0 = udc_readl(udc, UDCICR0);
430 u32 udcicr1 = udc_readl(udc, UDCICR1);
431
432 if (index < 16)
433 udc_writel(udc, UDCICR0, udcicr0 & ~(3 << (index * 2)));
434 else
435 udc_writel(udc, UDCICR1, udcicr1 & ~(3 << ((index - 16) * 2)));
436}
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444
445static inline void udc_set_mask_UDCCR(struct pxa_udc *udc, int mask)
446{
447 u32 udccr = udc_readl(udc, UDCCR);
448 udc_writel(udc, UDCCR,
449 (udccr & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS));
450}
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458
459static inline void udc_clear_mask_UDCCR(struct pxa_udc *udc, int mask)
460{
461 u32 udccr = udc_readl(udc, UDCCR);
462 udc_writel(udc, UDCCR,
463 (udccr & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS));
464}
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476static inline void ep_write_UDCCSR(struct pxa_ep *ep, int mask)
477{
478 if (is_ep0(ep))
479 mask |= UDCCSR0_ACM;
480 udc_ep_writel(ep, UDCCSR, mask);
481}
482
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487
488
489static int ep_count_bytes_remain(struct pxa_ep *ep)
490{
491 if (ep->dir_in)
492 return -EOPNOTSUPP;
493 return udc_ep_readl(ep, UDCBCR) & 0x3ff;
494}
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506static int ep_is_empty(struct pxa_ep *ep)
507{
508 int ret;
509
510 if (!is_ep0(ep) && ep->dir_in)
511 return -EOPNOTSUPP;
512 if (is_ep0(ep))
513 ret = !(udc_ep_readl(ep, UDCCSR) & UDCCSR0_RNE);
514 else
515 ret = !(udc_ep_readl(ep, UDCCSR) & UDCCSR_BNE);
516 return ret;
517}
518
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527
528static int ep_is_full(struct pxa_ep *ep)
529{
530 if (is_ep0(ep))
531 return (udc_ep_readl(ep, UDCCSR) & UDCCSR0_IPR);
532 if (!ep->dir_in)
533 return -EOPNOTSUPP;
534 return (!(udc_ep_readl(ep, UDCCSR) & UDCCSR_BNF));
535}
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541
542
543static int epout_has_pkt(struct pxa_ep *ep)
544{
545 if (!is_ep0(ep) && ep->dir_in)
546 return -EOPNOTSUPP;
547 if (is_ep0(ep))
548 return (udc_ep_readl(ep, UDCCSR) & UDCCSR0_OPC);
549 return (udc_ep_readl(ep, UDCCSR) & UDCCSR_PC);
550}
551
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555
556
557static void set_ep0state(struct pxa_udc *udc, int state)
558{
559 struct pxa_ep *ep = &udc->pxa_ep[0];
560 char *old_stname = EP0_STNAME(udc);
561
562 udc->ep0state = state;
563 ep_dbg(ep, "state=%s->%s, udccsr0=0x%03x, udcbcr=%d\n", old_stname,
564 EP0_STNAME(udc), udc_ep_readl(ep, UDCCSR),
565 udc_ep_readl(ep, UDCBCR));
566}
567
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569
570
571
572static void ep0_idle(struct pxa_udc *dev)
573{
574 set_ep0state(dev, WAIT_FOR_SETUP);
575}
576
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583
584static void inc_ep_stats_reqs(struct pxa_ep *ep, int is_in)
585{
586 if (is_in)
587 ep->stats.in_ops++;
588 else
589 ep->stats.out_ops++;
590}
591
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596
597
598static void inc_ep_stats_bytes(struct pxa_ep *ep, int count, int is_in)
599{
600 if (is_in)
601 ep->stats.in_bytes += count;
602 else
603 ep->stats.out_bytes += count;
604}
605
606
607
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609
610
611
612static void pxa_ep_setup(struct pxa_ep *ep)
613{
614 u32 new_udccr;
615
616 new_udccr = ((ep->config << UDCCONR_CN_S) & UDCCONR_CN)
617 | ((ep->interface << UDCCONR_IN_S) & UDCCONR_IN)
618 | ((ep->alternate << UDCCONR_AISN_S) & UDCCONR_AISN)
619 | ((EPADDR(ep) << UDCCONR_EN_S) & UDCCONR_EN)
620 | ((EPXFERTYPE(ep) << UDCCONR_ET_S) & UDCCONR_ET)
621 | ((ep->dir_in) ? UDCCONR_ED : 0)
622 | ((ep->fifo_size << UDCCONR_MPS_S) & UDCCONR_MPS)
623 | UDCCONR_EE;
624
625 udc_ep_writel(ep, UDCCR, new_udccr);
626}
627
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631
632
633
634static void pxa_eps_setup(struct pxa_udc *dev)
635{
636 unsigned int i;
637
638 dev_dbg(dev->dev, "%s: dev=%p\n", __func__, dev);
639
640 for (i = 1; i < NR_PXA_ENDPOINTS; i++)
641 pxa_ep_setup(&dev->pxa_ep[i]);
642}
643
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651
652
653static struct usb_request *
654pxa_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
655{
656 struct pxa27x_request *req;
657
658 req = kzalloc(sizeof *req, gfp_flags);
659 if (!req)
660 return NULL;
661
662 INIT_LIST_HEAD(&req->queue);
663 req->in_use = 0;
664 req->udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
665
666 return &req->req;
667}
668
669
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675
676static void pxa_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
677{
678 struct pxa27x_request *req;
679
680 req = container_of(_req, struct pxa27x_request, req);
681 WARN_ON(!list_empty(&req->queue));
682 kfree(req);
683}
684
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694
695static void ep_add_request(struct pxa_ep *ep, struct pxa27x_request *req)
696{
697 if (unlikely(!req))
698 return;
699 ep_vdbg(ep, "req:%p, lg=%d, udccsr=0x%03x\n", req,
700 req->req.length, udc_ep_readl(ep, UDCCSR));
701
702 req->in_use = 1;
703 list_add_tail(&req->queue, &ep->queue);
704 pio_irq_enable(ep);
705}
706
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716
717
718static void ep_del_request(struct pxa_ep *ep, struct pxa27x_request *req)
719{
720 if (unlikely(!req))
721 return;
722 ep_vdbg(ep, "req:%p, lg=%d, udccsr=0x%03x\n", req,
723 req->req.length, udc_ep_readl(ep, UDCCSR));
724
725 list_del_init(&req->queue);
726 req->in_use = 0;
727 if (!is_ep0(ep) && list_empty(&ep->queue))
728 pio_irq_disable(ep);
729}
730
731
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739
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741
742static void req_done(struct pxa_ep *ep, struct pxa27x_request *req, int status,
743 unsigned long *pflags)
744{
745 unsigned long flags;
746
747 ep_del_request(ep, req);
748 if (likely(req->req.status == -EINPROGRESS))
749 req->req.status = status;
750 else
751 status = req->req.status;
752
753 if (status && status != -ESHUTDOWN)
754 ep_dbg(ep, "complete req %p stat %d len %u/%u\n",
755 &req->req, status,
756 req->req.actual, req->req.length);
757
758 if (pflags)
759 spin_unlock_irqrestore(&ep->lock, *pflags);
760 local_irq_save(flags);
761 req->req.complete(&req->udc_usb_ep->usb_ep, &req->req);
762 local_irq_restore(flags);
763 if (pflags)
764 spin_lock_irqsave(&ep->lock, *pflags);
765}
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776
777static void ep_end_out_req(struct pxa_ep *ep, struct pxa27x_request *req,
778 unsigned long *pflags)
779{
780 inc_ep_stats_reqs(ep, !USB_DIR_IN);
781 req_done(ep, req, 0, pflags);
782}
783
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794
795static void ep0_end_out_req(struct pxa_ep *ep, struct pxa27x_request *req,
796 unsigned long *pflags)
797{
798 set_ep0state(ep->dev, OUT_STATUS_STAGE);
799 ep_end_out_req(ep, req, pflags);
800 ep0_idle(ep->dev);
801}
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813static void ep_end_in_req(struct pxa_ep *ep, struct pxa27x_request *req,
814 unsigned long *pflags)
815{
816 inc_ep_stats_reqs(ep, USB_DIR_IN);
817 req_done(ep, req, 0, pflags);
818}
819
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831static void ep0_end_in_req(struct pxa_ep *ep, struct pxa27x_request *req,
832 unsigned long *pflags)
833{
834 set_ep0state(ep->dev, IN_STATUS_STAGE);
835 ep_end_in_req(ep, req, pflags);
836}
837
838
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846
847
848static void nuke(struct pxa_ep *ep, int status)
849{
850 struct pxa27x_request *req;
851 unsigned long flags;
852
853 spin_lock_irqsave(&ep->lock, flags);
854 while (!list_empty(&ep->queue)) {
855 req = list_entry(ep->queue.next, struct pxa27x_request, queue);
856 req_done(ep, req, status, &flags);
857 }
858 spin_unlock_irqrestore(&ep->lock, flags);
859}
860
861
862
863
864
865
866
867
868
869
870
871
872static int read_packet(struct pxa_ep *ep, struct pxa27x_request *req)
873{
874 u32 *buf;
875 int bytes_ep, bufferspace, count, i;
876
877 bytes_ep = ep_count_bytes_remain(ep);
878 bufferspace = req->req.length - req->req.actual;
879
880 buf = (u32 *)(req->req.buf + req->req.actual);
881 prefetchw(buf);
882
883 if (likely(!ep_is_empty(ep)))
884 count = min(bytes_ep, bufferspace);
885 else
886 count = 0;
887
888 for (i = count; i > 0; i -= 4)
889 *buf++ = udc_ep_readl(ep, UDCDR);
890 req->req.actual += count;
891
892 ep_write_UDCCSR(ep, UDCCSR_PC);
893
894 return count;
895}
896
897
898
899
900
901
902
903
904
905
906
907
908
909static int write_packet(struct pxa_ep *ep, struct pxa27x_request *req,
910 unsigned int max)
911{
912 int length, count, remain, i;
913 u32 *buf;
914 u8 *buf_8;
915
916 buf = (u32 *)(req->req.buf + req->req.actual);
917 prefetch(buf);
918
919 length = min(req->req.length - req->req.actual, max);
920 req->req.actual += length;
921
922 remain = length & 0x3;
923 count = length & ~(0x3);
924 for (i = count; i > 0 ; i -= 4)
925 udc_ep_writel(ep, UDCDR, *buf++);
926
927 buf_8 = (u8 *)buf;
928 for (i = remain; i > 0; i--)
929 udc_ep_writeb(ep, UDCDR, *buf_8++);
930
931 ep_vdbg(ep, "length=%d+%d, udccsr=0x%03x\n", count, remain,
932 udc_ep_readl(ep, UDCCSR));
933
934 return length;
935}
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951static int read_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
952{
953 int count, is_short, completed = 0;
954
955 while (epout_has_pkt(ep)) {
956 count = read_packet(ep, req);
957 inc_ep_stats_bytes(ep, count, !USB_DIR_IN);
958
959 is_short = (count < ep->fifo_size);
960 ep_dbg(ep, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n",
961 udc_ep_readl(ep, UDCCSR), count, is_short ? "/S" : "",
962 &req->req, req->req.actual, req->req.length);
963
964
965 if (is_short || req->req.actual == req->req.length) {
966 completed = 1;
967 break;
968 }
969
970 }
971 return completed;
972}
973
974
975
976
977
978
979
980
981
982
983
984
985
986static int write_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
987{
988 unsigned max;
989 int count, is_short, is_last = 0, completed = 0, totcount = 0;
990 u32 udccsr;
991
992 max = ep->fifo_size;
993 do {
994 is_short = 0;
995
996 udccsr = udc_ep_readl(ep, UDCCSR);
997 if (udccsr & UDCCSR_PC) {
998 ep_vdbg(ep, "Clearing Transmit Complete, udccsr=%x\n",
999 udccsr);
1000 ep_write_UDCCSR(ep, UDCCSR_PC);
1001 }
1002 if (udccsr & UDCCSR_TRN) {
1003 ep_vdbg(ep, "Clearing Underrun on, udccsr=%x\n",
1004 udccsr);
1005 ep_write_UDCCSR(ep, UDCCSR_TRN);
1006 }
1007
1008 count = write_packet(ep, req, max);
1009 inc_ep_stats_bytes(ep, count, USB_DIR_IN);
1010 totcount += count;
1011
1012
1013 if (unlikely(count < max)) {
1014 is_last = 1;
1015 is_short = 1;
1016 } else {
1017 if (likely(req->req.length > req->req.actual)
1018 || req->req.zero)
1019 is_last = 0;
1020 else
1021 is_last = 1;
1022
1023 is_short = unlikely(max < ep->fifo_size);
1024 }
1025
1026 if (is_short)
1027 ep_write_UDCCSR(ep, UDCCSR_SP);
1028
1029
1030 if (is_last) {
1031 completed = 1;
1032 break;
1033 }
1034 } while (!ep_is_full(ep));
1035
1036 ep_dbg(ep, "wrote count:%d bytes%s%s, left:%d req=%p\n",
1037 totcount, is_last ? "/L" : "", is_short ? "/S" : "",
1038 req->req.length - req->req.actual, &req->req);
1039
1040 return completed;
1041}
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054static int read_ep0_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
1055{
1056 int count, is_short, completed = 0;
1057
1058 while (epout_has_pkt(ep)) {
1059 count = read_packet(ep, req);
1060 ep_write_UDCCSR(ep, UDCCSR0_OPC);
1061 inc_ep_stats_bytes(ep, count, !USB_DIR_IN);
1062
1063 is_short = (count < ep->fifo_size);
1064 ep_dbg(ep, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n",
1065 udc_ep_readl(ep, UDCCSR), count, is_short ? "/S" : "",
1066 &req->req, req->req.actual, req->req.length);
1067
1068 if (is_short || req->req.actual >= req->req.length) {
1069 completed = 1;
1070 break;
1071 }
1072 }
1073
1074 return completed;
1075}
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092static int write_ep0_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
1093{
1094 unsigned count;
1095 int is_last, is_short;
1096
1097 count = write_packet(ep, req, EP0_FIFO_SIZE);
1098 inc_ep_stats_bytes(ep, count, USB_DIR_IN);
1099
1100 is_short = (count < EP0_FIFO_SIZE);
1101 is_last = ((count == 0) || (count < EP0_FIFO_SIZE));
1102
1103
1104 if (unlikely(is_short))
1105 ep_write_UDCCSR(ep, UDCCSR0_IPR);
1106
1107 ep_dbg(ep, "in %d bytes%s%s, %d left, req=%p, udccsr0=0x%03x\n",
1108 count, is_short ? "/S" : "", is_last ? "/L" : "",
1109 req->req.length - req->req.actual,
1110 &req->req, udc_ep_readl(ep, UDCCSR));
1111
1112 return is_last;
1113}
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127static int pxa_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
1128 gfp_t gfp_flags)
1129{
1130 struct udc_usb_ep *udc_usb_ep;
1131 struct pxa_ep *ep;
1132 struct pxa27x_request *req;
1133 struct pxa_udc *dev;
1134 unsigned long flags;
1135 int rc = 0;
1136 int is_first_req;
1137 unsigned length;
1138 int recursion_detected;
1139
1140 req = container_of(_req, struct pxa27x_request, req);
1141 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1142
1143 if (unlikely(!_req || !_req->complete || !_req->buf))
1144 return -EINVAL;
1145
1146 if (unlikely(!_ep))
1147 return -EINVAL;
1148
1149 dev = udc_usb_ep->dev;
1150 ep = udc_usb_ep->pxa_ep;
1151 if (unlikely(!ep))
1152 return -EINVAL;
1153
1154 dev = ep->dev;
1155 if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1156 ep_dbg(ep, "bogus device state\n");
1157 return -ESHUTDOWN;
1158 }
1159
1160
1161
1162
1163 if (unlikely(EPXFERTYPE_is_ISO(ep)
1164 && req->req.length > ep->fifo_size))
1165 return -EMSGSIZE;
1166
1167 spin_lock_irqsave(&ep->lock, flags);
1168 recursion_detected = ep->in_handle_ep;
1169
1170 is_first_req = list_empty(&ep->queue);
1171 ep_dbg(ep, "queue req %p(first=%s), len %d buf %p\n",
1172 _req, is_first_req ? "yes" : "no",
1173 _req->length, _req->buf);
1174
1175 if (!ep->enabled) {
1176 _req->status = -ESHUTDOWN;
1177 rc = -ESHUTDOWN;
1178 goto out_locked;
1179 }
1180
1181 if (req->in_use) {
1182 ep_err(ep, "refusing to queue req %p (already queued)\n", req);
1183 goto out_locked;
1184 }
1185
1186 length = _req->length;
1187 _req->status = -EINPROGRESS;
1188 _req->actual = 0;
1189
1190 ep_add_request(ep, req);
1191 spin_unlock_irqrestore(&ep->lock, flags);
1192
1193 if (is_ep0(ep)) {
1194 switch (dev->ep0state) {
1195 case WAIT_ACK_SET_CONF_INTERF:
1196 if (length == 0) {
1197 ep_end_in_req(ep, req, NULL);
1198 } else {
1199 ep_err(ep, "got a request of %d bytes while"
1200 "in state WAIT_ACK_SET_CONF_INTERF\n",
1201 length);
1202 ep_del_request(ep, req);
1203 rc = -EL2HLT;
1204 }
1205 ep0_idle(ep->dev);
1206 break;
1207 case IN_DATA_STAGE:
1208 if (!ep_is_full(ep))
1209 if (write_ep0_fifo(ep, req))
1210 ep0_end_in_req(ep, req, NULL);
1211 break;
1212 case OUT_DATA_STAGE:
1213 if ((length == 0) || !epout_has_pkt(ep))
1214 if (read_ep0_fifo(ep, req))
1215 ep0_end_out_req(ep, req, NULL);
1216 break;
1217 default:
1218 ep_err(ep, "odd state %s to send me a request\n",
1219 EP0_STNAME(ep->dev));
1220 ep_del_request(ep, req);
1221 rc = -EL2HLT;
1222 break;
1223 }
1224 } else {
1225 if (!recursion_detected)
1226 handle_ep(ep);
1227 }
1228
1229out:
1230 return rc;
1231out_locked:
1232 spin_unlock_irqrestore(&ep->lock, flags);
1233 goto out;
1234}
1235
1236
1237
1238
1239
1240
1241
1242
1243static int pxa_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1244{
1245 struct pxa_ep *ep;
1246 struct udc_usb_ep *udc_usb_ep;
1247 struct pxa27x_request *req;
1248 unsigned long flags;
1249 int rc = -EINVAL;
1250
1251 if (!_ep)
1252 return rc;
1253 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1254 ep = udc_usb_ep->pxa_ep;
1255 if (!ep || is_ep0(ep))
1256 return rc;
1257
1258 spin_lock_irqsave(&ep->lock, flags);
1259
1260
1261 list_for_each_entry(req, &ep->queue, queue) {
1262 if (&req->req == _req) {
1263 rc = 0;
1264 break;
1265 }
1266 }
1267
1268 spin_unlock_irqrestore(&ep->lock, flags);
1269 if (!rc)
1270 req_done(ep, req, -ECONNRESET, NULL);
1271 return rc;
1272}
1273
1274
1275
1276
1277
1278
1279
1280
1281static int pxa_ep_set_halt(struct usb_ep *_ep, int value)
1282{
1283 struct pxa_ep *ep;
1284 struct udc_usb_ep *udc_usb_ep;
1285 unsigned long flags;
1286 int rc;
1287
1288
1289 if (!_ep)
1290 return -EINVAL;
1291 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1292 ep = udc_usb_ep->pxa_ep;
1293 if (!ep || is_ep0(ep))
1294 return -EINVAL;
1295
1296 if (value == 0) {
1297
1298
1299
1300
1301
1302
1303 ep_dbg(ep, "only host can clear halt\n");
1304 return -EROFS;
1305 }
1306
1307 spin_lock_irqsave(&ep->lock, flags);
1308
1309 rc = -EAGAIN;
1310 if (ep->dir_in && (ep_is_full(ep) || !list_empty(&ep->queue)))
1311 goto out;
1312
1313
1314 rc = 0;
1315 ep_write_UDCCSR(ep, UDCCSR_FST | UDCCSR_FEF);
1316 if (is_ep0(ep))
1317 set_ep0state(ep->dev, STALL);
1318
1319out:
1320 spin_unlock_irqrestore(&ep->lock, flags);
1321 return rc;
1322}
1323
1324
1325
1326
1327
1328
1329
1330static int pxa_ep_fifo_status(struct usb_ep *_ep)
1331{
1332 struct pxa_ep *ep;
1333 struct udc_usb_ep *udc_usb_ep;
1334
1335 if (!_ep)
1336 return -ENODEV;
1337 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1338 ep = udc_usb_ep->pxa_ep;
1339 if (!ep || is_ep0(ep))
1340 return -ENODEV;
1341
1342 if (ep->dir_in)
1343 return -EOPNOTSUPP;
1344 if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN || ep_is_empty(ep))
1345 return 0;
1346 else
1347 return ep_count_bytes_remain(ep) + 1;
1348}
1349
1350
1351
1352
1353
1354
1355
1356static void pxa_ep_fifo_flush(struct usb_ep *_ep)
1357{
1358 struct pxa_ep *ep;
1359 struct udc_usb_ep *udc_usb_ep;
1360 unsigned long flags;
1361
1362 if (!_ep)
1363 return;
1364 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1365 ep = udc_usb_ep->pxa_ep;
1366 if (!ep || is_ep0(ep))
1367 return;
1368
1369 spin_lock_irqsave(&ep->lock, flags);
1370
1371 if (unlikely(!list_empty(&ep->queue)))
1372 ep_dbg(ep, "called while queue list not empty\n");
1373 ep_dbg(ep, "called\n");
1374
1375
1376 if (!ep->dir_in) {
1377 while (!ep_is_empty(ep))
1378 udc_ep_readl(ep, UDCDR);
1379 } else {
1380
1381 ep_write_UDCCSR(ep,
1382 UDCCSR_PC | UDCCSR_FEF | UDCCSR_TRN
1383 | (EPXFERTYPE_is_ISO(ep) ? 0 : UDCCSR_SST));
1384 }
1385
1386 spin_unlock_irqrestore(&ep->lock, flags);
1387}
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399static int pxa_ep_enable(struct usb_ep *_ep,
1400 const struct usb_endpoint_descriptor *desc)
1401{
1402 struct pxa_ep *ep;
1403 struct udc_usb_ep *udc_usb_ep;
1404 struct pxa_udc *udc;
1405
1406 if (!_ep || !desc)
1407 return -EINVAL;
1408
1409 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1410 if (udc_usb_ep->pxa_ep) {
1411 ep = udc_usb_ep->pxa_ep;
1412 ep_warn(ep, "usb_ep %s already enabled, doing nothing\n",
1413 _ep->name);
1414 } else {
1415 ep = find_pxa_ep(udc_usb_ep->dev, udc_usb_ep);
1416 }
1417
1418 if (!ep || is_ep0(ep)) {
1419 dev_err(udc_usb_ep->dev->dev,
1420 "unable to match pxa_ep for ep %s\n",
1421 _ep->name);
1422 return -EINVAL;
1423 }
1424
1425 if ((desc->bDescriptorType != USB_DT_ENDPOINT)
1426 || (ep->type != usb_endpoint_type(desc))) {
1427 ep_err(ep, "type mismatch\n");
1428 return -EINVAL;
1429 }
1430
1431 if (ep->fifo_size < usb_endpoint_maxp(desc)) {
1432 ep_err(ep, "bad maxpacket\n");
1433 return -ERANGE;
1434 }
1435
1436 udc_usb_ep->pxa_ep = ep;
1437 udc = ep->dev;
1438
1439 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
1440 ep_err(ep, "bogus device state\n");
1441 return -ESHUTDOWN;
1442 }
1443
1444 ep->enabled = 1;
1445
1446
1447 pxa_ep_fifo_flush(_ep);
1448
1449 ep_dbg(ep, "enabled\n");
1450 return 0;
1451}
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461static int pxa_ep_disable(struct usb_ep *_ep)
1462{
1463 struct pxa_ep *ep;
1464 struct udc_usb_ep *udc_usb_ep;
1465
1466 if (!_ep)
1467 return -EINVAL;
1468
1469 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1470 ep = udc_usb_ep->pxa_ep;
1471 if (!ep || is_ep0(ep) || !list_empty(&ep->queue))
1472 return -EINVAL;
1473
1474 ep->enabled = 0;
1475 nuke(ep, -ESHUTDOWN);
1476
1477 pxa_ep_fifo_flush(_ep);
1478 udc_usb_ep->pxa_ep = NULL;
1479
1480 ep_dbg(ep, "disabled\n");
1481 return 0;
1482}
1483
1484static struct usb_ep_ops pxa_ep_ops = {
1485 .enable = pxa_ep_enable,
1486 .disable = pxa_ep_disable,
1487
1488 .alloc_request = pxa_ep_alloc_request,
1489 .free_request = pxa_ep_free_request,
1490
1491 .queue = pxa_ep_queue,
1492 .dequeue = pxa_ep_dequeue,
1493
1494 .set_halt = pxa_ep_set_halt,
1495 .fifo_status = pxa_ep_fifo_status,
1496 .fifo_flush = pxa_ep_fifo_flush,
1497};
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508static void dplus_pullup(struct pxa_udc *udc, int on)
1509{
1510 if (on) {
1511 if (gpio_is_valid(udc->mach->gpio_pullup))
1512 gpio_set_value(udc->mach->gpio_pullup,
1513 !udc->mach->gpio_pullup_inverted);
1514 if (udc->mach->udc_command)
1515 udc->mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
1516 } else {
1517 if (gpio_is_valid(udc->mach->gpio_pullup))
1518 gpio_set_value(udc->mach->gpio_pullup,
1519 udc->mach->gpio_pullup_inverted);
1520 if (udc->mach->udc_command)
1521 udc->mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
1522 }
1523 udc->pullup_on = on;
1524}
1525
1526
1527
1528
1529
1530static int pxa_udc_get_frame(struct usb_gadget *_gadget)
1531{
1532 struct pxa_udc *udc = to_gadget_udc(_gadget);
1533
1534 return (udc_readl(udc, UDCFNR) & 0x7ff);
1535}
1536
1537
1538
1539
1540
1541
1542
1543static int pxa_udc_wakeup(struct usb_gadget *_gadget)
1544{
1545 struct pxa_udc *udc = to_gadget_udc(_gadget);
1546
1547
1548 if ((udc_readl(udc, UDCCR) & UDCCR_DWRE) == 0)
1549 return -EHOSTUNREACH;
1550 udc_set_mask_UDCCR(udc, UDCCR_UDR);
1551 return 0;
1552}
1553
1554static void udc_enable(struct pxa_udc *udc);
1555static void udc_disable(struct pxa_udc *udc);
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570static int should_enable_udc(struct pxa_udc *udc)
1571{
1572 int put_on;
1573
1574 put_on = ((udc->pullup_on) && (udc->driver));
1575 put_on &= ((udc->vbus_sensed) || (IS_ERR_OR_NULL(udc->transceiver)));
1576 return put_on;
1577}
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591static int should_disable_udc(struct pxa_udc *udc)
1592{
1593 int put_off;
1594
1595 put_off = ((!udc->pullup_on) || (!udc->driver));
1596 put_off |= ((!udc->vbus_sensed) && (!IS_ERR_OR_NULL(udc->transceiver)));
1597 return put_off;
1598}
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608static int pxa_udc_pullup(struct usb_gadget *_gadget, int is_active)
1609{
1610 struct pxa_udc *udc = to_gadget_udc(_gadget);
1611
1612 if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
1613 return -EOPNOTSUPP;
1614
1615 dplus_pullup(udc, is_active);
1616
1617 if (should_enable_udc(udc))
1618 udc_enable(udc);
1619 if (should_disable_udc(udc))
1620 udc_disable(udc);
1621 return 0;
1622}
1623
1624static void udc_enable(struct pxa_udc *udc);
1625static void udc_disable(struct pxa_udc *udc);
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637static int pxa_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
1638{
1639 struct pxa_udc *udc = to_gadget_udc(_gadget);
1640
1641 udc->vbus_sensed = is_active;
1642 if (should_enable_udc(udc))
1643 udc_enable(udc);
1644 if (should_disable_udc(udc))
1645 udc_disable(udc);
1646
1647 return 0;
1648}
1649
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662static int pxa_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
1663{
1664 struct pxa_udc *udc;
1665
1666 udc = to_gadget_udc(_gadget);
1667 if (!IS_ERR_OR_NULL(udc->transceiver))
1668 return usb_phy_set_power(udc->transceiver, mA);
1669 return -EOPNOTSUPP;
1670}
1671
1672static int pxa27x_udc_start(struct usb_gadget *g,
1673 struct usb_gadget_driver *driver);
1674static int pxa27x_udc_stop(struct usb_gadget *g,
1675 struct usb_gadget_driver *driver);
1676
1677static const struct usb_gadget_ops pxa_udc_ops = {
1678 .get_frame = pxa_udc_get_frame,
1679 .wakeup = pxa_udc_wakeup,
1680 .pullup = pxa_udc_pullup,
1681 .vbus_session = pxa_udc_vbus_session,
1682 .vbus_draw = pxa_udc_vbus_draw,
1683 .udc_start = pxa27x_udc_start,
1684 .udc_stop = pxa27x_udc_stop,
1685};
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695static void udc_disable(struct pxa_udc *udc)
1696{
1697 if (!udc->enabled)
1698 return;
1699
1700 udc_writel(udc, UDCICR0, 0);
1701 udc_writel(udc, UDCICR1, 0);
1702
1703 udc_clear_mask_UDCCR(udc, UDCCR_UDE);
1704 clk_disable(udc->clk);
1705
1706 ep0_idle(udc);
1707 udc->gadget.speed = USB_SPEED_UNKNOWN;
1708
1709 udc->enabled = 0;
1710}
1711
1712
1713
1714
1715
1716
1717
1718
1719static void udc_init_data(struct pxa_udc *dev)
1720{
1721 int i;
1722 struct pxa_ep *ep;
1723
1724
1725 INIT_LIST_HEAD(&dev->gadget.ep_list);
1726 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
1727 dev->udc_usb_ep[0].pxa_ep = &dev->pxa_ep[0];
1728 ep0_idle(dev);
1729
1730
1731 for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
1732 ep = &dev->pxa_ep[i];
1733
1734 ep->enabled = is_ep0(ep);
1735 INIT_LIST_HEAD(&ep->queue);
1736 spin_lock_init(&ep->lock);
1737 }
1738
1739
1740 for (i = 1; i < NR_USB_ENDPOINTS; i++)
1741 list_add_tail(&dev->udc_usb_ep[i].usb_ep.ep_list,
1742 &dev->gadget.ep_list);
1743}
1744
1745
1746
1747
1748
1749
1750
1751
1752static void udc_enable(struct pxa_udc *udc)
1753{
1754 if (udc->enabled)
1755 return;
1756
1757 udc_writel(udc, UDCICR0, 0);
1758 udc_writel(udc, UDCICR1, 0);
1759 udc_clear_mask_UDCCR(udc, UDCCR_UDE);
1760
1761 clk_enable(udc->clk);
1762
1763 ep0_idle(udc);
1764 udc->gadget.speed = USB_SPEED_FULL;
1765 memset(&udc->stats, 0, sizeof(udc->stats));
1766
1767 udc_set_mask_UDCCR(udc, UDCCR_UDE);
1768 ep_write_UDCCSR(&udc->pxa_ep[0], UDCCSR0_ACM);
1769 udelay(2);
1770 if (udc_readl(udc, UDCCR) & UDCCR_EMCE)
1771 dev_err(udc->dev, "Configuration errors, udc disabled\n");
1772
1773
1774
1775
1776 msleep(100);
1777
1778
1779 udc_writel(udc, UDCICR1,
1780 UDCICR1_IECC | UDCICR1_IERU
1781 | UDCICR1_IESU | UDCICR1_IERS);
1782
1783
1784 pio_irq_enable(&udc->pxa_ep[0]);
1785
1786 udc->enabled = 1;
1787}
1788
1789
1790
1791
1792
1793
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803
1804static int pxa27x_udc_start(struct usb_gadget *g,
1805 struct usb_gadget_driver *driver)
1806{
1807 struct pxa_udc *udc = to_pxa(g);
1808 int retval;
1809
1810
1811 udc->driver = driver;
1812 dplus_pullup(udc, 1);
1813
1814 if (!IS_ERR_OR_NULL(udc->transceiver)) {
1815 retval = otg_set_peripheral(udc->transceiver->otg,
1816 &udc->gadget);
1817 if (retval) {
1818 dev_err(udc->dev, "can't bind to transceiver\n");
1819 goto fail;
1820 }
1821 }
1822
1823 if (should_enable_udc(udc))
1824 udc_enable(udc);
1825 return 0;
1826
1827fail:
1828 udc->driver = NULL;
1829 return retval;
1830}
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840static void stop_activity(struct pxa_udc *udc, struct usb_gadget_driver *driver)
1841{
1842 int i;
1843
1844
1845 if (udc->gadget.speed == USB_SPEED_UNKNOWN)
1846 driver = NULL;
1847 udc->gadget.speed = USB_SPEED_UNKNOWN;
1848
1849 for (i = 0; i < NR_USB_ENDPOINTS; i++)
1850 pxa_ep_disable(&udc->udc_usb_ep[i].usb_ep);
1851}
1852
1853
1854
1855
1856
1857
1858
1859static int pxa27x_udc_stop(struct usb_gadget *g,
1860 struct usb_gadget_driver *driver)
1861{
1862 struct pxa_udc *udc = to_pxa(g);
1863
1864 stop_activity(udc, driver);
1865 udc_disable(udc);
1866 dplus_pullup(udc, 0);
1867
1868 udc->driver = NULL;
1869
1870 if (!IS_ERR_OR_NULL(udc->transceiver))
1871 return otg_set_peripheral(udc->transceiver->otg, NULL);
1872 return 0;
1873}
1874
1875
1876
1877
1878
1879
1880static void handle_ep0_ctrl_req(struct pxa_udc *udc,
1881 struct pxa27x_request *req)
1882{
1883 struct pxa_ep *ep = &udc->pxa_ep[0];
1884 union {
1885 struct usb_ctrlrequest r;
1886 u32 word[2];
1887 } u;
1888 int i;
1889 int have_extrabytes = 0;
1890 unsigned long flags;
1891
1892 nuke(ep, -EPROTO);
1893 spin_lock_irqsave(&ep->lock, flags);
1894
1895
1896
1897
1898
1899
1900
1901 if (epout_has_pkt(ep) && (ep_count_bytes_remain(ep) == 0))
1902 ep_write_UDCCSR(ep, UDCCSR0_OPC);
1903
1904
1905 for (i = 0; i < 2; i++) {
1906 if (unlikely(ep_is_empty(ep)))
1907 goto stall;
1908 u.word[i] = udc_ep_readl(ep, UDCDR);
1909 }
1910
1911 have_extrabytes = !ep_is_empty(ep);
1912 while (!ep_is_empty(ep)) {
1913 i = udc_ep_readl(ep, UDCDR);
1914 ep_err(ep, "wrong to have extra bytes for setup : 0x%08x\n", i);
1915 }
1916
1917 ep_dbg(ep, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1918 u.r.bRequestType, u.r.bRequest,
1919 le16_to_cpu(u.r.wValue), le16_to_cpu(u.r.wIndex),
1920 le16_to_cpu(u.r.wLength));
1921 if (unlikely(have_extrabytes))
1922 goto stall;
1923
1924 if (u.r.bRequestType & USB_DIR_IN)
1925 set_ep0state(udc, IN_DATA_STAGE);
1926 else
1927 set_ep0state(udc, OUT_DATA_STAGE);
1928
1929
1930 ep_write_UDCCSR(ep, UDCCSR0_SA | UDCCSR0_OPC);
1931
1932 spin_unlock_irqrestore(&ep->lock, flags);
1933 i = udc->driver->setup(&udc->gadget, &u.r);
1934 spin_lock_irqsave(&ep->lock, flags);
1935 if (i < 0)
1936 goto stall;
1937out:
1938 spin_unlock_irqrestore(&ep->lock, flags);
1939 return;
1940stall:
1941 ep_dbg(ep, "protocol STALL, udccsr0=%03x err %d\n",
1942 udc_ep_readl(ep, UDCCSR), i);
1943 ep_write_UDCCSR(ep, UDCCSR0_FST | UDCCSR0_FTF);
1944 set_ep0state(udc, STALL);
1945 goto out;
1946}
1947
1948
1949
1950
1951
1952
1953
1954
1955
1956
1957
1958
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973
1974
1975
1976
1977
1978
1979
1980
1981
1982
1983
1984
1985
1986
1987
1988
1989
1990
1991
1992
1993
1994
1995
1996static void handle_ep0(struct pxa_udc *udc, int fifo_irq, int opc_irq)
1997{
1998 u32 udccsr0;
1999 struct pxa_ep *ep = &udc->pxa_ep[0];
2000 struct pxa27x_request *req = NULL;
2001 int completed = 0;
2002
2003 if (!list_empty(&ep->queue))
2004 req = list_entry(ep->queue.next, struct pxa27x_request, queue);
2005
2006 udccsr0 = udc_ep_readl(ep, UDCCSR);
2007 ep_dbg(ep, "state=%s, req=%p, udccsr0=0x%03x, udcbcr=%d, irq_msk=%x\n",
2008 EP0_STNAME(udc), req, udccsr0, udc_ep_readl(ep, UDCBCR),
2009 (fifo_irq << 1 | opc_irq));
2010
2011 if (udccsr0 & UDCCSR0_SST) {
2012 ep_dbg(ep, "clearing stall status\n");
2013 nuke(ep, -EPIPE);
2014 ep_write_UDCCSR(ep, UDCCSR0_SST);
2015 ep0_idle(udc);
2016 }
2017
2018 if (udccsr0 & UDCCSR0_SA) {
2019 nuke(ep, 0);
2020 set_ep0state(udc, SETUP_STAGE);
2021 }
2022
2023 switch (udc->ep0state) {
2024 case WAIT_FOR_SETUP:
2025
2026
2027
2028
2029
2030
2031 break;
2032 case SETUP_STAGE:
2033 udccsr0 &= UDCCSR0_CTRL_REQ_MASK;
2034 if (likely(udccsr0 == UDCCSR0_CTRL_REQ_MASK))
2035 handle_ep0_ctrl_req(udc, req);
2036 break;
2037 case IN_DATA_STAGE:
2038 if (epout_has_pkt(ep))
2039 ep_write_UDCCSR(ep, UDCCSR0_OPC);
2040 if (req && !ep_is_full(ep))
2041 completed = write_ep0_fifo(ep, req);
2042 if (completed)
2043 ep0_end_in_req(ep, req, NULL);
2044 break;
2045 case OUT_DATA_STAGE:
2046 if (epout_has_pkt(ep) && req)
2047 completed = read_ep0_fifo(ep, req);
2048 if (completed)
2049 ep0_end_out_req(ep, req, NULL);
2050 break;
2051 case STALL:
2052 ep_write_UDCCSR(ep, UDCCSR0_FST);
2053 break;
2054 case IN_STATUS_STAGE:
2055
2056
2057
2058
2059
2060 if (opc_irq)
2061 ep0_idle(udc);
2062 break;
2063 case OUT_STATUS_STAGE:
2064 case WAIT_ACK_SET_CONF_INTERF:
2065 ep_warn(ep, "should never get in %s state here!!!\n",
2066 EP0_STNAME(ep->dev));
2067 ep0_idle(udc);
2068 break;
2069 }
2070}
2071
2072
2073
2074
2075
2076
2077
2078
2079
2080
2081static void handle_ep(struct pxa_ep *ep)
2082{
2083 struct pxa27x_request *req;
2084 int completed;
2085 u32 udccsr;
2086 int is_in = ep->dir_in;
2087 int loop = 0;
2088 unsigned long flags;
2089
2090 spin_lock_irqsave(&ep->lock, flags);
2091 if (ep->in_handle_ep)
2092 goto recursion_detected;
2093 ep->in_handle_ep = 1;
2094
2095 do {
2096 completed = 0;
2097 udccsr = udc_ep_readl(ep, UDCCSR);
2098
2099 if (likely(!list_empty(&ep->queue)))
2100 req = list_entry(ep->queue.next,
2101 struct pxa27x_request, queue);
2102 else
2103 req = NULL;
2104
2105 ep_dbg(ep, "req:%p, udccsr 0x%03x loop=%d\n",
2106 req, udccsr, loop++);
2107
2108 if (unlikely(udccsr & (UDCCSR_SST | UDCCSR_TRN)))
2109 udc_ep_writel(ep, UDCCSR,
2110 udccsr & (UDCCSR_SST | UDCCSR_TRN));
2111 if (!req)
2112 break;
2113
2114 if (unlikely(is_in)) {
2115 if (likely(!ep_is_full(ep)))
2116 completed = write_fifo(ep, req);
2117 } else {
2118 if (likely(epout_has_pkt(ep)))
2119 completed = read_fifo(ep, req);
2120 }
2121
2122 if (completed) {
2123 if (is_in)
2124 ep_end_in_req(ep, req, &flags);
2125 else
2126 ep_end_out_req(ep, req, &flags);
2127 }
2128 } while (completed);
2129
2130 ep->in_handle_ep = 0;
2131recursion_detected:
2132 spin_unlock_irqrestore(&ep->lock, flags);
2133}
2134
2135
2136
2137
2138
2139
2140
2141
2142
2143static void pxa27x_change_configuration(struct pxa_udc *udc, int config)
2144{
2145 struct usb_ctrlrequest req ;
2146
2147 dev_dbg(udc->dev, "config=%d\n", config);
2148
2149 udc->config = config;
2150 udc->last_interface = 0;
2151 udc->last_alternate = 0;
2152
2153 req.bRequestType = 0;
2154 req.bRequest = USB_REQ_SET_CONFIGURATION;
2155 req.wValue = config;
2156 req.wIndex = 0;
2157 req.wLength = 0;
2158
2159 set_ep0state(udc, WAIT_ACK_SET_CONF_INTERF);
2160 udc->driver->setup(&udc->gadget, &req);
2161 ep_write_UDCCSR(&udc->pxa_ep[0], UDCCSR0_AREN);
2162}
2163
2164
2165
2166
2167
2168
2169
2170
2171
2172
2173static void pxa27x_change_interface(struct pxa_udc *udc, int iface, int alt)
2174{
2175 struct usb_ctrlrequest req;
2176
2177 dev_dbg(udc->dev, "interface=%d, alternate setting=%d\n", iface, alt);
2178
2179 udc->last_interface = iface;
2180 udc->last_alternate = alt;
2181
2182 req.bRequestType = USB_RECIP_INTERFACE;
2183 req.bRequest = USB_REQ_SET_INTERFACE;
2184 req.wValue = alt;
2185 req.wIndex = iface;
2186 req.wLength = 0;
2187
2188 set_ep0state(udc, WAIT_ACK_SET_CONF_INTERF);
2189 udc->driver->setup(&udc->gadget, &req);
2190 ep_write_UDCCSR(&udc->pxa_ep[0], UDCCSR0_AREN);
2191}
2192
2193
2194
2195
2196
2197
2198
2199
2200static void irq_handle_data(int irq, struct pxa_udc *udc)
2201{
2202 int i;
2203 struct pxa_ep *ep;
2204 u32 udcisr0 = udc_readl(udc, UDCISR0) & UDCCISR0_EP_MASK;
2205 u32 udcisr1 = udc_readl(udc, UDCISR1) & UDCCISR1_EP_MASK;
2206
2207 if (udcisr0 & UDCISR_INT_MASK) {
2208 udc->pxa_ep[0].stats.irqs++;
2209 udc_writel(udc, UDCISR0, UDCISR_INT(0, UDCISR_INT_MASK));
2210 handle_ep0(udc, !!(udcisr0 & UDCICR_FIFOERR),
2211 !!(udcisr0 & UDCICR_PKTCOMPL));
2212 }
2213
2214 udcisr0 >>= 2;
2215 for (i = 1; udcisr0 != 0 && i < 16; udcisr0 >>= 2, i++) {
2216 if (!(udcisr0 & UDCISR_INT_MASK))
2217 continue;
2218
2219 udc_writel(udc, UDCISR0, UDCISR_INT(i, UDCISR_INT_MASK));
2220
2221 WARN_ON(i >= ARRAY_SIZE(udc->pxa_ep));
2222 if (i < ARRAY_SIZE(udc->pxa_ep)) {
2223 ep = &udc->pxa_ep[i];
2224 ep->stats.irqs++;
2225 handle_ep(ep);
2226 }
2227 }
2228
2229 for (i = 16; udcisr1 != 0 && i < 24; udcisr1 >>= 2, i++) {
2230 udc_writel(udc, UDCISR1, UDCISR_INT(i - 16, UDCISR_INT_MASK));
2231 if (!(udcisr1 & UDCISR_INT_MASK))
2232 continue;
2233
2234 WARN_ON(i >= ARRAY_SIZE(udc->pxa_ep));
2235 if (i < ARRAY_SIZE(udc->pxa_ep)) {
2236 ep = &udc->pxa_ep[i];
2237 ep->stats.irqs++;
2238 handle_ep(ep);
2239 }
2240 }
2241
2242}
2243
2244
2245
2246
2247
2248static void irq_udc_suspend(struct pxa_udc *udc)
2249{
2250 udc_writel(udc, UDCISR1, UDCISR1_IRSU);
2251 udc->stats.irqs_suspend++;
2252
2253 if (udc->gadget.speed != USB_SPEED_UNKNOWN
2254 && udc->driver && udc->driver->suspend)
2255 udc->driver->suspend(&udc->gadget);
2256 ep0_idle(udc);
2257}
2258
2259
2260
2261
2262
2263static void irq_udc_resume(struct pxa_udc *udc)
2264{
2265 udc_writel(udc, UDCISR1, UDCISR1_IRRU);
2266 udc->stats.irqs_resume++;
2267
2268 if (udc->gadget.speed != USB_SPEED_UNKNOWN
2269 && udc->driver && udc->driver->resume)
2270 udc->driver->resume(&udc->gadget);
2271}
2272
2273
2274
2275
2276
2277static void irq_udc_reconfig(struct pxa_udc *udc)
2278{
2279 unsigned config, interface, alternate, config_change;
2280 u32 udccr = udc_readl(udc, UDCCR);
2281
2282 udc_writel(udc, UDCISR1, UDCISR1_IRCC);
2283 udc->stats.irqs_reconfig++;
2284
2285 config = (udccr & UDCCR_ACN) >> UDCCR_ACN_S;
2286 config_change = (config != udc->config);
2287 pxa27x_change_configuration(udc, config);
2288
2289 interface = (udccr & UDCCR_AIN) >> UDCCR_AIN_S;
2290 alternate = (udccr & UDCCR_AAISN) >> UDCCR_AAISN_S;
2291 pxa27x_change_interface(udc, interface, alternate);
2292
2293 if (config_change)
2294 update_pxa_ep_matches(udc);
2295 udc_set_mask_UDCCR(udc, UDCCR_SMAC);
2296}
2297
2298
2299
2300
2301
2302static void irq_udc_reset(struct pxa_udc *udc)
2303{
2304 u32 udccr = udc_readl(udc, UDCCR);
2305 struct pxa_ep *ep = &udc->pxa_ep[0];
2306
2307 dev_info(udc->dev, "USB reset\n");
2308 udc_writel(udc, UDCISR1, UDCISR1_IRRS);
2309 udc->stats.irqs_reset++;
2310
2311 if ((udccr & UDCCR_UDA) == 0) {
2312 dev_dbg(udc->dev, "USB reset start\n");
2313 stop_activity(udc, udc->driver);
2314 }
2315 udc->gadget.speed = USB_SPEED_FULL;
2316 memset(&udc->stats, 0, sizeof udc->stats);
2317
2318 nuke(ep, -EPROTO);
2319 ep_write_UDCCSR(ep, UDCCSR0_FTF | UDCCSR0_OPC);
2320 ep0_idle(udc);
2321}
2322
2323
2324
2325
2326
2327
2328
2329
2330static irqreturn_t pxa_udc_irq(int irq, void *_dev)
2331{
2332 struct pxa_udc *udc = _dev;
2333 u32 udcisr0 = udc_readl(udc, UDCISR0);
2334 u32 udcisr1 = udc_readl(udc, UDCISR1);
2335 u32 udccr = udc_readl(udc, UDCCR);
2336 u32 udcisr1_spec;
2337
2338 dev_vdbg(udc->dev, "Interrupt, UDCISR0:0x%08x, UDCISR1:0x%08x, "
2339 "UDCCR:0x%08x\n", udcisr0, udcisr1, udccr);
2340
2341 udcisr1_spec = udcisr1 & 0xf8000000;
2342 if (unlikely(udcisr1_spec & UDCISR1_IRSU))
2343 irq_udc_suspend(udc);
2344 if (unlikely(udcisr1_spec & UDCISR1_IRRU))
2345 irq_udc_resume(udc);
2346 if (unlikely(udcisr1_spec & UDCISR1_IRCC))
2347 irq_udc_reconfig(udc);
2348 if (unlikely(udcisr1_spec & UDCISR1_IRRS))
2349 irq_udc_reset(udc);
2350
2351 if ((udcisr0 & UDCCISR0_EP_MASK) | (udcisr1 & UDCCISR1_EP_MASK))
2352 irq_handle_data(irq, udc);
2353
2354 return IRQ_HANDLED;
2355}
2356
2357static struct pxa_udc memory = {
2358 .gadget = {
2359 .ops = &pxa_udc_ops,
2360 .ep0 = &memory.udc_usb_ep[0].usb_ep,
2361 .name = driver_name,
2362 .dev = {
2363 .init_name = "gadget",
2364 },
2365 },
2366
2367 .udc_usb_ep = {
2368 USB_EP_CTRL,
2369 USB_EP_OUT_BULK(1),
2370 USB_EP_IN_BULK(2),
2371 USB_EP_IN_ISO(3),
2372 USB_EP_OUT_ISO(4),
2373 USB_EP_IN_INT(5),
2374 },
2375
2376 .pxa_ep = {
2377 PXA_EP_CTRL,
2378
2379 PXA_EP_OUT_BULK(1, 1, 3, 0, 0),
2380 PXA_EP_IN_BULK(2, 2, 3, 0, 0),
2381
2382 PXA_EP_OUT_BULK(3, 1, 1, 0, 0),
2383 PXA_EP_IN_BULK(4, 2, 1, 0, 0),
2384 PXA_EP_IN_ISO(5, 3, 1, 0, 0),
2385 PXA_EP_OUT_ISO(6, 4, 1, 0, 0),
2386 PXA_EP_IN_INT(7, 5, 1, 0, 0),
2387
2388 PXA_EP_OUT_BULK(8, 1, 2, 0, 0),
2389 PXA_EP_IN_BULK(9, 2, 2, 0, 0),
2390 PXA_EP_IN_INT(10, 5, 2, 0, 0),
2391
2392
2393
2394
2395
2396 PXA_EP_OUT_BULK(11, 1, 2, 1, 0),
2397 PXA_EP_IN_BULK(12, 2, 2, 1, 0),
2398
2399 PXA_EP_OUT_BULK(13, 1, 1, 1, 1),
2400 PXA_EP_IN_BULK(14, 2, 1, 1, 1),
2401 }
2402};
2403
2404
2405
2406
2407
2408
2409
2410
2411static int pxa_udc_probe(struct platform_device *pdev)
2412{
2413 struct resource *regs;
2414 struct pxa_udc *udc = &memory;
2415 int retval = 0, gpio;
2416
2417 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2418 if (!regs)
2419 return -ENXIO;
2420 udc->irq = platform_get_irq(pdev, 0);
2421 if (udc->irq < 0)
2422 return udc->irq;
2423
2424 udc->dev = &pdev->dev;
2425 udc->mach = dev_get_platdata(&pdev->dev);
2426 udc->transceiver = usb_get_phy(USB_PHY_TYPE_USB2);
2427
2428 gpio = udc->mach->gpio_pullup;
2429 if (gpio_is_valid(gpio)) {
2430 retval = gpio_request(gpio, "USB D+ pullup");
2431 if (retval == 0)
2432 gpio_direction_output(gpio,
2433 udc->mach->gpio_pullup_inverted);
2434 }
2435 if (retval) {
2436 dev_err(&pdev->dev, "Couldn't request gpio %d : %d\n",
2437 gpio, retval);
2438 return retval;
2439 }
2440
2441 udc->clk = clk_get(&pdev->dev, NULL);
2442 if (IS_ERR(udc->clk)) {
2443 retval = PTR_ERR(udc->clk);
2444 goto err_clk;
2445 }
2446
2447 retval = -ENOMEM;
2448 udc->regs = ioremap(regs->start, resource_size(regs));
2449 if (!udc->regs) {
2450 dev_err(&pdev->dev, "Unable to map UDC I/O memory\n");
2451 goto err_map;
2452 }
2453
2454 udc->vbus_sensed = 0;
2455
2456 the_controller = udc;
2457 platform_set_drvdata(pdev, udc);
2458 udc_init_data(udc);
2459 pxa_eps_setup(udc);
2460
2461
2462 retval = request_irq(udc->irq, pxa_udc_irq,
2463 IRQF_SHARED, driver_name, udc);
2464 if (retval != 0) {
2465 dev_err(udc->dev, "%s: can't get irq %i, err %d\n",
2466 driver_name, udc->irq, retval);
2467 goto err_irq;
2468 }
2469
2470 retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
2471 if (retval)
2472 goto err_add_udc;
2473
2474 pxa_init_debugfs(udc);
2475
2476 return 0;
2477
2478err_add_udc:
2479 free_irq(udc->irq, udc);
2480err_irq:
2481 iounmap(udc->regs);
2482err_map:
2483 clk_put(udc->clk);
2484 udc->clk = NULL;
2485err_clk:
2486 return retval;
2487}
2488
2489
2490
2491
2492
2493static int pxa_udc_remove(struct platform_device *_dev)
2494{
2495 struct pxa_udc *udc = platform_get_drvdata(_dev);
2496 int gpio = udc->mach->gpio_pullup;
2497
2498 usb_del_gadget_udc(&udc->gadget);
2499 usb_gadget_unregister_driver(udc->driver);
2500 free_irq(udc->irq, udc);
2501 pxa_cleanup_debugfs(udc);
2502 if (gpio_is_valid(gpio))
2503 gpio_free(gpio);
2504
2505 usb_put_phy(udc->transceiver);
2506
2507 udc->transceiver = NULL;
2508 the_controller = NULL;
2509 clk_put(udc->clk);
2510 iounmap(udc->regs);
2511
2512 return 0;
2513}
2514
2515static void pxa_udc_shutdown(struct platform_device *_dev)
2516{
2517 struct pxa_udc *udc = platform_get_drvdata(_dev);
2518
2519 if (udc_readl(udc, UDCCR) & UDCCR_UDE)
2520 udc_disable(udc);
2521}
2522
2523#ifdef CONFIG_PXA27x
2524extern void pxa27x_clear_otgph(void);
2525#else
2526#define pxa27x_clear_otgph() do {} while (0)
2527#endif
2528
2529#ifdef CONFIG_PM
2530
2531
2532
2533
2534
2535
2536
2537
2538static int pxa_udc_suspend(struct platform_device *_dev, pm_message_t state)
2539{
2540 int i;
2541 struct pxa_udc *udc = platform_get_drvdata(_dev);
2542 struct pxa_ep *ep;
2543
2544 ep = &udc->pxa_ep[0];
2545 udc->udccsr0 = udc_ep_readl(ep, UDCCSR);
2546 for (i = 1; i < NR_PXA_ENDPOINTS; i++) {
2547 ep = &udc->pxa_ep[i];
2548 ep->udccsr_value = udc_ep_readl(ep, UDCCSR);
2549 ep->udccr_value = udc_ep_readl(ep, UDCCR);
2550 ep_dbg(ep, "udccsr:0x%03x, udccr:0x%x\n",
2551 ep->udccsr_value, ep->udccr_value);
2552 }
2553
2554 udc_disable(udc);
2555 udc->pullup_resume = udc->pullup_on;
2556 dplus_pullup(udc, 0);
2557
2558 return 0;
2559}
2560
2561
2562
2563
2564
2565
2566
2567
2568static int pxa_udc_resume(struct platform_device *_dev)
2569{
2570 int i;
2571 struct pxa_udc *udc = platform_get_drvdata(_dev);
2572 struct pxa_ep *ep;
2573
2574 ep = &udc->pxa_ep[0];
2575 udc_ep_writel(ep, UDCCSR, udc->udccsr0 & (UDCCSR0_FST | UDCCSR0_DME));
2576 for (i = 1; i < NR_PXA_ENDPOINTS; i++) {
2577 ep = &udc->pxa_ep[i];
2578 udc_ep_writel(ep, UDCCSR, ep->udccsr_value);
2579 udc_ep_writel(ep, UDCCR, ep->udccr_value);
2580 ep_dbg(ep, "udccsr:0x%03x, udccr:0x%x\n",
2581 ep->udccsr_value, ep->udccr_value);
2582 }
2583
2584 dplus_pullup(udc, udc->pullup_resume);
2585 if (should_enable_udc(udc))
2586 udc_enable(udc);
2587
2588
2589
2590
2591
2592
2593
2594
2595
2596 pxa27x_clear_otgph();
2597
2598 return 0;
2599}
2600#endif
2601
2602
2603MODULE_ALIAS("platform:pxa27x-udc");
2604
2605static struct platform_driver udc_driver = {
2606 .driver = {
2607 .name = "pxa27x-udc",
2608 .owner = THIS_MODULE,
2609 },
2610 .probe = pxa_udc_probe,
2611 .remove = pxa_udc_remove,
2612 .shutdown = pxa_udc_shutdown,
2613#ifdef CONFIG_PM
2614 .suspend = pxa_udc_suspend,
2615 .resume = pxa_udc_resume
2616#endif
2617};
2618
2619module_platform_driver(udc_driver);
2620
2621MODULE_DESCRIPTION(DRIVER_DESC);
2622MODULE_AUTHOR("Robert Jarzmik");
2623MODULE_LICENSE("GPL");
2624