1#ifndef _LINUX_DMA_MAPPING_H
2#define _LINUX_DMA_MAPPING_H
3
4#include <linux/string.h>
5#include <linux/device.h>
6#include <linux/err.h>
7#include <linux/dma-attrs.h>
8#include <linux/dma-direction.h>
9#include <linux/scatterlist.h>
10
11struct dma_map_ops {
12 void* (*alloc)(struct device *dev, size_t size,
13 dma_addr_t *dma_handle, gfp_t gfp,
14 struct dma_attrs *attrs);
15 void (*free)(struct device *dev, size_t size,
16 void *vaddr, dma_addr_t dma_handle,
17 struct dma_attrs *attrs);
18 int (*mmap)(struct device *, struct vm_area_struct *,
19 void *, dma_addr_t, size_t, struct dma_attrs *attrs);
20
21 int (*get_sgtable)(struct device *dev, struct sg_table *sgt, void *,
22 dma_addr_t, size_t, struct dma_attrs *attrs);
23
24 dma_addr_t (*map_page)(struct device *dev, struct page *page,
25 unsigned long offset, size_t size,
26 enum dma_data_direction dir,
27 struct dma_attrs *attrs);
28 void (*unmap_page)(struct device *dev, dma_addr_t dma_handle,
29 size_t size, enum dma_data_direction dir,
30 struct dma_attrs *attrs);
31 int (*map_sg)(struct device *dev, struct scatterlist *sg,
32 int nents, enum dma_data_direction dir,
33 struct dma_attrs *attrs);
34 void (*unmap_sg)(struct device *dev,
35 struct scatterlist *sg, int nents,
36 enum dma_data_direction dir,
37 struct dma_attrs *attrs);
38 void (*sync_single_for_cpu)(struct device *dev,
39 dma_addr_t dma_handle, size_t size,
40 enum dma_data_direction dir);
41 void (*sync_single_for_device)(struct device *dev,
42 dma_addr_t dma_handle, size_t size,
43 enum dma_data_direction dir);
44 void (*sync_sg_for_cpu)(struct device *dev,
45 struct scatterlist *sg, int nents,
46 enum dma_data_direction dir);
47 void (*sync_sg_for_device)(struct device *dev,
48 struct scatterlist *sg, int nents,
49 enum dma_data_direction dir);
50 int (*mapping_error)(struct device *dev, dma_addr_t dma_addr);
51 int (*dma_supported)(struct device *dev, u64 mask);
52 int (*set_dma_mask)(struct device *dev, u64 mask);
53#ifdef ARCH_HAS_DMA_GET_REQUIRED_MASK
54 u64 (*get_required_mask)(struct device *dev);
55#endif
56 int is_phys;
57};
58
59#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
60
61#define DMA_MASK_NONE 0x0ULL
62
63static inline int valid_dma_direction(int dma_direction)
64{
65 return ((dma_direction == DMA_BIDIRECTIONAL) ||
66 (dma_direction == DMA_TO_DEVICE) ||
67 (dma_direction == DMA_FROM_DEVICE));
68}
69
70static inline int is_device_dma_capable(struct device *dev)
71{
72 return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE;
73}
74
75#ifdef CONFIG_HAS_DMA
76#include <asm/dma-mapping.h>
77#else
78#include <asm-generic/dma-mapping-broken.h>
79#endif
80
81static inline u64 dma_get_mask(struct device *dev)
82{
83 if (dev && dev->dma_mask && *dev->dma_mask)
84 return *dev->dma_mask;
85 return DMA_BIT_MASK(32);
86}
87
88#ifdef CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK
89int dma_set_coherent_mask(struct device *dev, u64 mask);
90#else
91static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
92{
93 if (!dma_supported(dev, mask))
94 return -EIO;
95 dev->coherent_dma_mask = mask;
96 return 0;
97}
98#endif
99
100extern u64 dma_get_required_mask(struct device *dev);
101
102static inline unsigned int dma_get_max_seg_size(struct device *dev)
103{
104 return dev->dma_parms ? dev->dma_parms->max_segment_size : 65536;
105}
106
107static inline unsigned int dma_set_max_seg_size(struct device *dev,
108 unsigned int size)
109{
110 if (dev->dma_parms) {
111 dev->dma_parms->max_segment_size = size;
112 return 0;
113 } else
114 return -EIO;
115}
116
117static inline unsigned long dma_get_seg_boundary(struct device *dev)
118{
119 return dev->dma_parms ?
120 dev->dma_parms->segment_boundary_mask : 0xffffffff;
121}
122
123static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask)
124{
125 if (dev->dma_parms) {
126 dev->dma_parms->segment_boundary_mask = mask;
127 return 0;
128 } else
129 return -EIO;
130}
131
132static inline void *dma_zalloc_coherent(struct device *dev, size_t size,
133 dma_addr_t *dma_handle, gfp_t flag)
134{
135 void *ret = dma_alloc_coherent(dev, size, dma_handle,
136 flag | __GFP_ZERO);
137 return ret;
138}
139
140#ifdef CONFIG_HAS_DMA
141static inline int dma_get_cache_alignment(void)
142{
143#ifdef ARCH_DMA_MINALIGN
144 return ARCH_DMA_MINALIGN;
145#endif
146 return 1;
147}
148#endif
149
150
151#define DMA_MEMORY_MAP 0x01
152#define DMA_MEMORY_IO 0x02
153#define DMA_MEMORY_INCLUDES_CHILDREN 0x04
154#define DMA_MEMORY_EXCLUSIVE 0x08
155
156#ifndef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
157static inline int
158dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
159 dma_addr_t device_addr, size_t size, int flags)
160{
161 return 0;
162}
163
164static inline void
165dma_release_declared_memory(struct device *dev)
166{
167}
168
169static inline void *
170dma_mark_declared_memory_occupied(struct device *dev,
171 dma_addr_t device_addr, size_t size)
172{
173 return ERR_PTR(-EBUSY);
174}
175#endif
176
177
178
179
180extern void *dmam_alloc_coherent(struct device *dev, size_t size,
181 dma_addr_t *dma_handle, gfp_t gfp);
182extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
183 dma_addr_t dma_handle);
184extern void *dmam_alloc_noncoherent(struct device *dev, size_t size,
185 dma_addr_t *dma_handle, gfp_t gfp);
186extern void dmam_free_noncoherent(struct device *dev, size_t size, void *vaddr,
187 dma_addr_t dma_handle);
188#ifdef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
189extern int dmam_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
190 dma_addr_t device_addr, size_t size,
191 int flags);
192extern void dmam_release_declared_memory(struct device *dev);
193#else
194static inline int dmam_declare_coherent_memory(struct device *dev,
195 dma_addr_t bus_addr, dma_addr_t device_addr,
196 size_t size, gfp_t gfp)
197{
198 return 0;
199}
200
201static inline void dmam_release_declared_memory(struct device *dev)
202{
203}
204#endif
205
206#ifndef CONFIG_HAVE_DMA_ATTRS
207struct dma_attrs;
208
209#define dma_map_single_attrs(dev, cpu_addr, size, dir, attrs) \
210 dma_map_single(dev, cpu_addr, size, dir)
211
212#define dma_unmap_single_attrs(dev, dma_addr, size, dir, attrs) \
213 dma_unmap_single(dev, dma_addr, size, dir)
214
215#define dma_map_sg_attrs(dev, sgl, nents, dir, attrs) \
216 dma_map_sg(dev, sgl, nents, dir)
217
218#define dma_unmap_sg_attrs(dev, sgl, nents, dir, attrs) \
219 dma_unmap_sg(dev, sgl, nents, dir)
220
221#endif
222
223#ifdef CONFIG_NEED_DMA_MAP_STATE
224#define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME
225#define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME
226#define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
227#define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
228#define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
229#define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
230#else
231#define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)
232#define DEFINE_DMA_UNMAP_LEN(LEN_NAME)
233#define dma_unmap_addr(PTR, ADDR_NAME) (0)
234#define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
235#define dma_unmap_len(PTR, LEN_NAME) (0)
236#define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
237#endif
238
239#endif
240
