1#ifndef _LINUX_IRQ_H
2#define _LINUX_IRQ_H
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12#include <linux/smp.h>
13#include <linux/linkage.h>
14#include <linux/cache.h>
15#include <linux/spinlock.h>
16#include <linux/cpumask.h>
17#include <linux/gfp.h>
18#include <linux/irqreturn.h>
19#include <linux/irqnr.h>
20#include <linux/errno.h>
21#include <linux/topology.h>
22#include <linux/wait.h>
23
24#include <asm/irq.h>
25#include <asm/ptrace.h>
26#include <asm/irq_regs.h>
27
28struct seq_file;
29struct module;
30struct irq_desc;
31struct irq_data;
32typedef void (*irq_flow_handler_t)(unsigned int irq,
33 struct irq_desc *desc);
34typedef void (*irq_preflow_handler_t)(struct irq_data *data);
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74enum {
75 IRQ_TYPE_NONE = 0x00000000,
76 IRQ_TYPE_EDGE_RISING = 0x00000001,
77 IRQ_TYPE_EDGE_FALLING = 0x00000002,
78 IRQ_TYPE_EDGE_BOTH = (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING),
79 IRQ_TYPE_LEVEL_HIGH = 0x00000004,
80 IRQ_TYPE_LEVEL_LOW = 0x00000008,
81 IRQ_TYPE_LEVEL_MASK = (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH),
82 IRQ_TYPE_SENSE_MASK = 0x0000000f,
83 IRQ_TYPE_DEFAULT = IRQ_TYPE_SENSE_MASK,
84
85 IRQ_TYPE_PROBE = 0x00000010,
86
87 IRQ_LEVEL = (1 << 8),
88 IRQ_PER_CPU = (1 << 9),
89 IRQ_NOPROBE = (1 << 10),
90 IRQ_NOREQUEST = (1 << 11),
91 IRQ_NOAUTOEN = (1 << 12),
92 IRQ_NO_BALANCING = (1 << 13),
93 IRQ_MOVE_PCNTXT = (1 << 14),
94 IRQ_NESTED_THREAD = (1 << 15),
95 IRQ_NOTHREAD = (1 << 16),
96 IRQ_PER_CPU_DEVID = (1 << 17),
97};
98
99#define IRQF_MODIFY_MASK \
100 (IRQ_TYPE_SENSE_MASK | IRQ_NOPROBE | IRQ_NOREQUEST | \
101 IRQ_NOAUTOEN | IRQ_MOVE_PCNTXT | IRQ_LEVEL | IRQ_NO_BALANCING | \
102 IRQ_PER_CPU | IRQ_NESTED_THREAD | IRQ_NOTHREAD | IRQ_PER_CPU_DEVID)
103
104#define IRQ_NO_BALANCING_MASK (IRQ_PER_CPU | IRQ_NO_BALANCING)
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111
112enum {
113 IRQ_SET_MASK_OK = 0,
114 IRQ_SET_MASK_OK_NOCOPY,
115};
116
117struct msi_desc;
118struct irq_domain;
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141struct irq_data {
142 u32 mask;
143 unsigned int irq;
144 unsigned long hwirq;
145 unsigned int node;
146 unsigned int state_use_accessors;
147 struct irq_chip *chip;
148 struct irq_domain *domain;
149 void *handler_data;
150 void *chip_data;
151 struct msi_desc *msi_desc;
152 cpumask_var_t affinity;
153};
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172enum {
173 IRQD_TRIGGER_MASK = 0xf,
174 IRQD_SETAFFINITY_PENDING = (1 << 8),
175 IRQD_NO_BALANCING = (1 << 10),
176 IRQD_PER_CPU = (1 << 11),
177 IRQD_AFFINITY_SET = (1 << 12),
178 IRQD_LEVEL = (1 << 13),
179 IRQD_WAKEUP_STATE = (1 << 14),
180 IRQD_MOVE_PCNTXT = (1 << 15),
181 IRQD_IRQ_DISABLED = (1 << 16),
182 IRQD_IRQ_MASKED = (1 << 17),
183 IRQD_IRQ_INPROGRESS = (1 << 18),
184};
185
186static inline bool irqd_is_setaffinity_pending(struct irq_data *d)
187{
188 return d->state_use_accessors & IRQD_SETAFFINITY_PENDING;
189}
190
191static inline bool irqd_is_per_cpu(struct irq_data *d)
192{
193 return d->state_use_accessors & IRQD_PER_CPU;
194}
195
196static inline bool irqd_can_balance(struct irq_data *d)
197{
198 return !(d->state_use_accessors & (IRQD_PER_CPU | IRQD_NO_BALANCING));
199}
200
201static inline bool irqd_affinity_was_set(struct irq_data *d)
202{
203 return d->state_use_accessors & IRQD_AFFINITY_SET;
204}
205
206static inline void irqd_mark_affinity_was_set(struct irq_data *d)
207{
208 d->state_use_accessors |= IRQD_AFFINITY_SET;
209}
210
211static inline u32 irqd_get_trigger_type(struct irq_data *d)
212{
213 return d->state_use_accessors & IRQD_TRIGGER_MASK;
214}
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219static inline void irqd_set_trigger_type(struct irq_data *d, u32 type)
220{
221 d->state_use_accessors &= ~IRQD_TRIGGER_MASK;
222 d->state_use_accessors |= type & IRQD_TRIGGER_MASK;
223}
224
225static inline bool irqd_is_level_type(struct irq_data *d)
226{
227 return d->state_use_accessors & IRQD_LEVEL;
228}
229
230static inline bool irqd_is_wakeup_set(struct irq_data *d)
231{
232 return d->state_use_accessors & IRQD_WAKEUP_STATE;
233}
234
235static inline bool irqd_can_move_in_process_context(struct irq_data *d)
236{
237 return d->state_use_accessors & IRQD_MOVE_PCNTXT;
238}
239
240static inline bool irqd_irq_disabled(struct irq_data *d)
241{
242 return d->state_use_accessors & IRQD_IRQ_DISABLED;
243}
244
245static inline bool irqd_irq_masked(struct irq_data *d)
246{
247 return d->state_use_accessors & IRQD_IRQ_MASKED;
248}
249
250static inline bool irqd_irq_inprogress(struct irq_data *d)
251{
252 return d->state_use_accessors & IRQD_IRQ_INPROGRESS;
253}
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260static inline void irqd_set_chained_irq_inprogress(struct irq_data *d)
261{
262 d->state_use_accessors |= IRQD_IRQ_INPROGRESS;
263}
264
265static inline void irqd_clr_chained_irq_inprogress(struct irq_data *d)
266{
267 d->state_use_accessors &= ~IRQD_IRQ_INPROGRESS;
268}
269
270static inline irq_hw_number_t irqd_to_hwirq(struct irq_data *d)
271{
272 return d->hwirq;
273}
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303struct irq_chip {
304 const char *name;
305 unsigned int (*irq_startup)(struct irq_data *data);
306 void (*irq_shutdown)(struct irq_data *data);
307 void (*irq_enable)(struct irq_data *data);
308 void (*irq_disable)(struct irq_data *data);
309
310 void (*irq_ack)(struct irq_data *data);
311 void (*irq_mask)(struct irq_data *data);
312 void (*irq_mask_ack)(struct irq_data *data);
313 void (*irq_unmask)(struct irq_data *data);
314 void (*irq_eoi)(struct irq_data *data);
315
316 int (*irq_set_affinity)(struct irq_data *data, const struct cpumask *dest, bool force);
317 int (*irq_retrigger)(struct irq_data *data);
318 int (*irq_set_type)(struct irq_data *data, unsigned int flow_type);
319 int (*irq_set_wake)(struct irq_data *data, unsigned int on);
320
321 void (*irq_bus_lock)(struct irq_data *data);
322 void (*irq_bus_sync_unlock)(struct irq_data *data);
323
324 void (*irq_cpu_online)(struct irq_data *data);
325 void (*irq_cpu_offline)(struct irq_data *data);
326
327 void (*irq_suspend)(struct irq_data *data);
328 void (*irq_resume)(struct irq_data *data);
329 void (*irq_pm_shutdown)(struct irq_data *data);
330
331 void (*irq_calc_mask)(struct irq_data *data);
332
333 void (*irq_print_chip)(struct irq_data *data, struct seq_file *p);
334
335 unsigned long flags;
336};
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348enum {
349 IRQCHIP_SET_TYPE_MASKED = (1 << 0),
350 IRQCHIP_EOI_IF_HANDLED = (1 << 1),
351 IRQCHIP_MASK_ON_SUSPEND = (1 << 2),
352 IRQCHIP_ONOFFLINE_ENABLED = (1 << 3),
353 IRQCHIP_SKIP_SET_WAKE = (1 << 4),
354 IRQCHIP_ONESHOT_SAFE = (1 << 5),
355};
356
357
358#include <linux/irqdesc.h>
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363#include <asm/hw_irq.h>
364
365#ifndef NR_IRQS_LEGACY
366# define NR_IRQS_LEGACY 0
367#endif
368
369#ifndef ARCH_IRQ_INIT_FLAGS
370# define ARCH_IRQ_INIT_FLAGS 0
371#endif
372
373#define IRQ_DEFAULT_INIT_FLAGS ARCH_IRQ_INIT_FLAGS
374
375struct irqaction;
376extern int setup_irq(unsigned int irq, struct irqaction *new);
377extern void remove_irq(unsigned int irq, struct irqaction *act);
378extern int setup_percpu_irq(unsigned int irq, struct irqaction *new);
379extern void remove_percpu_irq(unsigned int irq, struct irqaction *act);
380
381extern void irq_cpu_online(void);
382extern void irq_cpu_offline(void);
383extern int __irq_set_affinity_locked(struct irq_data *data, const struct cpumask *cpumask);
384
385#if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_PENDING_IRQ)
386void irq_move_irq(struct irq_data *data);
387void irq_move_masked_irq(struct irq_data *data);
388#else
389static inline void irq_move_irq(struct irq_data *data) { }
390static inline void irq_move_masked_irq(struct irq_data *data) { }
391#endif
392
393extern int no_irq_affinity;
394
395#ifdef CONFIG_HARDIRQS_SW_RESEND
396int irq_set_parent(int irq, int parent_irq);
397#else
398static inline int irq_set_parent(int irq, int parent_irq)
399{
400 return 0;
401}
402#endif
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408extern void handle_level_irq(unsigned int irq, struct irq_desc *desc);
409extern void handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc);
410extern void handle_edge_irq(unsigned int irq, struct irq_desc *desc);
411extern void handle_edge_eoi_irq(unsigned int irq, struct irq_desc *desc);
412extern void handle_simple_irq(unsigned int irq, struct irq_desc *desc);
413extern void handle_percpu_irq(unsigned int irq, struct irq_desc *desc);
414extern void handle_percpu_devid_irq(unsigned int irq, struct irq_desc *desc);
415extern void handle_bad_irq(unsigned int irq, struct irq_desc *desc);
416extern void handle_nested_irq(unsigned int irq);
417
418
419extern void note_interrupt(unsigned int irq, struct irq_desc *desc,
420 irqreturn_t action_ret);
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423
424extern int noirqdebug_setup(char *str);
425
426
427extern int can_request_irq(unsigned int irq, unsigned long irqflags);
428
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430extern struct irq_chip no_irq_chip;
431extern struct irq_chip dummy_irq_chip;
432
433extern void
434irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
435 irq_flow_handler_t handle, const char *name);
436
437static inline void irq_set_chip_and_handler(unsigned int irq, struct irq_chip *chip,
438 irq_flow_handler_t handle)
439{
440 irq_set_chip_and_handler_name(irq, chip, handle, NULL);
441}
442
443extern int irq_set_percpu_devid(unsigned int irq);
444
445extern void
446__irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
447 const char *name);
448
449static inline void
450irq_set_handler(unsigned int irq, irq_flow_handler_t handle)
451{
452 __irq_set_handler(irq, handle, 0, NULL);
453}
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460static inline void
461irq_set_chained_handler(unsigned int irq, irq_flow_handler_t handle)
462{
463 __irq_set_handler(irq, handle, 1, NULL);
464}
465
466void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set);
467
468static inline void irq_set_status_flags(unsigned int irq, unsigned long set)
469{
470 irq_modify_status(irq, 0, set);
471}
472
473static inline void irq_clear_status_flags(unsigned int irq, unsigned long clr)
474{
475 irq_modify_status(irq, clr, 0);
476}
477
478static inline void irq_set_noprobe(unsigned int irq)
479{
480 irq_modify_status(irq, 0, IRQ_NOPROBE);
481}
482
483static inline void irq_set_probe(unsigned int irq)
484{
485 irq_modify_status(irq, IRQ_NOPROBE, 0);
486}
487
488static inline void irq_set_nothread(unsigned int irq)
489{
490 irq_modify_status(irq, 0, IRQ_NOTHREAD);
491}
492
493static inline void irq_set_thread(unsigned int irq)
494{
495 irq_modify_status(irq, IRQ_NOTHREAD, 0);
496}
497
498static inline void irq_set_nested_thread(unsigned int irq, bool nest)
499{
500 if (nest)
501 irq_set_status_flags(irq, IRQ_NESTED_THREAD);
502 else
503 irq_clear_status_flags(irq, IRQ_NESTED_THREAD);
504}
505
506static inline void irq_set_percpu_devid_flags(unsigned int irq)
507{
508 irq_set_status_flags(irq,
509 IRQ_NOAUTOEN | IRQ_PER_CPU | IRQ_NOTHREAD |
510 IRQ_NOPROBE | IRQ_PER_CPU_DEVID);
511}
512
513
514extern unsigned int create_irq_nr(unsigned int irq_want, int node);
515extern unsigned int __create_irqs(unsigned int from, unsigned int count,
516 int node);
517extern int create_irq(void);
518extern void destroy_irq(unsigned int irq);
519extern void destroy_irqs(unsigned int irq, unsigned int count);
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525extern void dynamic_irq_cleanup(unsigned int irq);
526static inline void dynamic_irq_init(unsigned int irq)
527{
528 dynamic_irq_cleanup(irq);
529}
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531
532extern int irq_set_chip(unsigned int irq, struct irq_chip *chip);
533extern int irq_set_handler_data(unsigned int irq, void *data);
534extern int irq_set_chip_data(unsigned int irq, void *data);
535extern int irq_set_irq_type(unsigned int irq, unsigned int type);
536extern int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry);
537extern int irq_set_msi_desc_off(unsigned int irq_base, unsigned int irq_offset,
538 struct msi_desc *entry);
539extern struct irq_data *irq_get_irq_data(unsigned int irq);
540
541static inline struct irq_chip *irq_get_chip(unsigned int irq)
542{
543 struct irq_data *d = irq_get_irq_data(irq);
544 return d ? d->chip : NULL;
545}
546
547static inline struct irq_chip *irq_data_get_irq_chip(struct irq_data *d)
548{
549 return d->chip;
550}
551
552static inline void *irq_get_chip_data(unsigned int irq)
553{
554 struct irq_data *d = irq_get_irq_data(irq);
555 return d ? d->chip_data : NULL;
556}
557
558static inline void *irq_data_get_irq_chip_data(struct irq_data *d)
559{
560 return d->chip_data;
561}
562
563static inline void *irq_get_handler_data(unsigned int irq)
564{
565 struct irq_data *d = irq_get_irq_data(irq);
566 return d ? d->handler_data : NULL;
567}
568
569static inline void *irq_data_get_irq_handler_data(struct irq_data *d)
570{
571 return d->handler_data;
572}
573
574static inline struct msi_desc *irq_get_msi_desc(unsigned int irq)
575{
576 struct irq_data *d = irq_get_irq_data(irq);
577 return d ? d->msi_desc : NULL;
578}
579
580static inline struct msi_desc *irq_data_get_msi(struct irq_data *d)
581{
582 return d->msi_desc;
583}
584
585static inline u32 irq_get_trigger_type(unsigned int irq)
586{
587 struct irq_data *d = irq_get_irq_data(irq);
588 return d ? irqd_get_trigger_type(d) : 0;
589}
590
591int __irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node,
592 struct module *owner);
593
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595#define irq_alloc_descs(irq, from, cnt, node) \
596 __irq_alloc_descs(irq, from, cnt, node, THIS_MODULE)
597
598#define irq_alloc_desc(node) \
599 irq_alloc_descs(-1, 0, 1, node)
600
601#define irq_alloc_desc_at(at, node) \
602 irq_alloc_descs(at, at, 1, node)
603
604#define irq_alloc_desc_from(from, node) \
605 irq_alloc_descs(-1, from, 1, node)
606
607#define irq_alloc_descs_from(from, cnt, node) \
608 irq_alloc_descs(-1, from, cnt, node)
609
610void irq_free_descs(unsigned int irq, unsigned int cnt);
611int irq_reserve_irqs(unsigned int from, unsigned int cnt);
612
613static inline void irq_free_desc(unsigned int irq)
614{
615 irq_free_descs(irq, 1);
616}
617
618static inline int irq_reserve_irq(unsigned int irq)
619{
620 return irq_reserve_irqs(irq, 1);
621}
622
623#ifndef irq_reg_writel
624# define irq_reg_writel(val, addr) writel(val, addr)
625#endif
626#ifndef irq_reg_readl
627# define irq_reg_readl(addr) readl(addr)
628#endif
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640struct irq_chip_regs {
641 unsigned long enable;
642 unsigned long disable;
643 unsigned long mask;
644 unsigned long ack;
645 unsigned long eoi;
646 unsigned long type;
647 unsigned long polarity;
648};
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663struct irq_chip_type {
664 struct irq_chip chip;
665 struct irq_chip_regs regs;
666 irq_flow_handler_t handler;
667 u32 type;
668 u32 mask_cache_priv;
669 u32 *mask_cache;
670};
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697struct irq_chip_generic {
698 raw_spinlock_t lock;
699 void __iomem *reg_base;
700 unsigned int irq_base;
701 unsigned int irq_cnt;
702 u32 mask_cache;
703 u32 type_cache;
704 u32 polarity_cache;
705 u32 wake_enabled;
706 u32 wake_active;
707 unsigned int num_ct;
708 void *private;
709 unsigned long installed;
710 unsigned long unused;
711 struct irq_domain *domain;
712 struct list_head list;
713 struct irq_chip_type chip_types[0];
714};
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725enum irq_gc_flags {
726 IRQ_GC_INIT_MASK_CACHE = 1 << 0,
727 IRQ_GC_INIT_NESTED_LOCK = 1 << 1,
728 IRQ_GC_MASK_CACHE_PER_TYPE = 1 << 2,
729 IRQ_GC_NO_MASK = 1 << 3,
730};
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741struct irq_domain_chip_generic {
742 unsigned int irqs_per_chip;
743 unsigned int num_chips;
744 unsigned int irq_flags_to_clear;
745 unsigned int irq_flags_to_set;
746 enum irq_gc_flags gc_flags;
747 struct irq_chip_generic *gc[0];
748};
749
750
751void irq_gc_noop(struct irq_data *d);
752void irq_gc_mask_disable_reg(struct irq_data *d);
753void irq_gc_mask_set_bit(struct irq_data *d);
754void irq_gc_mask_clr_bit(struct irq_data *d);
755void irq_gc_unmask_enable_reg(struct irq_data *d);
756void irq_gc_ack_set_bit(struct irq_data *d);
757void irq_gc_ack_clr_bit(struct irq_data *d);
758void irq_gc_mask_disable_reg_and_ack(struct irq_data *d);
759void irq_gc_eoi(struct irq_data *d);
760int irq_gc_set_wake(struct irq_data *d, unsigned int on);
761
762
763struct irq_chip_generic *
764irq_alloc_generic_chip(const char *name, int nr_ct, unsigned int irq_base,
765 void __iomem *reg_base, irq_flow_handler_t handler);
766void irq_setup_generic_chip(struct irq_chip_generic *gc, u32 msk,
767 enum irq_gc_flags flags, unsigned int clr,
768 unsigned int set);
769int irq_setup_alt_chip(struct irq_data *d, unsigned int type);
770void irq_remove_generic_chip(struct irq_chip_generic *gc, u32 msk,
771 unsigned int clr, unsigned int set);
772
773struct irq_chip_generic *irq_get_domain_generic_chip(struct irq_domain *d, unsigned int hw_irq);
774int irq_alloc_domain_generic_chips(struct irq_domain *d, int irqs_per_chip,
775 int num_ct, const char *name,
776 irq_flow_handler_t handler,
777 unsigned int clr, unsigned int set,
778 enum irq_gc_flags flags);
779
780
781static inline struct irq_chip_type *irq_data_get_chip_type(struct irq_data *d)
782{
783 return container_of(d->chip, struct irq_chip_type, chip);
784}
785
786#define IRQ_MSK(n) (u32)((n) < 32 ? ((1 << (n)) - 1) : UINT_MAX)
787
788#ifdef CONFIG_SMP
789static inline void irq_gc_lock(struct irq_chip_generic *gc)
790{
791 raw_spin_lock(&gc->lock);
792}
793
794static inline void irq_gc_unlock(struct irq_chip_generic *gc)
795{
796 raw_spin_unlock(&gc->lock);
797}
798#else
799static inline void irq_gc_lock(struct irq_chip_generic *gc) { }
800static inline void irq_gc_unlock(struct irq_chip_generic *gc) { }
801#endif
802
803#endif
804