linux/include/video/omapdss.h
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   1/*
   2 * Copyright (C) 2008 Nokia Corporation
   3 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
   4 *
   5 * This program is free software; you can redistribute it and/or modify it
   6 * under the terms of the GNU General Public License version 2 as published by
   7 * the Free Software Foundation.
   8 *
   9 * This program is distributed in the hope that it will be useful, but WITHOUT
  10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12 * more details.
  13 *
  14 * You should have received a copy of the GNU General Public License along with
  15 * this program.  If not, see <http://www.gnu.org/licenses/>.
  16 */
  17
  18#ifndef __OMAP_OMAPDSS_H
  19#define __OMAP_OMAPDSS_H
  20
  21#include <linux/list.h>
  22#include <linux/kobject.h>
  23#include <linux/device.h>
  24#include <linux/interrupt.h>
  25
  26#include <video/videomode.h>
  27
  28#define DISPC_IRQ_FRAMEDONE             (1 << 0)
  29#define DISPC_IRQ_VSYNC                 (1 << 1)
  30#define DISPC_IRQ_EVSYNC_EVEN           (1 << 2)
  31#define DISPC_IRQ_EVSYNC_ODD            (1 << 3)
  32#define DISPC_IRQ_ACBIAS_COUNT_STAT     (1 << 4)
  33#define DISPC_IRQ_PROG_LINE_NUM         (1 << 5)
  34#define DISPC_IRQ_GFX_FIFO_UNDERFLOW    (1 << 6)
  35#define DISPC_IRQ_GFX_END_WIN           (1 << 7)
  36#define DISPC_IRQ_PAL_GAMMA_MASK        (1 << 8)
  37#define DISPC_IRQ_OCP_ERR               (1 << 9)
  38#define DISPC_IRQ_VID1_FIFO_UNDERFLOW   (1 << 10)
  39#define DISPC_IRQ_VID1_END_WIN          (1 << 11)
  40#define DISPC_IRQ_VID2_FIFO_UNDERFLOW   (1 << 12)
  41#define DISPC_IRQ_VID2_END_WIN          (1 << 13)
  42#define DISPC_IRQ_SYNC_LOST             (1 << 14)
  43#define DISPC_IRQ_SYNC_LOST_DIGIT       (1 << 15)
  44#define DISPC_IRQ_WAKEUP                (1 << 16)
  45#define DISPC_IRQ_SYNC_LOST2            (1 << 17)
  46#define DISPC_IRQ_VSYNC2                (1 << 18)
  47#define DISPC_IRQ_VID3_END_WIN          (1 << 19)
  48#define DISPC_IRQ_VID3_FIFO_UNDERFLOW   (1 << 20)
  49#define DISPC_IRQ_ACBIAS_COUNT_STAT2    (1 << 21)
  50#define DISPC_IRQ_FRAMEDONE2            (1 << 22)
  51#define DISPC_IRQ_FRAMEDONEWB           (1 << 23)
  52#define DISPC_IRQ_FRAMEDONETV           (1 << 24)
  53#define DISPC_IRQ_WBBUFFEROVERFLOW      (1 << 25)
  54#define DISPC_IRQ_SYNC_LOST3            (1 << 27)
  55#define DISPC_IRQ_VSYNC3                (1 << 28)
  56#define DISPC_IRQ_ACBIAS_COUNT_STAT3    (1 << 29)
  57#define DISPC_IRQ_FRAMEDONE3            (1 << 30)
  58
  59struct omap_dss_device;
  60struct omap_overlay_manager;
  61struct dss_lcd_mgr_config;
  62struct snd_aes_iec958;
  63struct snd_cea_861_aud_if;
  64
  65enum omap_display_type {
  66        OMAP_DISPLAY_TYPE_NONE          = 0,
  67        OMAP_DISPLAY_TYPE_DPI           = 1 << 0,
  68        OMAP_DISPLAY_TYPE_DBI           = 1 << 1,
  69        OMAP_DISPLAY_TYPE_SDI           = 1 << 2,
  70        OMAP_DISPLAY_TYPE_DSI           = 1 << 3,
  71        OMAP_DISPLAY_TYPE_VENC          = 1 << 4,
  72        OMAP_DISPLAY_TYPE_HDMI          = 1 << 5,
  73        OMAP_DISPLAY_TYPE_DVI           = 1 << 6,
  74};
  75
  76enum omap_plane {
  77        OMAP_DSS_GFX    = 0,
  78        OMAP_DSS_VIDEO1 = 1,
  79        OMAP_DSS_VIDEO2 = 2,
  80        OMAP_DSS_VIDEO3 = 3,
  81        OMAP_DSS_WB     = 4,
  82};
  83
  84enum omap_channel {
  85        OMAP_DSS_CHANNEL_LCD    = 0,
  86        OMAP_DSS_CHANNEL_DIGIT  = 1,
  87        OMAP_DSS_CHANNEL_LCD2   = 2,
  88        OMAP_DSS_CHANNEL_LCD3   = 3,
  89};
  90
  91enum omap_color_mode {
  92        OMAP_DSS_COLOR_CLUT1    = 1 << 0,  /* BITMAP 1 */
  93        OMAP_DSS_COLOR_CLUT2    = 1 << 1,  /* BITMAP 2 */
  94        OMAP_DSS_COLOR_CLUT4    = 1 << 2,  /* BITMAP 4 */
  95        OMAP_DSS_COLOR_CLUT8    = 1 << 3,  /* BITMAP 8 */
  96        OMAP_DSS_COLOR_RGB12U   = 1 << 4,  /* RGB12, 16-bit container */
  97        OMAP_DSS_COLOR_ARGB16   = 1 << 5,  /* ARGB16 */
  98        OMAP_DSS_COLOR_RGB16    = 1 << 6,  /* RGB16 */
  99        OMAP_DSS_COLOR_RGB24U   = 1 << 7,  /* RGB24, 32-bit container */
 100        OMAP_DSS_COLOR_RGB24P   = 1 << 8,  /* RGB24, 24-bit container */
 101        OMAP_DSS_COLOR_YUV2     = 1 << 9,  /* YUV2 4:2:2 co-sited */
 102        OMAP_DSS_COLOR_UYVY     = 1 << 10, /* UYVY 4:2:2 co-sited */
 103        OMAP_DSS_COLOR_ARGB32   = 1 << 11, /* ARGB32 */
 104        OMAP_DSS_COLOR_RGBA32   = 1 << 12, /* RGBA32 */
 105        OMAP_DSS_COLOR_RGBX32   = 1 << 13, /* RGBx32 */
 106        OMAP_DSS_COLOR_NV12             = 1 << 14, /* NV12 format: YUV 4:2:0 */
 107        OMAP_DSS_COLOR_RGBA16           = 1 << 15, /* RGBA16 - 4444 */
 108        OMAP_DSS_COLOR_RGBX16           = 1 << 16, /* RGBx16 - 4444 */
 109        OMAP_DSS_COLOR_ARGB16_1555      = 1 << 17, /* ARGB16 - 1555 */
 110        OMAP_DSS_COLOR_XRGB16_1555      = 1 << 18, /* xRGB16 - 1555 */
 111};
 112
 113enum omap_dss_load_mode {
 114        OMAP_DSS_LOAD_CLUT_AND_FRAME    = 0,
 115        OMAP_DSS_LOAD_CLUT_ONLY         = 1,
 116        OMAP_DSS_LOAD_FRAME_ONLY        = 2,
 117        OMAP_DSS_LOAD_CLUT_ONCE_FRAME   = 3,
 118};
 119
 120enum omap_dss_trans_key_type {
 121        OMAP_DSS_COLOR_KEY_GFX_DST = 0,
 122        OMAP_DSS_COLOR_KEY_VID_SRC = 1,
 123};
 124
 125enum omap_rfbi_te_mode {
 126        OMAP_DSS_RFBI_TE_MODE_1 = 1,
 127        OMAP_DSS_RFBI_TE_MODE_2 = 2,
 128};
 129
 130enum omap_dss_signal_level {
 131        OMAPDSS_SIG_ACTIVE_HIGH = 0,
 132        OMAPDSS_SIG_ACTIVE_LOW  = 1,
 133};
 134
 135enum omap_dss_signal_edge {
 136        OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES,
 137        OMAPDSS_DRIVE_SIG_RISING_EDGE,
 138        OMAPDSS_DRIVE_SIG_FALLING_EDGE,
 139};
 140
 141enum omap_dss_venc_type {
 142        OMAP_DSS_VENC_TYPE_COMPOSITE,
 143        OMAP_DSS_VENC_TYPE_SVIDEO,
 144};
 145
 146enum omap_dss_dsi_pixel_format {
 147        OMAP_DSS_DSI_FMT_RGB888,
 148        OMAP_DSS_DSI_FMT_RGB666,
 149        OMAP_DSS_DSI_FMT_RGB666_PACKED,
 150        OMAP_DSS_DSI_FMT_RGB565,
 151};
 152
 153enum omap_dss_dsi_mode {
 154        OMAP_DSS_DSI_CMD_MODE = 0,
 155        OMAP_DSS_DSI_VIDEO_MODE,
 156};
 157
 158enum omap_display_caps {
 159        OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE      = 1 << 0,
 160        OMAP_DSS_DISPLAY_CAP_TEAR_ELIM          = 1 << 1,
 161};
 162
 163enum omap_dss_display_state {
 164        OMAP_DSS_DISPLAY_DISABLED = 0,
 165        OMAP_DSS_DISPLAY_ACTIVE,
 166};
 167
 168enum omap_dss_audio_state {
 169        OMAP_DSS_AUDIO_DISABLED = 0,
 170        OMAP_DSS_AUDIO_ENABLED,
 171        OMAP_DSS_AUDIO_CONFIGURED,
 172        OMAP_DSS_AUDIO_PLAYING,
 173};
 174
 175struct omap_dss_audio {
 176        struct snd_aes_iec958 *iec;
 177        struct snd_cea_861_aud_if *cea;
 178};
 179
 180enum omap_dss_rotation_type {
 181        OMAP_DSS_ROT_DMA        = 1 << 0,
 182        OMAP_DSS_ROT_VRFB       = 1 << 1,
 183        OMAP_DSS_ROT_TILER      = 1 << 2,
 184};
 185
 186/* clockwise rotation angle */
 187enum omap_dss_rotation_angle {
 188        OMAP_DSS_ROT_0   = 0,
 189        OMAP_DSS_ROT_90  = 1,
 190        OMAP_DSS_ROT_180 = 2,
 191        OMAP_DSS_ROT_270 = 3,
 192};
 193
 194enum omap_overlay_caps {
 195        OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
 196        OMAP_DSS_OVL_CAP_GLOBAL_ALPHA = 1 << 1,
 197        OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA = 1 << 2,
 198        OMAP_DSS_OVL_CAP_ZORDER = 1 << 3,
 199        OMAP_DSS_OVL_CAP_POS = 1 << 4,
 200        OMAP_DSS_OVL_CAP_REPLICATION = 1 << 5,
 201};
 202
 203enum omap_overlay_manager_caps {
 204        OMAP_DSS_DUMMY_VALUE, /* add a dummy value to prevent compiler error */
 205};
 206
 207enum omap_dss_clk_source {
 208        OMAP_DSS_CLK_SRC_FCK = 0,               /* OMAP2/3: DSS1_ALWON_FCLK
 209                                                 * OMAP4: DSS_FCLK */
 210        OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC,   /* OMAP3: DSI1_PLL_FCLK
 211                                                 * OMAP4: PLL1_CLK1 */
 212        OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI,     /* OMAP3: DSI2_PLL_FCLK
 213                                                 * OMAP4: PLL1_CLK2 */
 214        OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC,  /* OMAP4: PLL2_CLK1 */
 215        OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI,    /* OMAP4: PLL2_CLK2 */
 216};
 217
 218enum omap_hdmi_flags {
 219        OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP = 1 << 0,
 220};
 221
 222enum omap_dss_output_id {
 223        OMAP_DSS_OUTPUT_DPI     = 1 << 0,
 224        OMAP_DSS_OUTPUT_DBI     = 1 << 1,
 225        OMAP_DSS_OUTPUT_SDI     = 1 << 2,
 226        OMAP_DSS_OUTPUT_DSI1    = 1 << 3,
 227        OMAP_DSS_OUTPUT_DSI2    = 1 << 4,
 228        OMAP_DSS_OUTPUT_VENC    = 1 << 5,
 229        OMAP_DSS_OUTPUT_HDMI    = 1 << 6,
 230};
 231
 232/* RFBI */
 233
 234struct rfbi_timings {
 235        int cs_on_time;
 236        int cs_off_time;
 237        int we_on_time;
 238        int we_off_time;
 239        int re_on_time;
 240        int re_off_time;
 241        int we_cycle_time;
 242        int re_cycle_time;
 243        int cs_pulse_width;
 244        int access_time;
 245
 246        int clk_div;
 247
 248        u32 tim[5];             /* set by rfbi_convert_timings() */
 249
 250        int converted;
 251};
 252
 253/* DSI */
 254
 255enum omap_dss_dsi_trans_mode {
 256        /* Sync Pulses: both sync start and end packets sent */
 257        OMAP_DSS_DSI_PULSE_MODE,
 258        /* Sync Events: only sync start packets sent */
 259        OMAP_DSS_DSI_EVENT_MODE,
 260        /* Burst: only sync start packets sent, pixels are time compressed */
 261        OMAP_DSS_DSI_BURST_MODE,
 262};
 263
 264struct omap_dss_dsi_videomode_timings {
 265        unsigned long hsclk;
 266
 267        unsigned ndl;
 268        unsigned bitspp;
 269
 270        /* pixels */
 271        u16 hact;
 272        /* lines */
 273        u16 vact;
 274
 275        /* DSI video mode blanking data */
 276        /* Unit: byte clock cycles */
 277        u16 hss;
 278        u16 hsa;
 279        u16 hse;
 280        u16 hfp;
 281        u16 hbp;
 282        /* Unit: line clocks */
 283        u16 vsa;
 284        u16 vfp;
 285        u16 vbp;
 286
 287        /* DSI blanking modes */
 288        int blanking_mode;
 289        int hsa_blanking_mode;
 290        int hbp_blanking_mode;
 291        int hfp_blanking_mode;
 292
 293        enum omap_dss_dsi_trans_mode trans_mode;
 294
 295        bool ddr_clk_always_on;
 296        int window_sync;
 297};
 298
 299struct omap_dss_dsi_config {
 300        enum omap_dss_dsi_mode mode;
 301        enum omap_dss_dsi_pixel_format pixel_format;
 302        const struct omap_video_timings *timings;
 303
 304        unsigned long hs_clk_min, hs_clk_max;
 305        unsigned long lp_clk_min, lp_clk_max;
 306
 307        bool ddr_clk_always_on;
 308        enum omap_dss_dsi_trans_mode trans_mode;
 309};
 310
 311enum omapdss_version {
 312        OMAPDSS_VER_UNKNOWN = 0,
 313        OMAPDSS_VER_OMAP24xx,
 314        OMAPDSS_VER_OMAP34xx_ES1,       /* OMAP3430 ES1.0, 2.0 */
 315        OMAPDSS_VER_OMAP34xx_ES3,       /* OMAP3430 ES3.0+ */
 316        OMAPDSS_VER_OMAP3630,
 317        OMAPDSS_VER_AM35xx,
 318        OMAPDSS_VER_OMAP4430_ES1,       /* OMAP4430 ES1.0 */
 319        OMAPDSS_VER_OMAP4430_ES2,       /* OMAP4430 ES2.0, 2.1, 2.2 */
 320        OMAPDSS_VER_OMAP4,              /* All other OMAP4s */
 321        OMAPDSS_VER_OMAP5,
 322};
 323
 324/* Board specific data */
 325struct omap_dss_board_info {
 326        int (*get_context_loss_count)(struct device *dev);
 327        int num_devices;
 328        struct omap_dss_device **devices;
 329        struct omap_dss_device *default_device;
 330        const char *default_display_name;
 331        int (*dsi_enable_pads)(int dsi_id, unsigned lane_mask);
 332        void (*dsi_disable_pads)(int dsi_id, unsigned lane_mask);
 333        int (*set_min_bus_tput)(struct device *dev, unsigned long r);
 334        enum omapdss_version version;
 335};
 336
 337/* Init with the board info */
 338extern int omap_display_init(struct omap_dss_board_info *board_data);
 339/* HDMI mux init*/
 340extern int omap_hdmi_init(enum omap_hdmi_flags flags);
 341
 342struct omap_video_timings {
 343        /* Unit: pixels */
 344        u16 x_res;
 345        /* Unit: pixels */
 346        u16 y_res;
 347        /* Unit: KHz */
 348        u32 pixel_clock;
 349        /* Unit: pixel clocks */
 350        u16 hsw;        /* Horizontal synchronization pulse width */
 351        /* Unit: pixel clocks */
 352        u16 hfp;        /* Horizontal front porch */
 353        /* Unit: pixel clocks */
 354        u16 hbp;        /* Horizontal back porch */
 355        /* Unit: line clocks */
 356        u16 vsw;        /* Vertical synchronization pulse width */
 357        /* Unit: line clocks */
 358        u16 vfp;        /* Vertical front porch */
 359        /* Unit: line clocks */
 360        u16 vbp;        /* Vertical back porch */
 361
 362        /* Vsync logic level */
 363        enum omap_dss_signal_level vsync_level;
 364        /* Hsync logic level */
 365        enum omap_dss_signal_level hsync_level;
 366        /* Interlaced or Progressive timings */
 367        bool interlace;
 368        /* Pixel clock edge to drive LCD data */
 369        enum omap_dss_signal_edge data_pclk_edge;
 370        /* Data enable logic level */
 371        enum omap_dss_signal_level de_level;
 372        /* Pixel clock edges to drive HSYNC and VSYNC signals */
 373        enum omap_dss_signal_edge sync_pclk_edge;
 374};
 375
 376#ifdef CONFIG_OMAP2_DSS_VENC
 377/* Hardcoded timings for tv modes. Venc only uses these to
 378 * identify the mode, and does not actually use the configs
 379 * itself. However, the configs should be something that
 380 * a normal monitor can also show */
 381extern const struct omap_video_timings omap_dss_pal_timings;
 382extern const struct omap_video_timings omap_dss_ntsc_timings;
 383#endif
 384
 385struct omap_dss_cpr_coefs {
 386        s16 rr, rg, rb;
 387        s16 gr, gg, gb;
 388        s16 br, bg, bb;
 389};
 390
 391struct omap_overlay_info {
 392        u32 paddr;
 393        u32 p_uv_addr;  /* for NV12 format */
 394        u16 screen_width;
 395        u16 width;
 396        u16 height;
 397        enum omap_color_mode color_mode;
 398        u8 rotation;
 399        enum omap_dss_rotation_type rotation_type;
 400        bool mirror;
 401
 402        u16 pos_x;
 403        u16 pos_y;
 404        u16 out_width;  /* if 0, out_width == width */
 405        u16 out_height; /* if 0, out_height == height */
 406        u8 global_alpha;
 407        u8 pre_mult_alpha;
 408        u8 zorder;
 409};
 410
 411struct omap_overlay {
 412        struct kobject kobj;
 413        struct list_head list;
 414
 415        /* static fields */
 416        const char *name;
 417        enum omap_plane id;
 418        enum omap_color_mode supported_modes;
 419        enum omap_overlay_caps caps;
 420
 421        /* dynamic fields */
 422        struct omap_overlay_manager *manager;
 423
 424        /*
 425         * The following functions do not block:
 426         *
 427         * is_enabled
 428         * set_overlay_info
 429         * get_overlay_info
 430         *
 431         * The rest of the functions may block and cannot be called from
 432         * interrupt context
 433         */
 434
 435        int (*enable)(struct omap_overlay *ovl);
 436        int (*disable)(struct omap_overlay *ovl);
 437        bool (*is_enabled)(struct omap_overlay *ovl);
 438
 439        int (*set_manager)(struct omap_overlay *ovl,
 440                struct omap_overlay_manager *mgr);
 441        int (*unset_manager)(struct omap_overlay *ovl);
 442
 443        int (*set_overlay_info)(struct omap_overlay *ovl,
 444                        struct omap_overlay_info *info);
 445        void (*get_overlay_info)(struct omap_overlay *ovl,
 446                        struct omap_overlay_info *info);
 447
 448        int (*wait_for_go)(struct omap_overlay *ovl);
 449
 450        struct omap_dss_device *(*get_device)(struct omap_overlay *ovl);
 451};
 452
 453struct omap_overlay_manager_info {
 454        u32 default_color;
 455
 456        enum omap_dss_trans_key_type trans_key_type;
 457        u32 trans_key;
 458        bool trans_enabled;
 459
 460        bool partial_alpha_enabled;
 461
 462        bool cpr_enable;
 463        struct omap_dss_cpr_coefs cpr_coefs;
 464};
 465
 466struct omap_overlay_manager {
 467        struct kobject kobj;
 468
 469        /* static fields */
 470        const char *name;
 471        enum omap_channel id;
 472        enum omap_overlay_manager_caps caps;
 473        struct list_head overlays;
 474        enum omap_display_type supported_displays;
 475        enum omap_dss_output_id supported_outputs;
 476
 477        /* dynamic fields */
 478        struct omap_dss_device *output;
 479
 480        /*
 481         * The following functions do not block:
 482         *
 483         * set_manager_info
 484         * get_manager_info
 485         * apply
 486         *
 487         * The rest of the functions may block and cannot be called from
 488         * interrupt context
 489         */
 490
 491        int (*set_output)(struct omap_overlay_manager *mgr,
 492                struct omap_dss_device *output);
 493        int (*unset_output)(struct omap_overlay_manager *mgr);
 494
 495        int (*set_manager_info)(struct omap_overlay_manager *mgr,
 496                        struct omap_overlay_manager_info *info);
 497        void (*get_manager_info)(struct omap_overlay_manager *mgr,
 498                        struct omap_overlay_manager_info *info);
 499
 500        int (*apply)(struct omap_overlay_manager *mgr);
 501        int (*wait_for_go)(struct omap_overlay_manager *mgr);
 502        int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
 503
 504        struct omap_dss_device *(*get_device)(struct omap_overlay_manager *mgr);
 505};
 506
 507/* 22 pins means 1 clk lane and 10 data lanes */
 508#define OMAP_DSS_MAX_DSI_PINS 22
 509
 510struct omap_dsi_pin_config {
 511        int num_pins;
 512        /*
 513         * pin numbers in the following order:
 514         * clk+, clk-
 515         * data1+, data1-
 516         * data2+, data2-
 517         * ...
 518         */
 519        int pins[OMAP_DSS_MAX_DSI_PINS];
 520};
 521
 522struct omap_dss_writeback_info {
 523        u32 paddr;
 524        u32 p_uv_addr;
 525        u16 buf_width;
 526        u16 width;
 527        u16 height;
 528        enum omap_color_mode color_mode;
 529        u8 rotation;
 530        enum omap_dss_rotation_type rotation_type;
 531        bool mirror;
 532        u8 pre_mult_alpha;
 533};
 534
 535struct omapdss_dpi_ops {
 536        int (*connect)(struct omap_dss_device *dssdev,
 537                        struct omap_dss_device *dst);
 538        void (*disconnect)(struct omap_dss_device *dssdev,
 539                        struct omap_dss_device *dst);
 540
 541        int (*enable)(struct omap_dss_device *dssdev);
 542        void (*disable)(struct omap_dss_device *dssdev);
 543
 544        int (*check_timings)(struct omap_dss_device *dssdev,
 545                        struct omap_video_timings *timings);
 546        void (*set_timings)(struct omap_dss_device *dssdev,
 547                        struct omap_video_timings *timings);
 548        void (*get_timings)(struct omap_dss_device *dssdev,
 549                        struct omap_video_timings *timings);
 550
 551        void (*set_data_lines)(struct omap_dss_device *dssdev, int data_lines);
 552};
 553
 554struct omapdss_sdi_ops {
 555        int (*connect)(struct omap_dss_device *dssdev,
 556                        struct omap_dss_device *dst);
 557        void (*disconnect)(struct omap_dss_device *dssdev,
 558                        struct omap_dss_device *dst);
 559
 560        int (*enable)(struct omap_dss_device *dssdev);
 561        void (*disable)(struct omap_dss_device *dssdev);
 562
 563        int (*check_timings)(struct omap_dss_device *dssdev,
 564                        struct omap_video_timings *timings);
 565        void (*set_timings)(struct omap_dss_device *dssdev,
 566                        struct omap_video_timings *timings);
 567        void (*get_timings)(struct omap_dss_device *dssdev,
 568                        struct omap_video_timings *timings);
 569
 570        void (*set_datapairs)(struct omap_dss_device *dssdev, int datapairs);
 571};
 572
 573struct omapdss_dvi_ops {
 574        int (*connect)(struct omap_dss_device *dssdev,
 575                        struct omap_dss_device *dst);
 576        void (*disconnect)(struct omap_dss_device *dssdev,
 577                        struct omap_dss_device *dst);
 578
 579        int (*enable)(struct omap_dss_device *dssdev);
 580        void (*disable)(struct omap_dss_device *dssdev);
 581
 582        int (*check_timings)(struct omap_dss_device *dssdev,
 583                        struct omap_video_timings *timings);
 584        void (*set_timings)(struct omap_dss_device *dssdev,
 585                        struct omap_video_timings *timings);
 586        void (*get_timings)(struct omap_dss_device *dssdev,
 587                        struct omap_video_timings *timings);
 588};
 589
 590struct omapdss_atv_ops {
 591        int (*connect)(struct omap_dss_device *dssdev,
 592                        struct omap_dss_device *dst);
 593        void (*disconnect)(struct omap_dss_device *dssdev,
 594                        struct omap_dss_device *dst);
 595
 596        int (*enable)(struct omap_dss_device *dssdev);
 597        void (*disable)(struct omap_dss_device *dssdev);
 598
 599        int (*check_timings)(struct omap_dss_device *dssdev,
 600                        struct omap_video_timings *timings);
 601        void (*set_timings)(struct omap_dss_device *dssdev,
 602                        struct omap_video_timings *timings);
 603        void (*get_timings)(struct omap_dss_device *dssdev,
 604                        struct omap_video_timings *timings);
 605
 606        void (*set_type)(struct omap_dss_device *dssdev,
 607                enum omap_dss_venc_type type);
 608        void (*invert_vid_out_polarity)(struct omap_dss_device *dssdev,
 609                bool invert_polarity);
 610
 611        int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
 612        u32 (*get_wss)(struct omap_dss_device *dssdev);
 613};
 614
 615struct omapdss_hdmi_ops {
 616        int (*connect)(struct omap_dss_device *dssdev,
 617                        struct omap_dss_device *dst);
 618        void (*disconnect)(struct omap_dss_device *dssdev,
 619                        struct omap_dss_device *dst);
 620
 621        int (*enable)(struct omap_dss_device *dssdev);
 622        void (*disable)(struct omap_dss_device *dssdev);
 623
 624        int (*check_timings)(struct omap_dss_device *dssdev,
 625                        struct omap_video_timings *timings);
 626        void (*set_timings)(struct omap_dss_device *dssdev,
 627                        struct omap_video_timings *timings);
 628        void (*get_timings)(struct omap_dss_device *dssdev,
 629                        struct omap_video_timings *timings);
 630
 631        int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
 632        bool (*detect)(struct omap_dss_device *dssdev);
 633
 634        /*
 635         * Note: These functions might sleep. Do not call while
 636         * holding a spinlock/readlock.
 637         */
 638        int (*audio_enable)(struct omap_dss_device *dssdev);
 639        void (*audio_disable)(struct omap_dss_device *dssdev);
 640        bool (*audio_supported)(struct omap_dss_device *dssdev);
 641        int (*audio_config)(struct omap_dss_device *dssdev,
 642                struct omap_dss_audio *audio);
 643        /* Note: These functions may not sleep */
 644        int (*audio_start)(struct omap_dss_device *dssdev);
 645        void (*audio_stop)(struct omap_dss_device *dssdev);
 646};
 647
 648struct omapdss_dsi_ops {
 649        int (*connect)(struct omap_dss_device *dssdev,
 650                        struct omap_dss_device *dst);
 651        void (*disconnect)(struct omap_dss_device *dssdev,
 652                        struct omap_dss_device *dst);
 653
 654        int (*enable)(struct omap_dss_device *dssdev);
 655        void (*disable)(struct omap_dss_device *dssdev, bool disconnect_lanes,
 656                        bool enter_ulps);
 657
 658        /* bus configuration */
 659        int (*set_config)(struct omap_dss_device *dssdev,
 660                        const struct omap_dss_dsi_config *cfg);
 661        int (*configure_pins)(struct omap_dss_device *dssdev,
 662                        const struct omap_dsi_pin_config *pin_cfg);
 663
 664        void (*enable_hs)(struct omap_dss_device *dssdev, int channel,
 665                        bool enable);
 666        int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
 667
 668        int (*update)(struct omap_dss_device *dssdev, int channel,
 669                        void (*callback)(int, void *), void *data);
 670
 671        void (*bus_lock)(struct omap_dss_device *dssdev);
 672        void (*bus_unlock)(struct omap_dss_device *dssdev);
 673
 674        int (*enable_video_output)(struct omap_dss_device *dssdev, int channel);
 675        void (*disable_video_output)(struct omap_dss_device *dssdev,
 676                        int channel);
 677
 678        int (*request_vc)(struct omap_dss_device *dssdev, int *channel);
 679        int (*set_vc_id)(struct omap_dss_device *dssdev, int channel,
 680                        int vc_id);
 681        void (*release_vc)(struct omap_dss_device *dssdev, int channel);
 682
 683        /* data transfer */
 684        int (*dcs_write)(struct omap_dss_device *dssdev, int channel,
 685                        u8 *data, int len);
 686        int (*dcs_write_nosync)(struct omap_dss_device *dssdev, int channel,
 687                        u8 *data, int len);
 688        int (*dcs_read)(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
 689                        u8 *data, int len);
 690
 691        int (*gen_write)(struct omap_dss_device *dssdev, int channel,
 692                        u8 *data, int len);
 693        int (*gen_write_nosync)(struct omap_dss_device *dssdev, int channel,
 694                        u8 *data, int len);
 695        int (*gen_read)(struct omap_dss_device *dssdev, int channel,
 696                        u8 *reqdata, int reqlen,
 697                        u8 *data, int len);
 698
 699        int (*bta_sync)(struct omap_dss_device *dssdev, int channel);
 700
 701        int (*set_max_rx_packet_size)(struct omap_dss_device *dssdev,
 702                        int channel, u16 plen);
 703};
 704
 705struct omap_dss_device {
 706        struct device *dev;
 707
 708        struct module *owner;
 709
 710        struct list_head panel_list;
 711
 712        /* alias in the form of "display%d" */
 713        char alias[16];
 714
 715        enum omap_display_type type;
 716        enum omap_display_type output_type;
 717
 718        union {
 719                struct {
 720                        u8 data_lines;
 721                } dpi;
 722
 723                struct {
 724                        u8 channel;
 725                        u8 data_lines;
 726                } rfbi;
 727
 728                struct {
 729                        u8 datapairs;
 730                } sdi;
 731
 732                struct {
 733                        int module;
 734                } dsi;
 735
 736                struct {
 737                        enum omap_dss_venc_type type;
 738                        bool invert_polarity;
 739                } venc;
 740        } phy;
 741
 742        struct {
 743                struct omap_video_timings timings;
 744
 745                enum omap_dss_dsi_pixel_format dsi_pix_fmt;
 746                enum omap_dss_dsi_mode dsi_mode;
 747        } panel;
 748
 749        struct {
 750                u8 pixel_size;
 751                struct rfbi_timings rfbi_timings;
 752        } ctrl;
 753
 754        const char *name;
 755
 756        /* used to match device to driver */
 757        const char *driver_name;
 758
 759        void *data;
 760
 761        struct omap_dss_driver *driver;
 762
 763        union {
 764                const struct omapdss_dpi_ops *dpi;
 765                const struct omapdss_sdi_ops *sdi;
 766                const struct omapdss_dvi_ops *dvi;
 767                const struct omapdss_hdmi_ops *hdmi;
 768                const struct omapdss_atv_ops *atv;
 769                const struct omapdss_dsi_ops *dsi;
 770        } ops;
 771
 772        /* helper variable for driver suspend/resume */
 773        bool activate_after_resume;
 774
 775        enum omap_display_caps caps;
 776
 777        struct omap_dss_device *src;
 778
 779        enum omap_dss_display_state state;
 780
 781        enum omap_dss_audio_state audio_state;
 782
 783        /* OMAP DSS output specific fields */
 784
 785        struct list_head list;
 786
 787        /* DISPC channel for this output */
 788        enum omap_channel dispc_channel;
 789
 790        /* output instance */
 791        enum omap_dss_output_id id;
 792
 793        /* dynamic fields */
 794        struct omap_overlay_manager *manager;
 795
 796        struct omap_dss_device *dst;
 797};
 798
 799struct omap_dss_hdmi_data
 800{
 801        int ct_cp_hpd_gpio;
 802        int ls_oe_gpio;
 803        int hpd_gpio;
 804};
 805
 806struct omap_dss_driver {
 807        int (*probe)(struct omap_dss_device *);
 808        void (*remove)(struct omap_dss_device *);
 809
 810        int (*connect)(struct omap_dss_device *dssdev);
 811        void (*disconnect)(struct omap_dss_device *dssdev);
 812
 813        int (*enable)(struct omap_dss_device *display);
 814        void (*disable)(struct omap_dss_device *display);
 815        int (*run_test)(struct omap_dss_device *display, int test);
 816
 817        int (*update)(struct omap_dss_device *dssdev,
 818                               u16 x, u16 y, u16 w, u16 h);
 819        int (*sync)(struct omap_dss_device *dssdev);
 820
 821        int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
 822        int (*get_te)(struct omap_dss_device *dssdev);
 823
 824        u8 (*get_rotate)(struct omap_dss_device *dssdev);
 825        int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
 826
 827        bool (*get_mirror)(struct omap_dss_device *dssdev);
 828        int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
 829
 830        int (*memory_read)(struct omap_dss_device *dssdev,
 831                        void *buf, size_t size,
 832                        u16 x, u16 y, u16 w, u16 h);
 833
 834        void (*get_resolution)(struct omap_dss_device *dssdev,
 835                        u16 *xres, u16 *yres);
 836        void (*get_dimensions)(struct omap_dss_device *dssdev,
 837                        u32 *width, u32 *height);
 838        int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
 839
 840        int (*check_timings)(struct omap_dss_device *dssdev,
 841                        struct omap_video_timings *timings);
 842        void (*set_timings)(struct omap_dss_device *dssdev,
 843                        struct omap_video_timings *timings);
 844        void (*get_timings)(struct omap_dss_device *dssdev,
 845                        struct omap_video_timings *timings);
 846
 847        int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
 848        u32 (*get_wss)(struct omap_dss_device *dssdev);
 849
 850        int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
 851        bool (*detect)(struct omap_dss_device *dssdev);
 852
 853        /*
 854         * For display drivers that support audio. This encompasses
 855         * HDMI and DisplayPort at the moment.
 856         */
 857        /*
 858         * Note: These functions might sleep. Do not call while
 859         * holding a spinlock/readlock.
 860         */
 861        int (*audio_enable)(struct omap_dss_device *dssdev);
 862        void (*audio_disable)(struct omap_dss_device *dssdev);
 863        bool (*audio_supported)(struct omap_dss_device *dssdev);
 864        int (*audio_config)(struct omap_dss_device *dssdev,
 865                struct omap_dss_audio *audio);
 866        /* Note: These functions may not sleep */
 867        int (*audio_start)(struct omap_dss_device *dssdev);
 868        void (*audio_stop)(struct omap_dss_device *dssdev);
 869
 870};
 871
 872enum omapdss_version omapdss_get_version(void);
 873bool omapdss_is_initialized(void);
 874
 875int omap_dss_register_driver(struct omap_dss_driver *);
 876void omap_dss_unregister_driver(struct omap_dss_driver *);
 877
 878int omapdss_register_display(struct omap_dss_device *dssdev);
 879void omapdss_unregister_display(struct omap_dss_device *dssdev);
 880
 881struct omap_dss_device *omap_dss_get_device(struct omap_dss_device *dssdev);
 882void omap_dss_put_device(struct omap_dss_device *dssdev);
 883#define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
 884struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
 885struct omap_dss_device *omap_dss_find_device(void *data,
 886                int (*match)(struct omap_dss_device *dssdev, void *data));
 887const char *omapdss_get_default_display_name(void);
 888
 889void videomode_to_omap_video_timings(const struct videomode *vm,
 890                struct omap_video_timings *ovt);
 891void omap_video_timings_to_videomode(const struct omap_video_timings *ovt,
 892                struct videomode *vm);
 893
 894int dss_feat_get_num_mgrs(void);
 895int dss_feat_get_num_ovls(void);
 896enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel);
 897enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel);
 898enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane);
 899
 900
 901
 902int omap_dss_get_num_overlay_managers(void);
 903struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
 904
 905int omap_dss_get_num_overlays(void);
 906struct omap_overlay *omap_dss_get_overlay(int num);
 907
 908int omapdss_register_output(struct omap_dss_device *output);
 909void omapdss_unregister_output(struct omap_dss_device *output);
 910struct omap_dss_device *omap_dss_get_output(enum omap_dss_output_id id);
 911struct omap_dss_device *omap_dss_find_output(const char *name);
 912struct omap_dss_device *omap_dss_find_output_by_node(struct device_node *node);
 913int omapdss_output_set_device(struct omap_dss_device *out,
 914                struct omap_dss_device *dssdev);
 915int omapdss_output_unset_device(struct omap_dss_device *out);
 916
 917struct omap_dss_device *omapdss_find_output_from_display(struct omap_dss_device *dssdev);
 918struct omap_overlay_manager *omapdss_find_mgr_from_display(struct omap_dss_device *dssdev);
 919
 920void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
 921                u16 *xres, u16 *yres);
 922int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
 923void omapdss_default_get_timings(struct omap_dss_device *dssdev,
 924                struct omap_video_timings *timings);
 925
 926typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
 927int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
 928int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
 929
 930u32 dispc_read_irqstatus(void);
 931void dispc_clear_irqstatus(u32 mask);
 932u32 dispc_read_irqenable(void);
 933void dispc_write_irqenable(u32 mask);
 934
 935int dispc_request_irq(irq_handler_t handler, void *dev_id);
 936void dispc_free_irq(void *dev_id);
 937
 938int dispc_runtime_get(void);
 939void dispc_runtime_put(void);
 940
 941void dispc_mgr_enable(enum omap_channel channel, bool enable);
 942bool dispc_mgr_is_enabled(enum omap_channel channel);
 943u32 dispc_mgr_get_vsync_irq(enum omap_channel channel);
 944u32 dispc_mgr_get_framedone_irq(enum omap_channel channel);
 945u32 dispc_mgr_get_sync_lost_irq(enum omap_channel channel);
 946bool dispc_mgr_go_busy(enum omap_channel channel);
 947void dispc_mgr_go(enum omap_channel channel);
 948void dispc_mgr_set_lcd_config(enum omap_channel channel,
 949                const struct dss_lcd_mgr_config *config);
 950void dispc_mgr_set_timings(enum omap_channel channel,
 951                const struct omap_video_timings *timings);
 952void dispc_mgr_setup(enum omap_channel channel,
 953                const struct omap_overlay_manager_info *info);
 954
 955int dispc_ovl_check(enum omap_plane plane, enum omap_channel channel,
 956                const struct omap_overlay_info *oi,
 957                const struct omap_video_timings *timings,
 958                int *x_predecim, int *y_predecim);
 959
 960int dispc_ovl_enable(enum omap_plane plane, bool enable);
 961bool dispc_ovl_enabled(enum omap_plane plane);
 962void dispc_ovl_set_channel_out(enum omap_plane plane,
 963                enum omap_channel channel);
 964int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi,
 965                bool replication, const struct omap_video_timings *mgr_timings,
 966                bool mem_to_mem);
 967
 968#define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
 969#define to_dss_device(x) container_of((x), struct omap_dss_device, old_dev)
 970
 971int omapdss_compat_init(void);
 972void omapdss_compat_uninit(void);
 973
 974struct dss_mgr_ops {
 975        int (*connect)(struct omap_overlay_manager *mgr,
 976                struct omap_dss_device *dst);
 977        void (*disconnect)(struct omap_overlay_manager *mgr,
 978                struct omap_dss_device *dst);
 979
 980        void (*start_update)(struct omap_overlay_manager *mgr);
 981        int (*enable)(struct omap_overlay_manager *mgr);
 982        void (*disable)(struct omap_overlay_manager *mgr);
 983        void (*set_timings)(struct omap_overlay_manager *mgr,
 984                        const struct omap_video_timings *timings);
 985        void (*set_lcd_config)(struct omap_overlay_manager *mgr,
 986                        const struct dss_lcd_mgr_config *config);
 987        int (*register_framedone_handler)(struct omap_overlay_manager *mgr,
 988                        void (*handler)(void *), void *data);
 989        void (*unregister_framedone_handler)(struct omap_overlay_manager *mgr,
 990                        void (*handler)(void *), void *data);
 991};
 992
 993int dss_install_mgr_ops(const struct dss_mgr_ops *mgr_ops);
 994void dss_uninstall_mgr_ops(void);
 995
 996int dss_mgr_connect(struct omap_overlay_manager *mgr,
 997                struct omap_dss_device *dst);
 998void dss_mgr_disconnect(struct omap_overlay_manager *mgr,
 999                struct omap_dss_device *dst);
1000void dss_mgr_set_timings(struct omap_overlay_manager *mgr,
1001                const struct omap_video_timings *timings);
1002void dss_mgr_set_lcd_config(struct omap_overlay_manager *mgr,
1003                const struct dss_lcd_mgr_config *config);
1004int dss_mgr_enable(struct omap_overlay_manager *mgr);
1005void dss_mgr_disable(struct omap_overlay_manager *mgr);
1006void dss_mgr_start_update(struct omap_overlay_manager *mgr);
1007int dss_mgr_register_framedone_handler(struct omap_overlay_manager *mgr,
1008                void (*handler)(void *), void *data);
1009void dss_mgr_unregister_framedone_handler(struct omap_overlay_manager *mgr,
1010                void (*handler)(void *), void *data);
1011
1012static inline bool omapdss_device_is_connected(struct omap_dss_device *dssdev)
1013{
1014        return dssdev->src;
1015}
1016
1017static inline bool omapdss_device_is_enabled(struct omap_dss_device *dssdev)
1018{
1019        return dssdev->state == OMAP_DSS_DISPLAY_ACTIVE;
1020}
1021
1022#endif
1023