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9#include <linux/device.h>
10#include <linux/etherdevice.h>
11#include <linux/platform_device.h>
12#include <linux/mtd/mtd.h>
13#include <linux/mtd/partitions.h>
14#include <linux/mtd/physmap.h>
15#include <linux/spi/spi.h>
16#include <linux/spi/flash.h>
17
18#include <linux/i2c.h>
19#include <linux/irq.h>
20#include <linux/interrupt.h>
21#include <asm/dma.h>
22#include <asm/bfin5xx_spi.h>
23#include <asm/reboot.h>
24#include <asm/portmux.h>
25#include <asm/dpmc.h>
26#include <asm/bfin_sdh.h>
27#include <linux/spi/ad7877.h>
28#include <net/dsa.h>
29
30
31
32
33const char bfin_board_name[] = "Bluetechnix TCM-BF518";
34
35
36
37
38
39#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
40static struct mtd_partition tcm_partitions[] = {
41 {
42 .name = "bootloader(nor)",
43 .size = 0x40000,
44 .offset = 0,
45 },
46 {
47 .name = "linux(nor)",
48 .size = 0x1C0000,
49 .offset = MTDPART_OFS_APPEND,
50 }
51};
52
53static struct physmap_flash_data tcm_flash_data = {
54 .width = 2,
55 .parts = tcm_partitions,
56 .nr_parts = ARRAY_SIZE(tcm_partitions),
57};
58
59static struct resource tcm_flash_resource = {
60 .start = 0x20000000,
61 .end = 0x201fffff,
62 .flags = IORESOURCE_MEM,
63};
64
65static struct platform_device tcm_flash_device = {
66 .name = "physmap-flash",
67 .id = 0,
68 .dev = {
69 .platform_data = &tcm_flash_data,
70 },
71 .num_resources = 1,
72 .resource = &tcm_flash_resource,
73};
74#endif
75
76#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
77static struct platform_device rtc_device = {
78 .name = "rtc-bfin",
79 .id = -1,
80};
81#endif
82
83#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
84#include <linux/bfin_mac.h>
85static const unsigned short bfin_mac_peripherals[] = P_MII0;
86
87static struct bfin_phydev_platform_data bfin_phydev_data[] = {
88 {
89 .addr = 1,
90 .irq = IRQ_MAC_PHYINT,
91 },
92};
93
94static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
95 .phydev_number = 1,
96 .phydev_data = bfin_phydev_data,
97 .phy_mode = PHY_INTERFACE_MODE_MII,
98 .mac_peripherals = bfin_mac_peripherals,
99};
100
101static struct platform_device bfin_mii_bus = {
102 .name = "bfin_mii_bus",
103 .dev = {
104 .platform_data = &bfin_mii_bus_data,
105 }
106};
107
108static struct platform_device bfin_mac_device = {
109 .name = "bfin_mac",
110 .dev = {
111 .platform_data = &bfin_mii_bus,
112 }
113};
114#endif
115
116#if defined(CONFIG_MTD_M25P80) \
117 || defined(CONFIG_MTD_M25P80_MODULE)
118static struct mtd_partition bfin_spi_flash_partitions[] = {
119 {
120 .name = "bootloader(spi)",
121 .size = 0x00040000,
122 .offset = 0,
123 .mask_flags = MTD_CAP_ROM
124 }, {
125 .name = "linux kernel(spi)",
126 .size = MTDPART_SIZ_FULL,
127 .offset = MTDPART_OFS_APPEND,
128 }
129};
130
131static struct flash_platform_data bfin_spi_flash_data = {
132 .name = "m25p80",
133 .parts = bfin_spi_flash_partitions,
134 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
135 .type = "m25p16",
136};
137
138
139static struct bfin5xx_spi_chip spi_flash_chip_info = {
140 .enable_dma = 0,
141};
142#endif
143
144#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
145static struct bfin5xx_spi_chip mmc_spi_chip_info = {
146 .enable_dma = 0,
147};
148#endif
149
150#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
151static const struct ad7877_platform_data bfin_ad7877_ts_info = {
152 .model = 7877,
153 .vref_delay_usecs = 50,
154 .x_plate_ohms = 419,
155 .y_plate_ohms = 486,
156 .pressure_max = 1000,
157 .pressure_min = 0,
158 .stopacq_polarity = 1,
159 .first_conversion_delay = 3,
160 .acquisition_time = 1,
161 .averaging = 1,
162 .pen_down_acc_interval = 1,
163};
164#endif
165
166static struct spi_board_info bfin_spi_board_info[] __initdata = {
167#if defined(CONFIG_MTD_M25P80) \
168 || defined(CONFIG_MTD_M25P80_MODULE)
169 {
170
171 .modalias = "m25p80",
172 .max_speed_hz = 25000000,
173 .bus_num = 0,
174 .chip_select = 2,
175 .platform_data = &bfin_spi_flash_data,
176 .controller_data = &spi_flash_chip_info,
177 .mode = SPI_MODE_3,
178 },
179#endif
180
181#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
182 {
183 .modalias = "mmc_spi",
184 .max_speed_hz = 20000000,
185 .bus_num = 0,
186 .chip_select = 5,
187 .controller_data = &mmc_spi_chip_info,
188 .mode = SPI_MODE_3,
189 },
190#endif
191#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
192 {
193 .modalias = "ad7877",
194 .platform_data = &bfin_ad7877_ts_info,
195 .irq = IRQ_PF8,
196 .max_speed_hz = 12500000,
197 .bus_num = 0,
198 .chip_select = 2,
199 },
200#endif
201#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
202 && defined(CONFIG_SND_SOC_WM8731_SPI)
203 {
204 .modalias = "wm8731",
205 .max_speed_hz = 3125000,
206 .bus_num = 0,
207 .chip_select = 5,
208 .mode = SPI_MODE_0,
209 },
210#endif
211#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
212 {
213 .modalias = "spidev",
214 .max_speed_hz = 3125000,
215 .bus_num = 0,
216 .chip_select = 1,
217 },
218#endif
219#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
220 {
221 .modalias = "bfin-lq035q1-spi",
222 .max_speed_hz = 20000000,
223 .bus_num = 0,
224 .chip_select = 1,
225 .mode = SPI_CPHA | SPI_CPOL,
226 },
227#endif
228};
229
230
231#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
232
233static struct bfin5xx_spi_master bfin_spi0_info = {
234 .num_chipselect = 6,
235 .enable_dma = 1,
236 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
237};
238
239static struct resource bfin_spi0_resource[] = {
240 [0] = {
241 .start = SPI0_REGBASE,
242 .end = SPI0_REGBASE + 0xFF,
243 .flags = IORESOURCE_MEM,
244 },
245 [1] = {
246 .start = CH_SPI0,
247 .end = CH_SPI0,
248 .flags = IORESOURCE_DMA,
249 },
250 [2] = {
251 .start = IRQ_SPI0,
252 .end = IRQ_SPI0,
253 .flags = IORESOURCE_IRQ,
254 },
255};
256
257static struct platform_device bfin_spi0_device = {
258 .name = "bfin-spi",
259 .id = 0,
260 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
261 .resource = bfin_spi0_resource,
262 .dev = {
263 .platform_data = &bfin_spi0_info,
264 },
265};
266
267
268static struct bfin5xx_spi_master bfin_spi1_info = {
269 .num_chipselect = 6,
270 .enable_dma = 1,
271 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
272};
273
274static struct resource bfin_spi1_resource[] = {
275 [0] = {
276 .start = SPI1_REGBASE,
277 .end = SPI1_REGBASE + 0xFF,
278 .flags = IORESOURCE_MEM,
279 },
280 [1] = {
281 .start = CH_SPI1,
282 .end = CH_SPI1,
283 .flags = IORESOURCE_DMA,
284 },
285 [2] = {
286 .start = IRQ_SPI1,
287 .end = IRQ_SPI1,
288 .flags = IORESOURCE_IRQ,
289 },
290};
291
292static struct platform_device bfin_spi1_device = {
293 .name = "bfin-spi",
294 .id = 1,
295 .num_resources = ARRAY_SIZE(bfin_spi1_resource),
296 .resource = bfin_spi1_resource,
297 .dev = {
298 .platform_data = &bfin_spi1_info,
299 },
300};
301#endif
302
303#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
304#ifdef CONFIG_SERIAL_BFIN_UART0
305static struct resource bfin_uart0_resources[] = {
306 {
307 .start = UART0_THR,
308 .end = UART0_GCTL+2,
309 .flags = IORESOURCE_MEM,
310 },
311 {
312 .start = IRQ_UART0_TX,
313 .end = IRQ_UART0_TX,
314 .flags = IORESOURCE_IRQ,
315 },
316 {
317 .start = IRQ_UART0_RX,
318 .end = IRQ_UART0_RX,
319 .flags = IORESOURCE_IRQ,
320 },
321 {
322 .start = IRQ_UART0_ERROR,
323 .end = IRQ_UART0_ERROR,
324 .flags = IORESOURCE_IRQ,
325 },
326 {
327 .start = CH_UART0_TX,
328 .end = CH_UART0_TX,
329 .flags = IORESOURCE_DMA,
330 },
331 {
332 .start = CH_UART0_RX,
333 .end = CH_UART0_RX,
334 .flags = IORESOURCE_DMA,
335 },
336};
337
338static unsigned short bfin_uart0_peripherals[] = {
339 P_UART0_TX, P_UART0_RX, 0
340};
341
342static struct platform_device bfin_uart0_device = {
343 .name = "bfin-uart",
344 .id = 0,
345 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
346 .resource = bfin_uart0_resources,
347 .dev = {
348 .platform_data = &bfin_uart0_peripherals,
349 },
350};
351#endif
352#ifdef CONFIG_SERIAL_BFIN_UART1
353static struct resource bfin_uart1_resources[] = {
354 {
355 .start = UART1_THR,
356 .end = UART1_GCTL+2,
357 .flags = IORESOURCE_MEM,
358 },
359 {
360 .start = IRQ_UART1_TX,
361 .end = IRQ_UART1_TX,
362 .flags = IORESOURCE_IRQ,
363 },
364 {
365 .start = IRQ_UART1_RX,
366 .end = IRQ_UART1_RX,
367 .flags = IORESOURCE_IRQ,
368 },
369 {
370 .start = IRQ_UART1_ERROR,
371 .end = IRQ_UART1_ERROR,
372 .flags = IORESOURCE_IRQ,
373 },
374 {
375 .start = CH_UART1_TX,
376 .end = CH_UART1_TX,
377 .flags = IORESOURCE_DMA,
378 },
379 {
380 .start = CH_UART1_RX,
381 .end = CH_UART1_RX,
382 .flags = IORESOURCE_DMA,
383 },
384};
385
386static unsigned short bfin_uart1_peripherals[] = {
387 P_UART1_TX, P_UART1_RX, 0
388};
389
390static struct platform_device bfin_uart1_device = {
391 .name = "bfin-uart",
392 .id = 1,
393 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
394 .resource = bfin_uart1_resources,
395 .dev = {
396 .platform_data = &bfin_uart1_peripherals,
397 },
398};
399#endif
400#endif
401
402#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
403#ifdef CONFIG_BFIN_SIR0
404static struct resource bfin_sir0_resources[] = {
405 {
406 .start = 0xFFC00400,
407 .end = 0xFFC004FF,
408 .flags = IORESOURCE_MEM,
409 },
410 {
411 .start = IRQ_UART0_RX,
412 .end = IRQ_UART0_RX+1,
413 .flags = IORESOURCE_IRQ,
414 },
415 {
416 .start = CH_UART0_RX,
417 .end = CH_UART0_RX+1,
418 .flags = IORESOURCE_DMA,
419 },
420};
421
422static struct platform_device bfin_sir0_device = {
423 .name = "bfin_sir",
424 .id = 0,
425 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
426 .resource = bfin_sir0_resources,
427};
428#endif
429#ifdef CONFIG_BFIN_SIR1
430static struct resource bfin_sir1_resources[] = {
431 {
432 .start = 0xFFC02000,
433 .end = 0xFFC020FF,
434 .flags = IORESOURCE_MEM,
435 },
436 {
437 .start = IRQ_UART1_RX,
438 .end = IRQ_UART1_RX+1,
439 .flags = IORESOURCE_IRQ,
440 },
441 {
442 .start = CH_UART1_RX,
443 .end = CH_UART1_RX+1,
444 .flags = IORESOURCE_DMA,
445 },
446};
447
448static struct platform_device bfin_sir1_device = {
449 .name = "bfin_sir",
450 .id = 1,
451 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
452 .resource = bfin_sir1_resources,
453};
454#endif
455#endif
456
457#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
458static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
459
460static struct resource bfin_twi0_resource[] = {
461 [0] = {
462 .start = TWI0_REGBASE,
463 .end = TWI0_REGBASE,
464 .flags = IORESOURCE_MEM,
465 },
466 [1] = {
467 .start = IRQ_TWI,
468 .end = IRQ_TWI,
469 .flags = IORESOURCE_IRQ,
470 },
471};
472
473static struct platform_device i2c_bfin_twi_device = {
474 .name = "i2c-bfin-twi",
475 .id = 0,
476 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
477 .resource = bfin_twi0_resource,
478 .dev = {
479 .platform_data = &bfin_twi0_pins,
480 },
481};
482#endif
483
484static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
485#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
486 {
487 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
488 },
489#endif
490#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
491 {
492 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
493 .irq = IRQ_PF8,
494 },
495#endif
496};
497
498#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
499#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
500static struct resource bfin_sport0_uart_resources[] = {
501 {
502 .start = SPORT0_TCR1,
503 .end = SPORT0_MRCS3+4,
504 .flags = IORESOURCE_MEM,
505 },
506 {
507 .start = IRQ_SPORT0_RX,
508 .end = IRQ_SPORT0_RX+1,
509 .flags = IORESOURCE_IRQ,
510 },
511 {
512 .start = IRQ_SPORT0_ERROR,
513 .end = IRQ_SPORT0_ERROR,
514 .flags = IORESOURCE_IRQ,
515 },
516};
517
518static unsigned short bfin_sport0_peripherals[] = {
519 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
520 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
521};
522
523static struct platform_device bfin_sport0_uart_device = {
524 .name = "bfin-sport-uart",
525 .id = 0,
526 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
527 .resource = bfin_sport0_uart_resources,
528 .dev = {
529 .platform_data = &bfin_sport0_peripherals,
530 },
531};
532#endif
533#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
534static struct resource bfin_sport1_uart_resources[] = {
535 {
536 .start = SPORT1_TCR1,
537 .end = SPORT1_MRCS3+4,
538 .flags = IORESOURCE_MEM,
539 },
540 {
541 .start = IRQ_SPORT1_RX,
542 .end = IRQ_SPORT1_RX+1,
543 .flags = IORESOURCE_IRQ,
544 },
545 {
546 .start = IRQ_SPORT1_ERROR,
547 .end = IRQ_SPORT1_ERROR,
548 .flags = IORESOURCE_IRQ,
549 },
550};
551
552static unsigned short bfin_sport1_peripherals[] = {
553 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
554 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
555};
556
557static struct platform_device bfin_sport1_uart_device = {
558 .name = "bfin-sport-uart",
559 .id = 1,
560 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
561 .resource = bfin_sport1_uart_resources,
562 .dev = {
563 .platform_data = &bfin_sport1_peripherals,
564 },
565};
566#endif
567#endif
568
569#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
570#include <linux/input.h>
571#include <linux/gpio_keys.h>
572
573static struct gpio_keys_button bfin_gpio_keys_table[] = {
574 {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
575 {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
576};
577
578static struct gpio_keys_platform_data bfin_gpio_keys_data = {
579 .buttons = bfin_gpio_keys_table,
580 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
581};
582
583static struct platform_device bfin_device_gpiokeys = {
584 .name = "gpio-keys",
585 .dev = {
586 .platform_data = &bfin_gpio_keys_data,
587 },
588};
589#endif
590
591#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
592
593static struct bfin_sd_host bfin_sdh_data = {
594 .dma_chan = CH_RSI,
595 .irq_int0 = IRQ_RSI_INT0,
596 .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
597};
598
599static struct platform_device bf51x_sdh_device = {
600 .name = "bfin-sdh",
601 .id = 0,
602 .dev = {
603 .platform_data = &bfin_sdh_data,
604 },
605};
606#endif
607
608static const unsigned int cclk_vlev_datasheet[] =
609{
610 VRPAIR(VLEV_100, 400000000),
611 VRPAIR(VLEV_105, 426000000),
612 VRPAIR(VLEV_110, 500000000),
613 VRPAIR(VLEV_115, 533000000),
614 VRPAIR(VLEV_120, 600000000),
615};
616
617static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
618 .tuple_tab = cclk_vlev_datasheet,
619 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
620 .vr_settling_time = 25 ,
621};
622
623static struct platform_device bfin_dpmc = {
624 .name = "bfin dpmc",
625 .dev = {
626 .platform_data = &bfin_dmpc_vreg_data,
627 },
628};
629
630static struct platform_device *tcm_devices[] __initdata = {
631
632 &bfin_dpmc,
633
634#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
635 &rtc_device,
636#endif
637
638#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
639 &bfin_mii_bus,
640 &bfin_mac_device,
641#endif
642
643#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
644 &bfin_spi0_device,
645 &bfin_spi1_device,
646#endif
647
648#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
649#ifdef CONFIG_SERIAL_BFIN_UART0
650 &bfin_uart0_device,
651#endif
652#ifdef CONFIG_SERIAL_BFIN_UART1
653 &bfin_uart1_device,
654#endif
655#endif
656
657#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
658#ifdef CONFIG_BFIN_SIR0
659 &bfin_sir0_device,
660#endif
661#ifdef CONFIG_BFIN_SIR1
662 &bfin_sir1_device,
663#endif
664#endif
665
666#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
667 &i2c_bfin_twi_device,
668#endif
669
670#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
671#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
672 &bfin_sport0_uart_device,
673#endif
674#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
675 &bfin_sport1_uart_device,
676#endif
677#endif
678
679#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
680 &bfin_device_gpiokeys,
681#endif
682
683#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
684 &bf51x_sdh_device,
685#endif
686
687#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
688 &tcm_flash_device,
689#endif
690};
691
692static int __init tcm_init(void)
693{
694 printk(KERN_INFO "%s(): registering device resources\n", __func__);
695 i2c_register_board_info(0, bfin_i2c_board_info,
696 ARRAY_SIZE(bfin_i2c_board_info));
697 platform_add_devices(tcm_devices, ARRAY_SIZE(tcm_devices));
698 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
699 return 0;
700}
701
702arch_initcall(tcm_init);
703
704static struct platform_device *tcm_early_devices[] __initdata = {
705#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
706#ifdef CONFIG_SERIAL_BFIN_UART0
707 &bfin_uart0_device,
708#endif
709#ifdef CONFIG_SERIAL_BFIN_UART1
710 &bfin_uart1_device,
711#endif
712#endif
713
714#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
715#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
716 &bfin_sport0_uart_device,
717#endif
718#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
719 &bfin_sport1_uart_device,
720#endif
721#endif
722};
723
724void __init native_machine_early_platform_add_devices(void)
725{
726 printk(KERN_INFO "register early platform devices\n");
727 early_platform_add_devices(tcm_early_devices,
728 ARRAY_SIZE(tcm_early_devices));
729}
730
731void native_machine_restart(char *cmd)
732{
733
734 if ((bfin_read_SYSCR() & 0x7) == 0x3)
735 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
736}
737
738int bfin_get_ether_addr(char *addr)
739{
740 return 1;
741}
742EXPORT_SYMBOL(bfin_get_ether_addr);
743
