linux/arch/blackfin/mach-bf548/boards/cm_bf548.c
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   1/*
   2 * Copyright 2004-2009 Analog Devices Inc.
   3 *           2008-2009 Bluetechnix
   4 *                2005 National ICT Australia (NICTA)
   5 *                      Aidan Williams <aidan@nicta.com.au>
   6 *
   7 * Licensed under the GPL-2 or later.
   8 */
   9
  10#include <linux/device.h>
  11#include <linux/platform_device.h>
  12#include <linux/mtd/mtd.h>
  13#include <linux/mtd/partitions.h>
  14#include <linux/mtd/physmap.h>
  15#include <linux/spi/spi.h>
  16#include <linux/spi/flash.h>
  17#include <linux/irq.h>
  18#include <linux/interrupt.h>
  19#include <linux/usb/musb.h>
  20#include <asm/bfin5xx_spi.h>
  21#include <asm/dma.h>
  22#include <asm/gpio.h>
  23#include <asm/nand.h>
  24#include <asm/portmux.h>
  25#include <asm/bfin_sdh.h>
  26#include <mach/bf54x_keys.h>
  27#include <asm/dpmc.h>
  28#include <linux/input.h>
  29#include <linux/spi/ad7877.h>
  30
  31/*
  32 * Name the Board for the /proc/cpuinfo
  33 */
  34const char bfin_board_name[] = "Bluetechnix CM-BF548";
  35
  36/*
  37 *  Driver needs to know address, irq and flag pin.
  38 */
  39
  40#if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
  41
  42#include <mach/bf54x-lq043.h>
  43
  44static struct bfin_bf54xfb_mach_info bf54x_lq043_data = {
  45        .width =        480,
  46        .height =       272,
  47        .xres =         {480, 480, 480},
  48        .yres =         {272, 272, 272},
  49        .bpp =          {24, 24, 24},
  50        .disp =         GPIO_PE3,
  51};
  52
  53static struct resource bf54x_lq043_resources[] = {
  54        {
  55                .start = IRQ_EPPI0_ERR,
  56                .end = IRQ_EPPI0_ERR,
  57                .flags = IORESOURCE_IRQ,
  58        },
  59};
  60
  61static struct platform_device bf54x_lq043_device = {
  62        .name           = "bf54x-lq043",
  63        .id             = -1,
  64        .num_resources  = ARRAY_SIZE(bf54x_lq043_resources),
  65        .resource       = bf54x_lq043_resources,
  66        .dev            = {
  67                .platform_data = &bf54x_lq043_data,
  68        },
  69};
  70#endif
  71
  72#if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
  73static unsigned int bf548_keymap[] = {
  74        KEYVAL(0, 0, KEY_ENTER),
  75        KEYVAL(0, 1, KEY_HELP),
  76        KEYVAL(0, 2, KEY_0),
  77        KEYVAL(0, 3, KEY_BACKSPACE),
  78        KEYVAL(1, 0, KEY_TAB),
  79        KEYVAL(1, 1, KEY_9),
  80        KEYVAL(1, 2, KEY_8),
  81        KEYVAL(1, 3, KEY_7),
  82        KEYVAL(2, 0, KEY_DOWN),
  83        KEYVAL(2, 1, KEY_6),
  84        KEYVAL(2, 2, KEY_5),
  85        KEYVAL(2, 3, KEY_4),
  86        KEYVAL(3, 0, KEY_UP),
  87        KEYVAL(3, 1, KEY_3),
  88        KEYVAL(3, 2, KEY_2),
  89        KEYVAL(3, 3, KEY_1),
  90};
  91
  92static struct bfin_kpad_platform_data bf54x_kpad_data = {
  93        .rows                   = 4,
  94        .cols                   = 4,
  95        .keymap                 = bf548_keymap,
  96        .keymapsize             = ARRAY_SIZE(bf548_keymap),
  97        .repeat                 = 0,
  98        .debounce_time          = 5000, /* ns (5ms) */
  99        .coldrive_time          = 1000, /* ns (1ms) */
 100        .keyup_test_interval    = 50, /* ms (50ms) */
 101};
 102
 103static struct resource bf54x_kpad_resources[] = {
 104        {
 105                .start = IRQ_KEY,
 106                .end = IRQ_KEY,
 107                .flags = IORESOURCE_IRQ,
 108        },
 109};
 110
 111static struct platform_device bf54x_kpad_device = {
 112        .name           = "bf54x-keys",
 113        .id             = -1,
 114        .num_resources  = ARRAY_SIZE(bf54x_kpad_resources),
 115        .resource       = bf54x_kpad_resources,
 116        .dev            = {
 117                .platform_data = &bf54x_kpad_data,
 118        },
 119};
 120#endif
 121
 122#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 123static struct platform_device rtc_device = {
 124        .name = "rtc-bfin",
 125        .id   = -1,
 126};
 127#endif
 128
 129#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 130#ifdef CONFIG_SERIAL_BFIN_UART0
 131static struct resource bfin_uart0_resources[] = {
 132        {
 133                .start = UART0_DLL,
 134                .end = UART0_RBR+2,
 135                .flags = IORESOURCE_MEM,
 136        },
 137        {
 138                .start = IRQ_UART0_TX,
 139                .end = IRQ_UART0_TX,
 140                .flags = IORESOURCE_IRQ,
 141        },
 142        {
 143                .start = IRQ_UART0_RX,
 144                .end = IRQ_UART0_RX,
 145                .flags = IORESOURCE_IRQ,
 146        },
 147        {
 148                .start = IRQ_UART0_ERROR,
 149                .end = IRQ_UART0_ERROR,
 150                .flags = IORESOURCE_IRQ,
 151        },
 152        {
 153                .start = CH_UART0_TX,
 154                .end = CH_UART0_TX,
 155                .flags = IORESOURCE_DMA,
 156        },
 157        {
 158                .start = CH_UART0_RX,
 159                .end = CH_UART0_RX,
 160                .flags = IORESOURCE_DMA,
 161        },
 162};
 163
 164static unsigned short bfin_uart0_peripherals[] = {
 165        P_UART0_TX, P_UART0_RX, 0
 166};
 167
 168static struct platform_device bfin_uart0_device = {
 169        .name = "bfin-uart",
 170        .id = 0,
 171        .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 172        .resource = bfin_uart0_resources,
 173        .dev = {
 174                .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 175        },
 176};
 177#endif
 178#ifdef CONFIG_SERIAL_BFIN_UART1
 179static struct resource bfin_uart1_resources[] = {
 180        {
 181                .start = UART1_DLL,
 182                .end = UART1_RBR+2,
 183                .flags = IORESOURCE_MEM,
 184        },
 185        {
 186                .start = IRQ_UART1_TX,
 187                .end = IRQ_UART1_TX,
 188                .flags = IORESOURCE_IRQ,
 189        },
 190        {
 191                .start = IRQ_UART1_RX,
 192                .end = IRQ_UART1_RX,
 193                .flags = IORESOURCE_IRQ,
 194        },
 195        {
 196                .start = IRQ_UART1_ERROR,
 197                .end = IRQ_UART1_ERROR,
 198                .flags = IORESOURCE_IRQ,
 199        },
 200        {
 201                .start = CH_UART1_TX,
 202                .end = CH_UART1_TX,
 203                .flags = IORESOURCE_DMA,
 204        },
 205        {
 206                .start = CH_UART1_RX,
 207                .end = CH_UART1_RX,
 208                .flags = IORESOURCE_DMA,
 209        },
 210#ifdef CONFIG_BFIN_UART1_CTSRTS
 211        {       /* CTS pin -- 0 means not supported */
 212                .start = GPIO_PE10,
 213                .end = GPIO_PE10,
 214                .flags = IORESOURCE_IO,
 215        },
 216        {       /* RTS pin -- 0 means not supported */
 217                .start = GPIO_PE9,
 218                .end = GPIO_PE9,
 219                .flags = IORESOURCE_IO,
 220        },
 221#endif
 222};
 223
 224static unsigned short bfin_uart1_peripherals[] = {
 225        P_UART1_TX, P_UART1_RX,
 226#ifdef CONFIG_BFIN_UART1_CTSRTS
 227        P_UART1_RTS, P_UART1_CTS,
 228#endif
 229        0
 230};
 231
 232static struct platform_device bfin_uart1_device = {
 233        .name = "bfin-uart",
 234        .id = 1,
 235        .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 236        .resource = bfin_uart1_resources,
 237        .dev = {
 238                .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 239        },
 240};
 241#endif
 242#ifdef CONFIG_SERIAL_BFIN_UART2
 243static struct resource bfin_uart2_resources[] = {
 244        {
 245                .start = UART2_DLL,
 246                .end = UART2_RBR+2,
 247                .flags = IORESOURCE_MEM,
 248        },
 249        {
 250                .start = IRQ_UART2_TX,
 251                .end = IRQ_UART2_TX,
 252                .flags = IORESOURCE_IRQ,
 253        },
 254        {
 255                .start = IRQ_UART2_RX,
 256                .end = IRQ_UART2_RX,
 257                .flags = IORESOURCE_IRQ,
 258        },
 259        {
 260                .start = IRQ_UART2_ERROR,
 261                .end = IRQ_UART2_ERROR,
 262                .flags = IORESOURCE_IRQ,
 263        },
 264        {
 265                .start = CH_UART2_TX,
 266                .end = CH_UART2_TX,
 267                .flags = IORESOURCE_DMA,
 268        },
 269        {
 270                .start = CH_UART2_RX,
 271                .end = CH_UART2_RX,
 272                .flags = IORESOURCE_DMA,
 273        },
 274};
 275
 276static unsigned short bfin_uart2_peripherals[] = {
 277        P_UART2_TX, P_UART2_RX, 0
 278};
 279
 280static struct platform_device bfin_uart2_device = {
 281        .name = "bfin-uart",
 282        .id = 2,
 283        .num_resources = ARRAY_SIZE(bfin_uart2_resources),
 284        .resource = bfin_uart2_resources,
 285        .dev = {
 286                .platform_data = &bfin_uart2_peripherals, /* Passed to driver */
 287        },
 288};
 289#endif
 290#ifdef CONFIG_SERIAL_BFIN_UART3
 291static struct resource bfin_uart3_resources[] = {
 292        {
 293                .start = UART3_DLL,
 294                .end = UART3_RBR+2,
 295                .flags = IORESOURCE_MEM,
 296        },
 297        {
 298                .start = IRQ_UART3_TX,
 299                .end = IRQ_UART3_TX,
 300                .flags = IORESOURCE_IRQ,
 301        },
 302        {
 303                .start = IRQ_UART3_RX,
 304                .end = IRQ_UART3_RX,
 305                .flags = IORESOURCE_IRQ,
 306        },
 307        {
 308                .start = IRQ_UART3_ERROR,
 309                .end = IRQ_UART3_ERROR,
 310                .flags = IORESOURCE_IRQ,
 311        },
 312        {
 313                .start = CH_UART3_TX,
 314                .end = CH_UART3_TX,
 315                .flags = IORESOURCE_DMA,
 316        },
 317        {
 318                .start = CH_UART3_RX,
 319                .end = CH_UART3_RX,
 320                .flags = IORESOURCE_DMA,
 321        },
 322#ifdef CONFIG_BFIN_UART3_CTSRTS
 323        {       /* CTS pin -- 0 means not supported */
 324                .start = GPIO_PB3,
 325                .end = GPIO_PB3,
 326                .flags = IORESOURCE_IO,
 327        },
 328        {       /* RTS pin -- 0 means not supported */
 329                .start = GPIO_PB2,
 330                .end = GPIO_PB2,
 331                .flags = IORESOURCE_IO,
 332        },
 333#endif
 334};
 335
 336static unsigned short bfin_uart3_peripherals[] = {
 337        P_UART3_TX, P_UART3_RX,
 338#ifdef CONFIG_BFIN_UART3_CTSRTS
 339        P_UART3_RTS, P_UART3_CTS,
 340#endif
 341        0
 342};
 343
 344static struct platform_device bfin_uart3_device = {
 345        .name = "bfin-uart",
 346        .id = 3,
 347        .num_resources = ARRAY_SIZE(bfin_uart3_resources),
 348        .resource = bfin_uart3_resources,
 349        .dev = {
 350                .platform_data = &bfin_uart3_peripherals, /* Passed to driver */
 351        },
 352};
 353#endif
 354#endif
 355
 356#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 357#ifdef CONFIG_BFIN_SIR0
 358static struct resource bfin_sir0_resources[] = {
 359        {
 360                .start = 0xFFC00400,
 361                .end = 0xFFC004FF,
 362                .flags = IORESOURCE_MEM,
 363        },
 364        {
 365                .start = IRQ_UART0_RX,
 366                .end = IRQ_UART0_RX+1,
 367                .flags = IORESOURCE_IRQ,
 368        },
 369        {
 370                .start = CH_UART0_RX,
 371                .end = CH_UART0_RX+1,
 372                .flags = IORESOURCE_DMA,
 373        },
 374};
 375static struct platform_device bfin_sir0_device = {
 376        .name = "bfin_sir",
 377        .id = 0,
 378        .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 379        .resource = bfin_sir0_resources,
 380};
 381#endif
 382#ifdef CONFIG_BFIN_SIR1
 383static struct resource bfin_sir1_resources[] = {
 384        {
 385                .start = 0xFFC02000,
 386                .end = 0xFFC020FF,
 387                .flags = IORESOURCE_MEM,
 388        },
 389        {
 390                .start = IRQ_UART1_RX,
 391                .end = IRQ_UART1_RX+1,
 392                .flags = IORESOURCE_IRQ,
 393        },
 394        {
 395                .start = CH_UART1_RX,
 396                .end = CH_UART1_RX+1,
 397                .flags = IORESOURCE_DMA,
 398        },
 399};
 400static struct platform_device bfin_sir1_device = {
 401        .name = "bfin_sir",
 402        .id = 1,
 403        .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 404        .resource = bfin_sir1_resources,
 405};
 406#endif
 407#ifdef CONFIG_BFIN_SIR2
 408static struct resource bfin_sir2_resources[] = {
 409        {
 410                .start = 0xFFC02100,
 411                .end = 0xFFC021FF,
 412                .flags = IORESOURCE_MEM,
 413        },
 414        {
 415                .start = IRQ_UART2_RX,
 416                .end = IRQ_UART2_RX+1,
 417                .flags = IORESOURCE_IRQ,
 418        },
 419        {
 420                .start = CH_UART2_RX,
 421                .end = CH_UART2_RX+1,
 422                .flags = IORESOURCE_DMA,
 423        },
 424};
 425static struct platform_device bfin_sir2_device = {
 426        .name = "bfin_sir",
 427        .id = 2,
 428        .num_resources = ARRAY_SIZE(bfin_sir2_resources),
 429        .resource = bfin_sir2_resources,
 430};
 431#endif
 432#ifdef CONFIG_BFIN_SIR3
 433static struct resource bfin_sir3_resources[] = {
 434        {
 435                .start = 0xFFC03100,
 436                .end = 0xFFC031FF,
 437                .flags = IORESOURCE_MEM,
 438        },
 439        {
 440                .start = IRQ_UART3_RX,
 441                .end = IRQ_UART3_RX+1,
 442                .flags = IORESOURCE_IRQ,
 443        },
 444        {
 445                .start = CH_UART3_RX,
 446                .end = CH_UART3_RX+1,
 447                .flags = IORESOURCE_DMA,
 448        },
 449};
 450static struct platform_device bfin_sir3_device = {
 451        .name = "bfin_sir",
 452        .id = 3,
 453        .num_resources = ARRAY_SIZE(bfin_sir3_resources),
 454        .resource = bfin_sir3_resources,
 455};
 456#endif
 457#endif
 458
 459#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
 460#include <linux/smsc911x.h>
 461
 462static struct resource smsc911x_resources[] = {
 463        {
 464                .name = "smsc911x-memory",
 465                .start = 0x24000000,
 466                .end = 0x24000000 + 0xFF,
 467                .flags = IORESOURCE_MEM,
 468        },
 469        {
 470                .start = IRQ_PE6,
 471                .end = IRQ_PE6,
 472                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
 473        },
 474};
 475
 476static struct smsc911x_platform_config smsc911x_config = {
 477        .flags = SMSC911X_USE_16BIT,
 478        .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
 479        .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
 480        .phy_interface = PHY_INTERFACE_MODE_MII,
 481};
 482
 483static struct platform_device smsc911x_device = {
 484        .name = "smsc911x",
 485        .id = 0,
 486        .num_resources = ARRAY_SIZE(smsc911x_resources),
 487        .resource = smsc911x_resources,
 488        .dev = {
 489                .platform_data = &smsc911x_config,
 490        },
 491};
 492#endif
 493
 494#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
 495static struct resource musb_resources[] = {
 496        [0] = {
 497                .start  = 0xFFC03C00,
 498                .end    = 0xFFC040FF,
 499                .flags  = IORESOURCE_MEM,
 500        },
 501        [1] = { /* general IRQ */
 502                .start  = IRQ_USB_INT0,
 503                .end    = IRQ_USB_INT0,
 504                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 505                .name   = "mc"
 506        },
 507        [2] = { /* DMA IRQ */
 508                .start  = IRQ_USB_DMA,
 509                .end    = IRQ_USB_DMA,
 510                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 511                .name   = "dma"
 512        },
 513};
 514
 515static struct musb_hdrc_config musb_config = {
 516        .multipoint     = 0,
 517        .dyn_fifo       = 0,
 518        .soft_con       = 1,
 519        .dma            = 1,
 520        .num_eps        = 8,
 521        .dma_channels   = 8,
 522        .gpio_vrsel     = GPIO_PH6,
 523        /* Some custom boards need to be active low, just set it to "0"
 524         * if it is the case.
 525         */
 526        .gpio_vrsel_active      = 1,
 527        .clkin          = 24,           /* musb CLKIN in MHZ */
 528};
 529
 530static struct musb_hdrc_platform_data musb_plat = {
 531#if defined(CONFIG_USB_MUSB_OTG)
 532        .mode           = MUSB_OTG,
 533#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
 534        .mode           = MUSB_HOST,
 535#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
 536        .mode           = MUSB_PERIPHERAL,
 537#endif
 538        .config         = &musb_config,
 539};
 540
 541static u64 musb_dmamask = ~(u32)0;
 542
 543static struct platform_device musb_device = {
 544        .name           = "musb-blackfin",
 545        .id             = 0,
 546        .dev = {
 547                .dma_mask               = &musb_dmamask,
 548                .coherent_dma_mask      = 0xffffffff,
 549                .platform_data          = &musb_plat,
 550        },
 551        .num_resources  = ARRAY_SIZE(musb_resources),
 552        .resource       = musb_resources,
 553};
 554#endif
 555
 556#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 557#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 558static struct resource bfin_sport0_uart_resources[] = {
 559        {
 560                .start = SPORT0_TCR1,
 561                .end = SPORT0_MRCS3+4,
 562                .flags = IORESOURCE_MEM,
 563        },
 564        {
 565                .start = IRQ_SPORT0_RX,
 566                .end = IRQ_SPORT0_RX+1,
 567                .flags = IORESOURCE_IRQ,
 568        },
 569        {
 570                .start = IRQ_SPORT0_ERROR,
 571                .end = IRQ_SPORT0_ERROR,
 572                .flags = IORESOURCE_IRQ,
 573        },
 574};
 575
 576static unsigned short bfin_sport0_peripherals[] = {
 577        P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 578        P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
 579};
 580
 581static struct platform_device bfin_sport0_uart_device = {
 582        .name = "bfin-sport-uart",
 583        .id = 0,
 584        .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
 585        .resource = bfin_sport0_uart_resources,
 586        .dev = {
 587                .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
 588        },
 589};
 590#endif
 591#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 592static struct resource bfin_sport1_uart_resources[] = {
 593        {
 594                .start = SPORT1_TCR1,
 595                .end = SPORT1_MRCS3+4,
 596                .flags = IORESOURCE_MEM,
 597        },
 598        {
 599                .start = IRQ_SPORT1_RX,
 600                .end = IRQ_SPORT1_RX+1,
 601                .flags = IORESOURCE_IRQ,
 602        },
 603        {
 604                .start = IRQ_SPORT1_ERROR,
 605                .end = IRQ_SPORT1_ERROR,
 606                .flags = IORESOURCE_IRQ,
 607        },
 608};
 609
 610static unsigned short bfin_sport1_peripherals[] = {
 611        P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 612        P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
 613};
 614
 615static struct platform_device bfin_sport1_uart_device = {
 616        .name = "bfin-sport-uart",
 617        .id = 1,
 618        .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
 619        .resource = bfin_sport1_uart_resources,
 620        .dev = {
 621                .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
 622        },
 623};
 624#endif
 625#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
 626static struct resource bfin_sport2_uart_resources[] = {
 627        {
 628                .start = SPORT2_TCR1,
 629                .end = SPORT2_MRCS3+4,
 630                .flags = IORESOURCE_MEM,
 631        },
 632        {
 633                .start = IRQ_SPORT2_RX,
 634                .end = IRQ_SPORT2_RX+1,
 635                .flags = IORESOURCE_IRQ,
 636        },
 637        {
 638                .start = IRQ_SPORT2_ERROR,
 639                .end = IRQ_SPORT2_ERROR,
 640                .flags = IORESOURCE_IRQ,
 641        },
 642};
 643
 644static unsigned short bfin_sport2_peripherals[] = {
 645        P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
 646        P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
 647};
 648
 649static struct platform_device bfin_sport2_uart_device = {
 650        .name = "bfin-sport-uart",
 651        .id = 2,
 652        .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
 653        .resource = bfin_sport2_uart_resources,
 654        .dev = {
 655                .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
 656        },
 657};
 658#endif
 659#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
 660static struct resource bfin_sport3_uart_resources[] = {
 661        {
 662                .start = SPORT3_TCR1,
 663                .end = SPORT3_MRCS3+4,
 664                .flags = IORESOURCE_MEM,
 665        },
 666        {
 667                .start = IRQ_SPORT3_RX,
 668                .end = IRQ_SPORT3_RX+1,
 669                .flags = IORESOURCE_IRQ,
 670        },
 671        {
 672                .start = IRQ_SPORT3_ERROR,
 673                .end = IRQ_SPORT3_ERROR,
 674                .flags = IORESOURCE_IRQ,
 675        },
 676};
 677
 678static unsigned short bfin_sport3_peripherals[] = {
 679        P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS,
 680        P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0
 681};
 682
 683static struct platform_device bfin_sport3_uart_device = {
 684        .name = "bfin-sport-uart",
 685        .id = 3,
 686        .num_resources = ARRAY_SIZE(bfin_sport3_uart_resources),
 687        .resource = bfin_sport3_uart_resources,
 688        .dev = {
 689                .platform_data = &bfin_sport3_peripherals, /* Passed to driver */
 690        },
 691};
 692#endif
 693#endif
 694
 695#if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
 696static struct resource bfin_atapi_resources[] = {
 697        {
 698                .start = 0xFFC03800,
 699                .end = 0xFFC0386F,
 700                .flags = IORESOURCE_MEM,
 701        },
 702        {
 703                .start = IRQ_ATAPI_ERR,
 704                .end = IRQ_ATAPI_ERR,
 705                .flags = IORESOURCE_IRQ,
 706        },
 707};
 708
 709static struct platform_device bfin_atapi_device = {
 710        .name = "pata-bf54x",
 711        .id = -1,
 712        .num_resources = ARRAY_SIZE(bfin_atapi_resources),
 713        .resource = bfin_atapi_resources,
 714};
 715#endif
 716
 717#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 718static struct mtd_partition partition_info[] = {
 719        {
 720                .name = "linux kernel(nand)",
 721                .offset = 0,
 722                .size = 4 * 1024 * 1024,
 723        },
 724        {
 725                .name = "file system(nand)",
 726                .offset = 4 * 1024 * 1024,
 727                .size = (256 - 4) * 1024 * 1024,
 728        },
 729};
 730
 731static struct bf5xx_nand_platform bf5xx_nand_platform = {
 732        .data_width = NFC_NWIDTH_8,
 733        .partitions = partition_info,
 734        .nr_partitions = ARRAY_SIZE(partition_info),
 735        .rd_dly = 3,
 736        .wr_dly = 3,
 737};
 738
 739static struct resource bf5xx_nand_resources[] = {
 740        {
 741                .start = 0xFFC03B00,
 742                .end = 0xFFC03B4F,
 743                .flags = IORESOURCE_MEM,
 744        },
 745        {
 746                .start = CH_NFC,
 747                .end = CH_NFC,
 748                .flags = IORESOURCE_IRQ,
 749        },
 750};
 751
 752static struct platform_device bf5xx_nand_device = {
 753        .name = "bf5xx-nand",
 754        .id = 0,
 755        .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
 756        .resource = bf5xx_nand_resources,
 757        .dev = {
 758                .platform_data = &bf5xx_nand_platform,
 759        },
 760};
 761#endif
 762
 763#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
 764static struct bfin_sd_host bfin_sdh_data = {
 765        .dma_chan = CH_SDH,
 766        .irq_int0 = IRQ_SDH_MASK0,
 767        .pin_req = {P_SD_D0, P_SD_D1, P_SD_D2, P_SD_D3, P_SD_CLK, P_SD_CMD, 0},
 768};
 769
 770static struct platform_device bf54x_sdh_device = {
 771        .name = "bfin-sdh",
 772        .id = 0,
 773        .dev = {
 774                .platform_data = &bfin_sdh_data,
 775        },
 776};
 777#endif
 778
 779#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
 780static unsigned short bfin_can_peripherals[] = {
 781        P_CAN0_RX, P_CAN0_TX, 0
 782};
 783
 784static struct resource bfin_can_resources[] = {
 785        {
 786                .start = 0xFFC02A00,
 787                .end = 0xFFC02FFF,
 788                .flags = IORESOURCE_MEM,
 789        },
 790        {
 791                .start = IRQ_CAN0_RX,
 792                .end = IRQ_CAN0_RX,
 793                .flags = IORESOURCE_IRQ,
 794        },
 795        {
 796                .start = IRQ_CAN0_TX,
 797                .end = IRQ_CAN0_TX,
 798                .flags = IORESOURCE_IRQ,
 799        },
 800        {
 801                .start = IRQ_CAN0_ERROR,
 802                .end = IRQ_CAN0_ERROR,
 803                .flags = IORESOURCE_IRQ,
 804        },
 805};
 806
 807static struct platform_device bfin_can_device = {
 808        .name = "bfin_can",
 809        .num_resources = ARRAY_SIZE(bfin_can_resources),
 810        .resource = bfin_can_resources,
 811        .dev = {
 812                .platform_data = &bfin_can_peripherals, /* Passed to driver */
 813        },
 814};
 815#endif
 816
 817#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 818static struct mtd_partition para_partitions[] = {
 819        {
 820                .name       = "bootloader(nor)",
 821                .size       = 0x40000,
 822                .offset     = 0,
 823        }, {
 824                .name       = "linux kernel(nor)",
 825                .size       = 0x100000,
 826                .offset     = MTDPART_OFS_APPEND,
 827        }, {
 828                .name       = "file system(nor)",
 829                .size       = MTDPART_SIZ_FULL,
 830                .offset     = MTDPART_OFS_APPEND,
 831        }
 832};
 833
 834static struct physmap_flash_data para_flash_data = {
 835        .width      = 2,
 836        .parts      = para_partitions,
 837        .nr_parts   = ARRAY_SIZE(para_partitions),
 838};
 839
 840static struct resource para_flash_resource = {
 841        .start = 0x20000000,
 842        .end   = 0x207fffff,
 843        .flags = IORESOURCE_MEM,
 844};
 845
 846static struct platform_device para_flash_device = {
 847        .name          = "physmap-flash",
 848        .id            = 0,
 849        .dev = {
 850                .platform_data = &para_flash_data,
 851        },
 852        .num_resources = 1,
 853        .resource      = &para_flash_resource,
 854};
 855#endif
 856
 857#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
 858/* all SPI peripherals info goes here */
 859#if defined(CONFIG_MTD_M25P80) \
 860        || defined(CONFIG_MTD_M25P80_MODULE)
 861/* SPI flash chip (m25p16) */
 862static struct mtd_partition bfin_spi_flash_partitions[] = {
 863        {
 864                .name = "bootloader(spi)",
 865                .size = 0x00040000,
 866                .offset = 0,
 867                .mask_flags = MTD_CAP_ROM
 868        }, {
 869                .name = "linux kernel(spi)",
 870                .size = 0x1c0000,
 871                .offset = 0x40000
 872        }
 873};
 874
 875static struct flash_platform_data bfin_spi_flash_data = {
 876        .name = "m25p80",
 877        .parts = bfin_spi_flash_partitions,
 878        .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 879        .type = "m25p16",
 880};
 881
 882static struct bfin5xx_spi_chip spi_flash_chip_info = {
 883        .enable_dma = 0,         /* use dma transfer with this chip*/
 884};
 885#endif
 886
 887#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 888static const struct ad7877_platform_data bfin_ad7877_ts_info = {
 889        .model                  = 7877,
 890        .vref_delay_usecs       = 50,   /* internal, no capacitor */
 891        .x_plate_ohms           = 419,
 892        .y_plate_ohms           = 486,
 893        .pressure_max           = 1000,
 894        .pressure_min           = 0,
 895        .stopacq_polarity       = 1,
 896        .first_conversion_delay = 3,
 897        .acquisition_time       = 1,
 898        .averaging              = 1,
 899        .pen_down_acc_interval  = 1,
 900};
 901#endif
 902
 903static struct spi_board_info bf54x_spi_board_info[] __initdata = {
 904#if defined(CONFIG_MTD_M25P80) \
 905        || defined(CONFIG_MTD_M25P80_MODULE)
 906        {
 907                /* the modalias must be the same as spi device driver name */
 908                .modalias = "m25p80", /* Name of spi_driver for this device */
 909                .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 910                .bus_num = 0, /* Framework bus number */
 911                .chip_select = 1, /* SPI_SSEL1*/
 912                .platform_data = &bfin_spi_flash_data,
 913                .controller_data = &spi_flash_chip_info,
 914                .mode = SPI_MODE_3,
 915        },
 916#endif
 917#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 918{
 919        .modalias               = "ad7877",
 920        .platform_data          = &bfin_ad7877_ts_info,
 921        .irq                    = IRQ_PJ11,
 922        .max_speed_hz           = 12500000,     /* max spi clock (SCK) speed in HZ */
 923        .bus_num                = 0,
 924        .chip_select            = 2,
 925},
 926#endif
 927#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 928        {
 929                .modalias = "spidev",
 930                .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 931                .bus_num = 0,
 932                .chip_select = 1,
 933        },
 934#endif
 935};
 936
 937/* SPI (0) */
 938static struct resource bfin_spi0_resource[] = {
 939        [0] = {
 940                .start = SPI0_REGBASE,
 941                .end   = SPI0_REGBASE + 0xFF,
 942                .flags = IORESOURCE_MEM,
 943        },
 944        [1] = {
 945                .start = CH_SPI0,
 946                .end   = CH_SPI0,
 947                .flags = IORESOURCE_DMA,
 948        },
 949        [2] = {
 950                .start = IRQ_SPI0,
 951                .end   = IRQ_SPI0,
 952                .flags = IORESOURCE_IRQ,
 953        }
 954};
 955
 956/* SPI (1) */
 957static struct resource bfin_spi1_resource[] = {
 958        [0] = {
 959                .start = SPI1_REGBASE,
 960                .end   = SPI1_REGBASE + 0xFF,
 961                .flags = IORESOURCE_MEM,
 962        },
 963        [1] = {
 964                .start = CH_SPI1,
 965                .end   = CH_SPI1,
 966                .flags = IORESOURCE_DMA,
 967        },
 968        [2] = {
 969                .start = IRQ_SPI1,
 970                .end   = IRQ_SPI1,
 971                .flags = IORESOURCE_IRQ,
 972        }
 973};
 974
 975/* SPI controller data */
 976static struct bfin5xx_spi_master bf54x_spi_master_info0 = {
 977        .num_chipselect = 4,
 978        .enable_dma = 1,  /* master has the ability to do dma transfer */
 979        .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 980};
 981
 982static struct platform_device bf54x_spi_master0 = {
 983        .name = "bfin-spi",
 984        .id = 0, /* Bus number */
 985        .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 986        .resource = bfin_spi0_resource,
 987        .dev = {
 988                .platform_data = &bf54x_spi_master_info0, /* Passed to driver */
 989                },
 990};
 991
 992static struct bfin5xx_spi_master bf54x_spi_master_info1 = {
 993        .num_chipselect = 4,
 994        .enable_dma = 1,  /* master has the ability to do dma transfer */
 995        .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
 996};
 997
 998static struct platform_device bf54x_spi_master1 = {
 999        .name = "bfin-spi",
1000        .id = 1, /* Bus number */
1001        .num_resources = ARRAY_SIZE(bfin_spi1_resource),
1002        .resource = bfin_spi1_resource,
1003        .dev = {
1004                .platform_data = &bf54x_spi_master_info1, /* Passed to driver */
1005                },
1006};
1007#endif  /* spi master and devices */
1008
1009#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1010static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
1011
1012static struct resource bfin_twi0_resource[] = {
1013        [0] = {
1014                .start = TWI0_REGBASE,
1015                .end   = TWI0_REGBASE + 0xFF,
1016                .flags = IORESOURCE_MEM,
1017        },
1018        [1] = {
1019                .start = IRQ_TWI0,
1020                .end   = IRQ_TWI0,
1021                .flags = IORESOURCE_IRQ,
1022        },
1023};
1024
1025static struct platform_device i2c_bfin_twi0_device = {
1026        .name = "i2c-bfin-twi",
1027        .id = 0,
1028        .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1029        .resource = bfin_twi0_resource,
1030        .dev = {
1031                .platform_data = &bfin_twi0_pins,
1032        },
1033};
1034
1035#if !defined(CONFIG_BF542)      /* The BF542 only has 1 TWI */
1036static const u16 bfin_twi1_pins[] = {P_TWI1_SCL, P_TWI1_SDA, 0};
1037
1038static struct resource bfin_twi1_resource[] = {
1039        [0] = {
1040                .start = TWI1_REGBASE,
1041                .end   = TWI1_REGBASE + 0xFF,
1042                .flags = IORESOURCE_MEM,
1043        },
1044        [1] = {
1045                .start = IRQ_TWI1,
1046                .end   = IRQ_TWI1,
1047                .flags = IORESOURCE_IRQ,
1048        },
1049};
1050
1051static struct platform_device i2c_bfin_twi1_device = {
1052        .name = "i2c-bfin-twi",
1053        .id = 1,
1054        .num_resources = ARRAY_SIZE(bfin_twi1_resource),
1055        .resource = bfin_twi1_resource,
1056        .dev = {
1057                .platform_data = &bfin_twi1_pins,
1058        },
1059};
1060#endif
1061#endif
1062
1063#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1064#include <linux/gpio_keys.h>
1065
1066static struct gpio_keys_button bfin_gpio_keys_table[] = {
1067        {BTN_0, GPIO_PH7, 1, "gpio-keys: BTN0"},
1068};
1069
1070static struct gpio_keys_platform_data bfin_gpio_keys_data = {
1071        .buttons        = bfin_gpio_keys_table,
1072        .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
1073};
1074
1075static struct platform_device bfin_device_gpiokeys = {
1076        .name      = "gpio-keys",
1077        .dev = {
1078                .platform_data = &bfin_gpio_keys_data,
1079        },
1080};
1081#endif
1082
1083static const unsigned int cclk_vlev_datasheet[] =
1084{
1085/*
1086 * Internal VLEV BF54XSBBC1533
1087 ****temporarily using these values until data sheet is updated
1088 */
1089        VRPAIR(VLEV_085, 150000000),
1090        VRPAIR(VLEV_090, 250000000),
1091        VRPAIR(VLEV_110, 276000000),
1092        VRPAIR(VLEV_115, 301000000),
1093        VRPAIR(VLEV_120, 525000000),
1094        VRPAIR(VLEV_125, 550000000),
1095        VRPAIR(VLEV_130, 600000000),
1096};
1097
1098static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1099        .tuple_tab = cclk_vlev_datasheet,
1100        .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1101        .vr_settling_time = 25 /* us */,
1102};
1103
1104static struct platform_device bfin_dpmc = {
1105        .name = "bfin dpmc",
1106        .dev = {
1107                .platform_data = &bfin_dmpc_vreg_data,
1108        },
1109};
1110
1111static struct platform_device *cm_bf548_devices[] __initdata = {
1112
1113        &bfin_dpmc,
1114
1115#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1116        &rtc_device,
1117#endif
1118
1119#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
1120#ifdef CONFIG_SERIAL_BFIN_UART0
1121        &bfin_uart0_device,
1122#endif
1123#ifdef CONFIG_SERIAL_BFIN_UART1
1124        &bfin_uart1_device,
1125#endif
1126#ifdef CONFIG_SERIAL_BFIN_UART2
1127        &bfin_uart2_device,
1128#endif
1129#ifdef CONFIG_SERIAL_BFIN_UART3
1130        &bfin_uart3_device,
1131#endif
1132#endif
1133
1134#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
1135#ifdef CONFIG_BFIN_SIR0
1136        &bfin_sir0_device,
1137#endif
1138#ifdef CONFIG_BFIN_SIR1
1139        &bfin_sir1_device,
1140#endif
1141#ifdef CONFIG_BFIN_SIR2
1142        &bfin_sir2_device,
1143#endif
1144#ifdef CONFIG_BFIN_SIR3
1145        &bfin_sir3_device,
1146#endif
1147#endif
1148
1149#if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
1150        &bf54x_lq043_device,
1151#endif
1152
1153#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
1154        &smsc911x_device,
1155#endif
1156
1157#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
1158        &musb_device,
1159#endif
1160
1161#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1162#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1163        &bfin_sport0_uart_device,
1164#endif
1165#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1166        &bfin_sport1_uart_device,
1167#endif
1168#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1169        &bfin_sport2_uart_device,
1170#endif
1171#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
1172        &bfin_sport3_uart_device,
1173#endif
1174#endif
1175
1176#if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
1177        &bfin_atapi_device,
1178#endif
1179
1180#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
1181        &bf5xx_nand_device,
1182#endif
1183
1184#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
1185        &bf54x_sdh_device,
1186#endif
1187
1188#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
1189        &bf54x_spi_master0,
1190        &bf54x_spi_master1,
1191#endif
1192
1193#if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
1194        &bf54x_kpad_device,
1195#endif
1196
1197#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1198        &i2c_bfin_twi0_device,
1199#if !defined(CONFIG_BF542)
1200        &i2c_bfin_twi1_device,
1201#endif
1202#endif
1203
1204#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1205        &bfin_device_gpiokeys,
1206#endif
1207
1208#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
1209        &para_flash_device,
1210#endif
1211
1212#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
1213        &bfin_can_device,
1214#endif
1215
1216};
1217
1218static int __init cm_bf548_init(void)
1219{
1220        printk(KERN_INFO "%s(): registering device resources\n", __func__);
1221        platform_add_devices(cm_bf548_devices, ARRAY_SIZE(cm_bf548_devices));
1222
1223#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
1224        spi_register_board_info(bf54x_spi_board_info,
1225                        ARRAY_SIZE(bf54x_spi_board_info));
1226#endif
1227
1228        return 0;
1229}
1230
1231arch_initcall(cm_bf548_init);
1232
1233static struct platform_device *cm_bf548_early_devices[] __initdata = {
1234#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1235#ifdef CONFIG_SERIAL_BFIN_UART0
1236        &bfin_uart0_device,
1237#endif
1238#ifdef CONFIG_SERIAL_BFIN_UART1
1239        &bfin_uart1_device,
1240#endif
1241#ifdef CONFIG_SERIAL_BFIN_UART2
1242        &bfin_uart2_device,
1243#endif
1244#ifdef CONFIG_SERIAL_BFIN_UART3
1245        &bfin_uart3_device,
1246#endif
1247#endif
1248
1249#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
1250#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1251        &bfin_sport0_uart_device,
1252#endif
1253#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1254        &bfin_sport1_uart_device,
1255#endif
1256#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1257        &bfin_sport2_uart_device,
1258#endif
1259#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
1260        &bfin_sport3_uart_device,
1261#endif
1262#endif
1263};
1264
1265void __init native_machine_early_platform_add_devices(void)
1266{
1267        printk(KERN_INFO "register early platform devices\n");
1268        early_platform_add_devices(cm_bf548_early_devices,
1269                ARRAY_SIZE(cm_bf548_early_devices));
1270}
1271