linux/arch/frv/kernel/gdb-io.h
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   1/* gdb-io.h: FR403 GDB I/O port defs
   2 *
   3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
   4 * Written by David Howells (dhowells@redhat.com)
   5 *
   6 * This program is free software; you can redistribute it and/or
   7 * modify it under the terms of the GNU General Public License
   8 * as published by the Free Software Foundation; either version
   9 * 2 of the License, or (at your option) any later version.
  10 */
  11
  12#ifndef _GDB_IO_H
  13#define _GDB_IO_H
  14
  15#include <asm/serial-regs.h>
  16
  17#undef UART_RX
  18#undef UART_TX
  19#undef UART_DLL
  20#undef UART_DLM
  21#undef UART_IER
  22#undef UART_IIR
  23#undef UART_FCR
  24#undef UART_LCR
  25#undef UART_MCR
  26#undef UART_LSR
  27#undef UART_MSR
  28#undef UART_SCR
  29
  30#define UART_RX         0*8     /* In:  Receive buffer (DLAB=0) */
  31#define UART_TX         0*8     /* Out: Transmit buffer (DLAB=0) */
  32#define UART_DLL        0*8     /* Out: Divisor Latch Low (DLAB=1) */
  33#define UART_DLM        1*8     /* Out: Divisor Latch High (DLAB=1) */
  34#define UART_IER        1*8     /* Out: Interrupt Enable Register */
  35#define UART_IIR        2*8     /* In:  Interrupt ID Register */
  36#define UART_FCR        2*8     /* Out: FIFO Control Register */
  37#define UART_LCR        3*8     /* Out: Line Control Register */
  38#define UART_MCR        4*8     /* Out: Modem Control Register */
  39#define UART_LSR        5*8     /* In:  Line Status Register */
  40#define UART_MSR        6*8     /* In:  Modem Status Register */
  41#define UART_SCR        7*8     /* I/O: Scratch Register */
  42
  43#define UART_LCR_DLAB   0x80    /* Divisor latch access bit */
  44#define UART_LCR_SBC    0x40    /* Set break control */
  45#define UART_LCR_SPAR   0x20    /* Stick parity (?) */
  46#define UART_LCR_EPAR   0x10    /* Even parity select */
  47#define UART_LCR_PARITY 0x08    /* Parity Enable */
  48#define UART_LCR_STOP   0x04    /* Stop bits: 0=1 stop bit, 1= 2 stop bits */
  49#define UART_LCR_WLEN5  0x00    /* Wordlength: 5 bits */
  50#define UART_LCR_WLEN6  0x01    /* Wordlength: 6 bits */
  51#define UART_LCR_WLEN7  0x02    /* Wordlength: 7 bits */
  52#define UART_LCR_WLEN8  0x03    /* Wordlength: 8 bits */
  53
  54
  55#endif /* _GDB_IO_H */
  56