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12#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13
14#include <linux/clk.h>
15#include <linux/cpu.h>
16#include <linux/cpufreq.h>
17#include <linux/err.h>
18#include <linux/module.h>
19#include <linux/of.h>
20#include <linux/pm_opp.h>
21#include <linux/platform_device.h>
22#include <linux/regulator/consumer.h>
23#include <linux/slab.h>
24
25static unsigned int transition_latency;
26static unsigned int voltage_tolerance;
27
28static struct device *cpu_dev;
29static struct clk *cpu_clk;
30static struct regulator *cpu_reg;
31static struct cpufreq_frequency_table *freq_table;
32
33static unsigned int cpu0_get_speed(unsigned int cpu)
34{
35 return clk_get_rate(cpu_clk) / 1000;
36}
37
38static int cpu0_set_target(struct cpufreq_policy *policy, unsigned int index)
39{
40 struct dev_pm_opp *opp;
41 unsigned long volt = 0, volt_old = 0, tol = 0;
42 unsigned int old_freq, new_freq;
43 long freq_Hz, freq_exact;
44 int ret;
45
46 freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000);
47 if (freq_Hz < 0)
48 freq_Hz = freq_table[index].frequency * 1000;
49
50 freq_exact = freq_Hz;
51 new_freq = freq_Hz / 1000;
52 old_freq = clk_get_rate(cpu_clk) / 1000;
53
54 if (!IS_ERR(cpu_reg)) {
55 rcu_read_lock();
56 opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_Hz);
57 if (IS_ERR(opp)) {
58 rcu_read_unlock();
59 pr_err("failed to find OPP for %ld\n", freq_Hz);
60 return PTR_ERR(opp);
61 }
62 volt = dev_pm_opp_get_voltage(opp);
63 rcu_read_unlock();
64 tol = volt * voltage_tolerance / 100;
65 volt_old = regulator_get_voltage(cpu_reg);
66 }
67
68 pr_debug("%u MHz, %ld mV --> %u MHz, %ld mV\n",
69 old_freq / 1000, volt_old ? volt_old / 1000 : -1,
70 new_freq / 1000, volt ? volt / 1000 : -1);
71
72
73 if (!IS_ERR(cpu_reg) && new_freq > old_freq) {
74 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
75 if (ret) {
76 pr_err("failed to scale voltage up: %d\n", ret);
77 return ret;
78 }
79 }
80
81 ret = clk_set_rate(cpu_clk, freq_exact);
82 if (ret) {
83 pr_err("failed to set clock rate: %d\n", ret);
84 if (!IS_ERR(cpu_reg))
85 regulator_set_voltage_tol(cpu_reg, volt_old, tol);
86 return ret;
87 }
88
89
90 if (!IS_ERR(cpu_reg) && new_freq < old_freq) {
91 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
92 if (ret) {
93 pr_err("failed to scale voltage down: %d\n", ret);
94 clk_set_rate(cpu_clk, old_freq * 1000);
95 }
96 }
97
98 return ret;
99}
100
101static int cpu0_cpufreq_init(struct cpufreq_policy *policy)
102{
103 return cpufreq_generic_init(policy, freq_table, transition_latency);
104}
105
106static struct cpufreq_driver cpu0_cpufreq_driver = {
107 .flags = CPUFREQ_STICKY,
108 .verify = cpufreq_generic_frequency_table_verify,
109 .target_index = cpu0_set_target,
110 .get = cpu0_get_speed,
111 .init = cpu0_cpufreq_init,
112 .exit = cpufreq_generic_exit,
113 .name = "generic_cpu0",
114 .attr = cpufreq_generic_attr,
115};
116
117static int cpu0_cpufreq_probe(struct platform_device *pdev)
118{
119 struct device_node *np;
120 int ret;
121
122 cpu_dev = get_cpu_device(0);
123 if (!cpu_dev) {
124 pr_err("failed to get cpu0 device\n");
125 return -ENODEV;
126 }
127
128 np = of_node_get(cpu_dev->of_node);
129 if (!np) {
130 pr_err("failed to find cpu0 node\n");
131 return -ENOENT;
132 }
133
134 cpu_reg = devm_regulator_get_optional(cpu_dev, "cpu0");
135 if (IS_ERR(cpu_reg)) {
136
137
138
139
140 if (PTR_ERR(cpu_reg) == -EPROBE_DEFER) {
141 dev_err(cpu_dev, "cpu0 regulator not ready, retry\n");
142 ret = -EPROBE_DEFER;
143 goto out_put_node;
144 }
145 pr_warn("failed to get cpu0 regulator: %ld\n",
146 PTR_ERR(cpu_reg));
147 }
148
149 cpu_clk = devm_clk_get(cpu_dev, NULL);
150 if (IS_ERR(cpu_clk)) {
151 ret = PTR_ERR(cpu_clk);
152 pr_err("failed to get cpu0 clock: %d\n", ret);
153 goto out_put_node;
154 }
155
156 ret = of_init_opp_table(cpu_dev);
157 if (ret) {
158 pr_err("failed to init OPP table: %d\n", ret);
159 goto out_put_node;
160 }
161
162 ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
163 if (ret) {
164 pr_err("failed to init cpufreq table: %d\n", ret);
165 goto out_put_node;
166 }
167
168 of_property_read_u32(np, "voltage-tolerance", &voltage_tolerance);
169
170 if (of_property_read_u32(np, "clock-latency", &transition_latency))
171 transition_latency = CPUFREQ_ETERNAL;
172
173 if (!IS_ERR(cpu_reg)) {
174 struct dev_pm_opp *opp;
175 unsigned long min_uV, max_uV;
176 int i;
177
178
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181
182
183 for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++)
184 ;
185 rcu_read_lock();
186 opp = dev_pm_opp_find_freq_exact(cpu_dev,
187 freq_table[0].frequency * 1000, true);
188 min_uV = dev_pm_opp_get_voltage(opp);
189 opp = dev_pm_opp_find_freq_exact(cpu_dev,
190 freq_table[i-1].frequency * 1000, true);
191 max_uV = dev_pm_opp_get_voltage(opp);
192 rcu_read_unlock();
193 ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV);
194 if (ret > 0)
195 transition_latency += ret * 1000;
196 }
197
198 ret = cpufreq_register_driver(&cpu0_cpufreq_driver);
199 if (ret) {
200 pr_err("failed register driver: %d\n", ret);
201 goto out_free_table;
202 }
203
204 of_node_put(np);
205 return 0;
206
207out_free_table:
208 dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
209out_put_node:
210 of_node_put(np);
211 return ret;
212}
213
214static int cpu0_cpufreq_remove(struct platform_device *pdev)
215{
216 cpufreq_unregister_driver(&cpu0_cpufreq_driver);
217 dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
218
219 return 0;
220}
221
222static struct platform_driver cpu0_cpufreq_platdrv = {
223 .driver = {
224 .name = "cpufreq-cpu0",
225 .owner = THIS_MODULE,
226 },
227 .probe = cpu0_cpufreq_probe,
228 .remove = cpu0_cpufreq_remove,
229};
230module_platform_driver(cpu0_cpufreq_platdrv);
231
232MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
233MODULE_DESCRIPTION("Generic CPU0 cpufreq driver");
234MODULE_LICENSE("GPL");
235
