LXR linux/drivers/gpu/drm/ast/ast

   1/*
   2 * Copyright 2012 Red Hat Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the
   6 * "Software"), to deal in the Software without restriction, including
   7 * without limitation the rights to use, copy, modify, merge, publish,
   8 * distribute, sub license, and/or sell copies of the Software, and to
   9 * permit persons to whom the Software is furnished to do so, subject to
  10 * the following conditions:
  11 *
  12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  15 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  17 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  18 * USE OR OTHER DEALINGS IN THE SOFTWARE.
  19 *
  20 * The above copyright notice and this permission notice (including the
  21 * next paragraph) shall be included in all copies or substantial portions
  22 * of the Software.
  23 *
  24 */
  25/*
  26 * Authors: Dave Airlie <airlied@redhat.com>
  27 */
  28#ifndef __AST_DRV_H__
  29#define __AST_DRV_H__
  30
  31#include <drm/drm_fb_helper.h>
  32
  33#include <drm/ttm/ttm_bo_api.h>
  34#include <drm/ttm/ttm_bo_driver.h>
  35#include <drm/ttm/ttm_placement.h>
  36#include <drm/ttm/ttm_memory.h>
  37#include <drm/ttm/ttm_module.h>
  38
  39#include <linux/i2c.h>
  40#include <linux/i2c-algo-bit.h>
  41
  42#define DRIVER_AUTHOR           "Dave Airlie"
  43
  44#define DRIVER_NAME             "ast"
  45#define DRIVER_DESC             "AST"
  46#define DRIVER_DATE             "20120228"
  47
  48#define DRIVER_MAJOR            0
  49#define DRIVER_MINOR            1
  50#define DRIVER_PATCHLEVEL       0
  51
  52#define PCI_CHIP_AST2000 0x2000
  53#define PCI_CHIP_AST2100 0x2010
  54#define PCI_CHIP_AST1180 0x1180
  55
  56
  57enum ast_chip {
  58        AST2000,
  59        AST2100,
  60        AST1100,
  61        AST2200,
  62        AST2150,
  63        AST2300,
  64        AST1180,
  65};
  66
  67#define AST_DRAM_512Mx16 0
  68#define AST_DRAM_1Gx16   1
  69#define AST_DRAM_512Mx32 2
  70#define AST_DRAM_1Gx32   3
  71#define AST_DRAM_2Gx16   6
  72#define AST_DRAM_4Gx16   7
  73
  74struct ast_fbdev;
  75
  76struct ast_private {
  77        struct drm_device *dev;
  78
  79        void __iomem *regs;
  80        void __iomem *ioregs;
  81
  82        enum ast_chip chip;
  83        bool vga2_clone;
  84        uint32_t dram_bus_width;
  85        uint32_t dram_type;
  86        uint32_t mclk;
  87        uint32_t vram_size;
  88
  89        struct ast_fbdev *fbdev;
  90
  91        int fb_mtrr;
  92
  93        struct {
  94                struct drm_global_reference mem_global_ref;
  95                struct ttm_bo_global_ref bo_global_ref;
  96                struct ttm_bo_device bdev;
  97        } ttm;
  98
  99        struct drm_gem_object *cursor_cache;
 100        uint64_t cursor_cache_gpu_addr;
 101        /* Acces to this cache is protected by the crtc->mutex of the only crtc
 102         * we have. */
 103        struct ttm_bo_kmap_obj cache_kmap;
 104        int next_cursor;
 105};
 106
 107int ast_driver_load(struct drm_device *dev, unsigned long flags);
 108int ast_driver_unload(struct drm_device *dev);
 109
 110struct ast_gem_object;
 111
 112#define AST_IO_AR_PORT_WRITE            (0x40)
 113#define AST_IO_MISC_PORT_WRITE          (0x42)
 114#define AST_IO_SEQ_PORT                 (0x44)
 115#define AST_DAC_INDEX_READ              (0x3c7)
 116#define AST_IO_DAC_INDEX_WRITE          (0x48)
 117#define AST_IO_DAC_DATA                 (0x49)
 118#define AST_IO_GR_PORT                  (0x4E)
 119#define AST_IO_CRTC_PORT                (0x54)
 120#define AST_IO_INPUT_STATUS1_READ       (0x5A)
 121#define AST_IO_MISC_PORT_READ           (0x4C)
 122
 123#define __ast_read(x) \
 124static inline u##x ast_read##x(struct ast_private *ast, u32 reg) { \
 125u##x val = 0;\
 126val = ioread##x(ast->regs + reg); \
 127return val;\
 128}
 129
 130__ast_read(8);
 131__ast_read(16);
 132__ast_read(32)
 133
 134#define __ast_io_read(x) \
 135static inline u##x ast_io_read##x(struct ast_private *ast, u32 reg) { \
 136u##x val = 0;\
 137val = ioread##x(ast->ioregs + reg); \
 138return val;\
 139}
 140
 141__ast_io_read(8);
 142__ast_io_read(16);
 143__ast_io_read(32);
 144
 145#define __ast_write(x) \
 146static inline void ast_write##x(struct ast_private *ast, u32 reg, u##x val) {\
 147        iowrite##x(val, ast->regs + reg);\
 148        }
 149
 150__ast_write(8);
 151__ast_write(16);
 152__ast_write(32);
 153
 154#define __ast_io_write(x) \
 155static inline void ast_io_write##x(struct ast_private *ast, u32 reg, u##x val) {\
 156        iowrite##x(val, ast->ioregs + reg);\
 157        }
 158
 159__ast_io_write(8);
 160__ast_io_write(16);
 161#undef __ast_io_write
 162
 163static inline void ast_set_index_reg(struct ast_private *ast,
 164                                     uint32_t base, uint8_t index,
 165                                     uint8_t val)
 166{
 167        ast_io_write16(ast, base, ((u16)val << 8) | index);
 168}
 169
 170void ast_set_index_reg_mask(struct ast_private *ast,
 171                            uint32_t base, uint8_t index,
 172                            uint8_t mask, uint8_t val);
 173uint8_t ast_get_index_reg(struct ast_private *ast,
 174                          uint32_t base, uint8_t index);
 175uint8_t ast_get_index_reg_mask(struct ast_private *ast,
 176                               uint32_t base, uint8_t index, uint8_t mask);
 177
 178static inline void ast_open_key(struct ast_private *ast)
 179{
 180        ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x80, 0xA8);
 181}
 182
 183#define AST_VIDMEM_SIZE_8M    0x00800000
 184#define AST_VIDMEM_SIZE_16M   0x01000000
 185#define AST_VIDMEM_SIZE_32M   0x02000000
 186#define AST_VIDMEM_SIZE_64M   0x04000000
 187#define AST_VIDMEM_SIZE_128M  0x08000000
 188
 189#define AST_VIDMEM_DEFAULT_SIZE AST_VIDMEM_SIZE_8M
 190
 191#define AST_MAX_HWC_WIDTH 64
 192#define AST_MAX_HWC_HEIGHT 64
 193
 194#define AST_HWC_SIZE                (AST_MAX_HWC_WIDTH*AST_MAX_HWC_HEIGHT*2)
 195#define AST_HWC_SIGNATURE_SIZE      32
 196
 197#define AST_DEFAULT_HWC_NUM 2
 198/* define for signature structure */
 199#define AST_HWC_SIGNATURE_CHECKSUM  0x00
 200#define AST_HWC_SIGNATURE_SizeX     0x04
 201#define AST_HWC_SIGNATURE_SizeY     0x08
 202#define AST_HWC_SIGNATURE_X         0x0C
 203#define AST_HWC_SIGNATURE_Y         0x10
 204#define AST_HWC_SIGNATURE_HOTSPOTX  0x14
 205#define AST_HWC_SIGNATURE_HOTSPOTY  0x18
 206
 207
 208struct ast_i2c_chan {
 209        struct i2c_adapter adapter;
 210        struct drm_device *dev;
 211        struct i2c_algo_bit_data bit;
 212};
 213
 214struct ast_connector {
 215        struct drm_connector base;
 216        struct ast_i2c_chan *i2c;
 217};
 218
 219struct ast_crtc {
 220        struct drm_crtc base;
 221        u8 lut_r[256], lut_g[256], lut_b[256];
 222        struct drm_gem_object *cursor_bo;
 223        uint64_t cursor_addr;
 224        int cursor_width, cursor_height;
 225        u8 offset_x, offset_y;
 226};
 227
 228struct ast_encoder {
 229        struct drm_encoder base;
 230};
 231
 232struct ast_framebuffer {
 233        struct drm_framebuffer base;
 234        struct drm_gem_object *obj;
 235};
 236
 237struct ast_fbdev {
 238        struct drm_fb_helper helper;
 239        struct ast_framebuffer afb;
 240        struct list_head fbdev_list;
 241        void *sysram;
 242        int size;
 243        struct ttm_bo_kmap_obj mapping;
 244        int x1, y1, x2, y2; /* dirty rect */
 245        spinlock_t dirty_lock;
 246};
 247
 248#define to_ast_crtc(x) container_of(x, struct ast_crtc, base)
 249#define to_ast_connector(x) container_of(x, struct ast_connector, base)
 250#define to_ast_encoder(x) container_of(x, struct ast_encoder, base)
 251#define to_ast_framebuffer(x) container_of(x, struct ast_framebuffer, base)
 252
 253struct ast_vbios_stdtable {
 254        u8 misc;
 255        u8 seq[4];
 256        u8 crtc[25];
 257        u8 ar[20];
 258        u8 gr[9];
 259};
 260
 261struct ast_vbios_enhtable {
 262        u32 ht;
 263        u32 hde;
 264        u32 hfp;
 265        u32 hsync;
 266        u32 vt;
 267        u32 vde;
 268        u32 vfp;
 269        u32 vsync;
 270        u32 dclk_index;
 271        u32 flags;
 272        u32 refresh_rate;
 273        u32 refresh_rate_index;
 274        u32 mode_id;
 275};
 276
 277struct ast_vbios_dclk_info {
 278        u8 param1;
 279        u8 param2;
 280        u8 param3;
 281};
 282
 283struct ast_vbios_mode_info {
 284        struct ast_vbios_stdtable *std_table;
 285        struct ast_vbios_enhtable *enh_table;
 286};
 287
 288extern int ast_mode_init(struct drm_device *dev);
 289extern void ast_mode_fini(struct drm_device *dev);
 290
 291int ast_framebuffer_init(struct drm_device *dev,
 292                         struct ast_framebuffer *ast_fb,
 293                         struct drm_mode_fb_cmd2 *mode_cmd,
 294                         struct drm_gem_object *obj);
 295
 296int ast_fbdev_init(struct drm_device *dev);
 297void ast_fbdev_fini(struct drm_device *dev);
 298void ast_fbdev_set_suspend(struct drm_device *dev, int state);
 299
 300struct ast_bo {
 301        struct ttm_buffer_object bo;
 302        struct ttm_placement placement;
 303        struct ttm_bo_kmap_obj kmap;
 304        struct drm_gem_object gem;
 305        u32 placements[3];
 306        int pin_count;
 307};
 308#define gem_to_ast_bo(gobj) container_of((gobj), struct ast_bo, gem)
 309
 310static inline struct ast_bo *
 311ast_bo(struct ttm_buffer_object *bo)
 312{
 313        return container_of(bo, struct ast_bo, bo);
 314}
 315
 316
 317#define to_ast_obj(x) container_of(x, struct ast_gem_object, base)
 318
 319#define AST_MM_ALIGN_SHIFT 4
 320#define AST_MM_ALIGN_MASK ((1 << AST_MM_ALIGN_SHIFT) - 1)
 321
 322extern int ast_dumb_create(struct drm_file *file,
 323                           struct drm_device *dev,
 324                           struct drm_mode_create_dumb *args);
 325
 326extern void ast_gem_free_object(struct drm_gem_object *obj);
 327extern int ast_dumb_mmap_offset(struct drm_file *file,
 328                                struct drm_device *dev,
 329                                uint32_t handle,
 330                                uint64_t *offset);
 331
 332#define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
 333
 334int ast_mm_init(struct ast_private *ast);
 335void ast_mm_fini(struct ast_private *ast);
 336
 337int ast_bo_create(struct drm_device *dev, int size, int align,
 338                  uint32_t flags, struct ast_bo **pastbo);
 339
 340int ast_gem_create(struct drm_device *dev,
 341                   u32 size, bool iskernel,
 342                   struct drm_gem_object **obj);
 343
 344int ast_bo_pin(struct ast_bo *bo, u32 pl_flag, u64 *gpu_addr);
 345int ast_bo_unpin(struct ast_bo *bo);
 346
 347static inline int ast_bo_reserve(struct ast_bo *bo, bool no_wait)
 348{
 349        int ret;
 350
 351        ret = ttm_bo_reserve(&bo->bo, true, no_wait, false, 0);
 352        if (ret) {
 353                if (ret != -ERESTARTSYS && ret != -EBUSY)
 354                        DRM_ERROR("reserve failed %p\n", bo);
 355                return ret;
 356        }
 357        return 0;
 358}
 359
 360static inline void ast_bo_unreserve(struct ast_bo *bo)
 361{
 362        ttm_bo_unreserve(&bo->bo);
 363}
 364
 365void ast_ttm_placement(struct ast_bo *bo, int domain);
 366int ast_bo_push_sysram(struct ast_bo *bo);
 367int ast_mmap(struct file *filp, struct vm_area_struct *vma);
 368
 369/* ast post */
 370void ast_post_gpu(struct drm_device *dev);
 371#endif
 372