1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25#include "cx18-driver.h"
26#include "cx18-io.h"
27#include "cx18-cards.h"
28#include "cx18-gpio.h"
29#include "cx18-i2c.h"
30#include "cx18-irq.h"
31
32#define CX18_REG_I2C_1_WR 0xf15000
33#define CX18_REG_I2C_1_RD 0xf15008
34#define CX18_REG_I2C_2_WR 0xf25100
35#define CX18_REG_I2C_2_RD 0xf25108
36
37#define SETSCL_BIT 0x0001
38#define SETSDL_BIT 0x0002
39#define GETSCL_BIT 0x0004
40#define GETSDL_BIT 0x0008
41
42#define CX18_CS5345_I2C_ADDR 0x4c
43#define CX18_Z8F0811_IR_TX_I2C_ADDR 0x70
44#define CX18_Z8F0811_IR_RX_I2C_ADDR 0x71
45
46
47static const u8 hw_addrs[] = {
48 0,
49 0,
50 CX18_CS5345_I2C_ADDR,
51 0,
52 0,
53 0,
54 0,
55 CX18_Z8F0811_IR_TX_I2C_ADDR,
56 CX18_Z8F0811_IR_RX_I2C_ADDR,
57};
58
59
60
61static const u8 hw_bus[] = {
62 1,
63 0,
64 0,
65 0,
66 0,
67 0,
68 0,
69 0,
70 0,
71};
72
73
74static const char * const hw_devicenames[] = {
75 "tuner",
76 "tveeprom",
77 "cs5345",
78 "cx23418_DTV",
79 "cx23418_AV",
80 "gpio_mux",
81 "gpio_reset_ctrl",
82 "ir_tx_z8f0811_haup",
83 "ir_rx_z8f0811_haup",
84};
85
86static int cx18_i2c_new_ir(struct cx18 *cx, struct i2c_adapter *adap, u32 hw,
87 const char *type, u8 addr)
88{
89 struct i2c_board_info info;
90 struct IR_i2c_init_data *init_data = &cx->ir_i2c_init_data;
91 unsigned short addr_list[2] = { addr, I2C_CLIENT_END };
92
93 memset(&info, 0, sizeof(struct i2c_board_info));
94 strlcpy(info.type, type, I2C_NAME_SIZE);
95
96
97 switch (hw) {
98 case CX18_HW_Z8F0811_IR_RX_HAUP:
99 init_data->ir_codes = RC_MAP_HAUPPAUGE;
100 init_data->internal_get_key_func = IR_KBD_GET_KEY_HAUP_XVR;
101 init_data->type = RC_BIT_RC5;
102 init_data->name = cx->card_name;
103 info.platform_data = init_data;
104 break;
105 }
106
107 return i2c_new_probed_device(adap, &info, addr_list, NULL) == NULL ?
108 -1 : 0;
109}
110
111int cx18_i2c_register(struct cx18 *cx, unsigned idx)
112{
113 struct v4l2_subdev *sd;
114 int bus = hw_bus[idx];
115 struct i2c_adapter *adap = &cx->i2c_adap[bus];
116 const char *type = hw_devicenames[idx];
117 u32 hw = 1 << idx;
118
119 if (hw == CX18_HW_TUNER) {
120
121 sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
122 adap, type, 0, cx->card_i2c->radio);
123 if (sd != NULL)
124 sd->grp_id = hw;
125 sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
126 adap, type, 0, cx->card_i2c->demod);
127 if (sd != NULL)
128 sd->grp_id = hw;
129 sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
130 adap, type, 0, cx->card_i2c->tv);
131 if (sd != NULL)
132 sd->grp_id = hw;
133 return sd != NULL ? 0 : -1;
134 }
135
136 if (hw & CX18_HW_IR_ANY)
137 return cx18_i2c_new_ir(cx, adap, hw, type, hw_addrs[idx]);
138
139
140 if (!hw_addrs[idx])
141 return -1;
142
143
144 sd = v4l2_i2c_new_subdev(&cx->v4l2_dev, adap, type, hw_addrs[idx],
145 NULL);
146 if (sd != NULL)
147 sd->grp_id = hw;
148 return sd != NULL ? 0 : -1;
149}
150
151
152struct v4l2_subdev *cx18_find_hw(struct cx18 *cx, u32 hw)
153{
154 struct v4l2_subdev *result = NULL;
155 struct v4l2_subdev *sd;
156
157 spin_lock(&cx->v4l2_dev.lock);
158 v4l2_device_for_each_subdev(sd, &cx->v4l2_dev) {
159 if (sd->grp_id == hw) {
160 result = sd;
161 break;
162 }
163 }
164 spin_unlock(&cx->v4l2_dev.lock);
165 return result;
166}
167
168static void cx18_setscl(void *data, int state)
169{
170 struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
171 int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
172 u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
173 u32 r = cx18_read_reg(cx, addr);
174
175 if (state)
176 cx18_write_reg(cx, r | SETSCL_BIT, addr);
177 else
178 cx18_write_reg(cx, r & ~SETSCL_BIT, addr);
179}
180
181static void cx18_setsda(void *data, int state)
182{
183 struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
184 int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
185 u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
186 u32 r = cx18_read_reg(cx, addr);
187
188 if (state)
189 cx18_write_reg(cx, r | SETSDL_BIT, addr);
190 else
191 cx18_write_reg(cx, r & ~SETSDL_BIT, addr);
192}
193
194static int cx18_getscl(void *data)
195{
196 struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
197 int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
198 u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;
199
200 return cx18_read_reg(cx, addr) & GETSCL_BIT;
201}
202
203static int cx18_getsda(void *data)
204{
205 struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
206 int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
207 u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;
208
209 return cx18_read_reg(cx, addr) & GETSDL_BIT;
210}
211
212
213static struct i2c_adapter cx18_i2c_adap_template = {
214 .name = "cx18 i2c driver",
215 .algo = NULL,
216 .algo_data = NULL,
217 .owner = THIS_MODULE,
218};
219
220#define CX18_SCL_PERIOD (10)
221#define CX18_ALGO_BIT_TIMEOUT (2)
222
223static struct i2c_algo_bit_data cx18_i2c_algo_template = {
224 .setsda = cx18_setsda,
225 .setscl = cx18_setscl,
226 .getsda = cx18_getsda,
227 .getscl = cx18_getscl,
228 .udelay = CX18_SCL_PERIOD/2,
229 .timeout = CX18_ALGO_BIT_TIMEOUT*HZ
230};
231
232
233int init_cx18_i2c(struct cx18 *cx)
234{
235 int i, err;
236 CX18_DEBUG_I2C("i2c init\n");
237
238 for (i = 0; i < 2; i++) {
239
240 cx->i2c_algo[i] = cx18_i2c_algo_template;
241 cx->i2c_algo_cb_data[i].cx = cx;
242 cx->i2c_algo_cb_data[i].bus_index = i;
243 cx->i2c_algo[i].data = &cx->i2c_algo_cb_data[i];
244
245
246 cx->i2c_adap[i] = cx18_i2c_adap_template;
247 cx->i2c_adap[i].algo_data = &cx->i2c_algo[i];
248 sprintf(cx->i2c_adap[i].name + strlen(cx->i2c_adap[i].name),
249 " #%d-%d", cx->instance, i);
250 i2c_set_adapdata(&cx->i2c_adap[i], &cx->v4l2_dev);
251 cx->i2c_adap[i].dev.parent = &cx->pci_dev->dev;
252 }
253
254 if (cx18_read_reg(cx, CX18_REG_I2C_2_WR) != 0x0003c02f) {
255
256
257 cx18_write_reg_expect(cx, 0x10000000, 0xc71004,
258 0x00000000, 0x10001000);
259
260 cx18_write_reg_expect(cx, 0x10001000, 0xc71024,
261 0x00001000, 0x10001000);
262 }
263
264 cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
265 mdelay(10);
266 cx18_write_reg_expect(cx, 0x00c000c0, 0xc7001c, 0x000000c0, 0x00c000c0);
267 mdelay(10);
268 cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
269 mdelay(10);
270
271
272 cx18_write_reg(cx, 0x00c00000, 0xc730c8);
273
274 cx18_write_reg_expect(cx, HW2_I2C1_INT|HW2_I2C2_INT, HW2_INT_CLR_STATUS,
275 ~(HW2_I2C1_INT|HW2_I2C2_INT), HW2_I2C1_INT|HW2_I2C2_INT);
276
277
278 cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_1_WR);
279 cx18_setscl(&cx->i2c_algo_cb_data[0], 1);
280 cx18_setsda(&cx->i2c_algo_cb_data[0], 1);
281
282
283 cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_2_WR);
284 cx18_setscl(&cx->i2c_algo_cb_data[1], 1);
285 cx18_setsda(&cx->i2c_algo_cb_data[1], 1);
286
287 cx18_call_hw(cx, CX18_HW_GPIO_RESET_CTRL,
288 core, reset, (u32) CX18_GPIO_RESET_I2C);
289
290 err = i2c_bit_add_bus(&cx->i2c_adap[0]);
291 if (err)
292 goto err;
293 err = i2c_bit_add_bus(&cx->i2c_adap[1]);
294 if (err)
295 goto err_del_bus_0;
296 return 0;
297
298 err_del_bus_0:
299 i2c_del_adapter(&cx->i2c_adap[0]);
300 err:
301 return err;
302}
303
304void exit_cx18_i2c(struct cx18 *cx)
305{
306 int i;
307 CX18_DEBUG_I2C("i2c exit\n");
308 cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_1_WR) | 4,
309 CX18_REG_I2C_1_WR);
310 cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_2_WR) | 4,
311 CX18_REG_I2C_2_WR);
312
313 for (i = 0; i < 2; i++) {
314 i2c_del_adapter(&cx->i2c_adap[i]);
315 }
316}
317
318
319
320
321
322
323
324
325
326