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13#include <linux/device.h>
14#include <linux/dma-mapping.h>
15#include <linux/dmaengine.h>
16#include <linux/mfd/tmio.h>
17#include <linux/mmc/host.h>
18#include <linux/mmc/tmio.h>
19#include <linux/pagemap.h>
20#include <linux/scatterlist.h>
21
22#include "tmio_mmc.h"
23
24#define TMIO_MMC_MIN_DMA_LEN 8
25
26void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
27{
28 if (!host->chan_tx || !host->chan_rx)
29 return;
30
31#if defined(CONFIG_SUPERH) || defined(CONFIG_ARCH_SHMOBILE)
32
33 sd_ctrl_write16(host, CTL_DMA_ENABLE, enable ? 2 : 0);
34#endif
35}
36
37void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
38{
39 tmio_mmc_enable_dma(host, false);
40
41 if (host->chan_rx)
42 dmaengine_terminate_all(host->chan_rx);
43 if (host->chan_tx)
44 dmaengine_terminate_all(host->chan_tx);
45
46 tmio_mmc_enable_dma(host, true);
47}
48
49static void tmio_mmc_start_dma_rx(struct tmio_mmc_host *host)
50{
51 struct scatterlist *sg = host->sg_ptr, *sg_tmp;
52 struct dma_async_tx_descriptor *desc = NULL;
53 struct dma_chan *chan = host->chan_rx;
54 struct tmio_mmc_data *pdata = host->pdata;
55 dma_cookie_t cookie;
56 int ret, i;
57 bool aligned = true, multiple = true;
58 unsigned int align = (1 << pdata->dma->alignment_shift) - 1;
59
60 for_each_sg(sg, sg_tmp, host->sg_len, i) {
61 if (sg_tmp->offset & align)
62 aligned = false;
63 if (sg_tmp->length & align) {
64 multiple = false;
65 break;
66 }
67 }
68
69 if ((!aligned && (host->sg_len > 1 || sg->length > PAGE_CACHE_SIZE ||
70 (align & PAGE_MASK))) || !multiple) {
71 ret = -EINVAL;
72 goto pio;
73 }
74
75 if (sg->length < TMIO_MMC_MIN_DMA_LEN) {
76 host->force_pio = true;
77 return;
78 }
79
80 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_RXRDY);
81
82
83 if (!aligned) {
84 sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length);
85 host->sg_ptr = &host->bounce_sg;
86 sg = host->sg_ptr;
87 }
88
89 ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_FROM_DEVICE);
90 if (ret > 0)
91 desc = dmaengine_prep_slave_sg(chan, sg, ret,
92 DMA_DEV_TO_MEM, DMA_CTRL_ACK);
93
94 if (desc) {
95 cookie = dmaengine_submit(desc);
96 if (cookie < 0) {
97 desc = NULL;
98 ret = cookie;
99 }
100 }
101 dev_dbg(&host->pdev->dev, "%s(): mapped %d -> %d, cookie %d, rq %p\n",
102 __func__, host->sg_len, ret, cookie, host->mrq);
103
104pio:
105 if (!desc) {
106
107 tmio_mmc_enable_dma(host, false);
108 if (ret >= 0)
109 ret = -EIO;
110 host->chan_rx = NULL;
111 dma_release_channel(chan);
112
113 chan = host->chan_tx;
114 if (chan) {
115 host->chan_tx = NULL;
116 dma_release_channel(chan);
117 }
118 dev_warn(&host->pdev->dev,
119 "DMA failed: %d, falling back to PIO\n", ret);
120 }
121
122 dev_dbg(&host->pdev->dev, "%s(): desc %p, cookie %d, sg[%d]\n", __func__,
123 desc, cookie, host->sg_len);
124}
125
126static void tmio_mmc_start_dma_tx(struct tmio_mmc_host *host)
127{
128 struct scatterlist *sg = host->sg_ptr, *sg_tmp;
129 struct dma_async_tx_descriptor *desc = NULL;
130 struct dma_chan *chan = host->chan_tx;
131 struct tmio_mmc_data *pdata = host->pdata;
132 dma_cookie_t cookie;
133 int ret, i;
134 bool aligned = true, multiple = true;
135 unsigned int align = (1 << pdata->dma->alignment_shift) - 1;
136
137 for_each_sg(sg, sg_tmp, host->sg_len, i) {
138 if (sg_tmp->offset & align)
139 aligned = false;
140 if (sg_tmp->length & align) {
141 multiple = false;
142 break;
143 }
144 }
145
146 if ((!aligned && (host->sg_len > 1 || sg->length > PAGE_CACHE_SIZE ||
147 (align & PAGE_MASK))) || !multiple) {
148 ret = -EINVAL;
149 goto pio;
150 }
151
152 if (sg->length < TMIO_MMC_MIN_DMA_LEN) {
153 host->force_pio = true;
154 return;
155 }
156
157 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_TXRQ);
158
159
160 if (!aligned) {
161 unsigned long flags;
162 void *sg_vaddr = tmio_mmc_kmap_atomic(sg, &flags);
163 sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length);
164 memcpy(host->bounce_buf, sg_vaddr, host->bounce_sg.length);
165 tmio_mmc_kunmap_atomic(sg, &flags, sg_vaddr);
166 host->sg_ptr = &host->bounce_sg;
167 sg = host->sg_ptr;
168 }
169
170 ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_TO_DEVICE);
171 if (ret > 0)
172 desc = dmaengine_prep_slave_sg(chan, sg, ret,
173 DMA_MEM_TO_DEV, DMA_CTRL_ACK);
174
175 if (desc) {
176 cookie = dmaengine_submit(desc);
177 if (cookie < 0) {
178 desc = NULL;
179 ret = cookie;
180 }
181 }
182 dev_dbg(&host->pdev->dev, "%s(): mapped %d -> %d, cookie %d, rq %p\n",
183 __func__, host->sg_len, ret, cookie, host->mrq);
184
185pio:
186 if (!desc) {
187
188 tmio_mmc_enable_dma(host, false);
189 if (ret >= 0)
190 ret = -EIO;
191 host->chan_tx = NULL;
192 dma_release_channel(chan);
193
194 chan = host->chan_rx;
195 if (chan) {
196 host->chan_rx = NULL;
197 dma_release_channel(chan);
198 }
199 dev_warn(&host->pdev->dev,
200 "DMA failed: %d, falling back to PIO\n", ret);
201 }
202
203 dev_dbg(&host->pdev->dev, "%s(): desc %p, cookie %d\n", __func__,
204 desc, cookie);
205}
206
207void tmio_mmc_start_dma(struct tmio_mmc_host *host,
208 struct mmc_data *data)
209{
210 if (data->flags & MMC_DATA_READ) {
211 if (host->chan_rx)
212 tmio_mmc_start_dma_rx(host);
213 } else {
214 if (host->chan_tx)
215 tmio_mmc_start_dma_tx(host);
216 }
217}
218
219static void tmio_mmc_issue_tasklet_fn(unsigned long priv)
220{
221 struct tmio_mmc_host *host = (struct tmio_mmc_host *)priv;
222 struct dma_chan *chan = NULL;
223
224 spin_lock_irq(&host->lock);
225
226 if (host && host->data) {
227 if (host->data->flags & MMC_DATA_READ)
228 chan = host->chan_rx;
229 else
230 chan = host->chan_tx;
231 }
232
233 spin_unlock_irq(&host->lock);
234
235 tmio_mmc_enable_mmc_irqs(host, TMIO_STAT_DATAEND);
236
237 if (chan)
238 dma_async_issue_pending(chan);
239}
240
241static void tmio_mmc_tasklet_fn(unsigned long arg)
242{
243 struct tmio_mmc_host *host = (struct tmio_mmc_host *)arg;
244
245 spin_lock_irq(&host->lock);
246
247 if (!host->data)
248 goto out;
249
250 if (host->data->flags & MMC_DATA_READ)
251 dma_unmap_sg(host->chan_rx->device->dev,
252 host->sg_ptr, host->sg_len,
253 DMA_FROM_DEVICE);
254 else
255 dma_unmap_sg(host->chan_tx->device->dev,
256 host->sg_ptr, host->sg_len,
257 DMA_TO_DEVICE);
258
259 tmio_mmc_do_data_irq(host);
260out:
261 spin_unlock_irq(&host->lock);
262}
263
264void tmio_mmc_request_dma(struct tmio_mmc_host *host, struct tmio_mmc_data *pdata)
265{
266
267 if (!pdata->dma || (!host->pdev->dev.of_node &&
268 (!pdata->dma->chan_priv_tx || !pdata->dma->chan_priv_rx)))
269 return;
270
271 if (!host->chan_tx && !host->chan_rx) {
272 struct resource *res = platform_get_resource(host->pdev,
273 IORESOURCE_MEM, 0);
274 struct dma_slave_config cfg = {};
275 dma_cap_mask_t mask;
276 int ret;
277
278 if (!res)
279 return;
280
281 dma_cap_zero(mask);
282 dma_cap_set(DMA_SLAVE, mask);
283
284 host->chan_tx = dma_request_slave_channel_compat(mask,
285 pdata->dma->filter, pdata->dma->chan_priv_tx,
286 &host->pdev->dev, "tx");
287 dev_dbg(&host->pdev->dev, "%s: TX: got channel %p\n", __func__,
288 host->chan_tx);
289
290 if (!host->chan_tx)
291 return;
292
293 if (pdata->dma->chan_priv_tx)
294 cfg.slave_id = pdata->dma->slave_id_tx;
295 cfg.direction = DMA_MEM_TO_DEV;
296 cfg.dst_addr = res->start + (CTL_SD_DATA_PORT << host->bus_shift);
297 cfg.src_addr = 0;
298 ret = dmaengine_slave_config(host->chan_tx, &cfg);
299 if (ret < 0)
300 goto ecfgtx;
301
302 host->chan_rx = dma_request_slave_channel_compat(mask,
303 pdata->dma->filter, pdata->dma->chan_priv_rx,
304 &host->pdev->dev, "rx");
305 dev_dbg(&host->pdev->dev, "%s: RX: got channel %p\n", __func__,
306 host->chan_rx);
307
308 if (!host->chan_rx)
309 goto ereqrx;
310
311 if (pdata->dma->chan_priv_rx)
312 cfg.slave_id = pdata->dma->slave_id_rx;
313 cfg.direction = DMA_DEV_TO_MEM;
314 cfg.src_addr = cfg.dst_addr;
315 cfg.dst_addr = 0;
316 ret = dmaengine_slave_config(host->chan_rx, &cfg);
317 if (ret < 0)
318 goto ecfgrx;
319
320 host->bounce_buf = (u8 *)__get_free_page(GFP_KERNEL | GFP_DMA);
321 if (!host->bounce_buf)
322 goto ebouncebuf;
323
324 tasklet_init(&host->dma_complete, tmio_mmc_tasklet_fn, (unsigned long)host);
325 tasklet_init(&host->dma_issue, tmio_mmc_issue_tasklet_fn, (unsigned long)host);
326 }
327
328 tmio_mmc_enable_dma(host, true);
329
330 return;
331
332ebouncebuf:
333ecfgrx:
334 dma_release_channel(host->chan_rx);
335 host->chan_rx = NULL;
336ereqrx:
337ecfgtx:
338 dma_release_channel(host->chan_tx);
339 host->chan_tx = NULL;
340}
341
342void tmio_mmc_release_dma(struct tmio_mmc_host *host)
343{
344 if (host->chan_tx) {
345 struct dma_chan *chan = host->chan_tx;
346 host->chan_tx = NULL;
347 dma_release_channel(chan);
348 }
349 if (host->chan_rx) {
350 struct dma_chan *chan = host->chan_rx;
351 host->chan_rx = NULL;
352 dma_release_channel(chan);
353 }
354 if (host->bounce_buf) {
355 free_pages((unsigned long)host->bounce_buf, 0);
356 host->bounce_buf = NULL;
357 }
358}
359
