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35#include <linux/if_vlan.h>
36
37#include <linux/mlx4/device.h>
38#include <linux/mlx4/cmd.h>
39
40#include "en_port.h"
41#include "mlx4_en.h"
42
43
44int mlx4_SET_VLAN_FLTR(struct mlx4_dev *dev, struct mlx4_en_priv *priv)
45{
46 struct mlx4_cmd_mailbox *mailbox;
47 struct mlx4_set_vlan_fltr_mbox *filter;
48 int i;
49 int j;
50 int index = 0;
51 u32 entry;
52 int err = 0;
53
54 mailbox = mlx4_alloc_cmd_mailbox(dev);
55 if (IS_ERR(mailbox))
56 return PTR_ERR(mailbox);
57
58 filter = mailbox->buf;
59 for (i = VLAN_FLTR_SIZE - 1; i >= 0; i--) {
60 entry = 0;
61 for (j = 0; j < 32; j++)
62 if (test_bit(index++, priv->active_vlans))
63 entry |= 1 << j;
64 filter->entry[i] = cpu_to_be32(entry);
65 }
66 err = mlx4_cmd(dev, mailbox->dma, priv->port, 0, MLX4_CMD_SET_VLAN_FLTR,
67 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
68 mlx4_free_cmd_mailbox(dev, mailbox);
69 return err;
70}
71
72int mlx4_en_QUERY_PORT(struct mlx4_en_dev *mdev, u8 port)
73{
74 struct mlx4_en_query_port_context *qport_context;
75 struct mlx4_en_priv *priv = netdev_priv(mdev->pndev[port]);
76 struct mlx4_en_port_state *state = &priv->port_state;
77 struct mlx4_cmd_mailbox *mailbox;
78 int err;
79
80 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
81 if (IS_ERR(mailbox))
82 return PTR_ERR(mailbox);
83 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
84 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
85 MLX4_CMD_WRAPPED);
86 if (err)
87 goto out;
88 qport_context = mailbox->buf;
89
90
91
92 state->link_state = !!(qport_context->link_up & MLX4_EN_LINK_UP_MASK);
93 switch (qport_context->link_speed & MLX4_EN_SPEED_MASK) {
94 case MLX4_EN_1G_SPEED:
95 state->link_speed = 1000;
96 break;
97 case MLX4_EN_10G_SPEED_XAUI:
98 case MLX4_EN_10G_SPEED_XFI:
99 state->link_speed = 10000;
100 break;
101 case MLX4_EN_40G_SPEED:
102 state->link_speed = 40000;
103 break;
104 default:
105 state->link_speed = -1;
106 break;
107 }
108 state->transciver = qport_context->transceiver;
109
110out:
111 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
112 return err;
113}
114
115int mlx4_en_DUMP_ETH_STATS(struct mlx4_en_dev *mdev, u8 port, u8 reset)
116{
117 struct mlx4_en_stat_out_mbox *mlx4_en_stats;
118 struct mlx4_en_priv *priv = netdev_priv(mdev->pndev[port]);
119 struct net_device_stats *stats = &priv->stats;
120 struct mlx4_cmd_mailbox *mailbox;
121 u64 in_mod = reset << 8 | port;
122 int err;
123 int i;
124
125 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
126 if (IS_ERR(mailbox))
127 return PTR_ERR(mailbox);
128 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, in_mod, 0,
129 MLX4_CMD_DUMP_ETH_STATS, MLX4_CMD_TIME_CLASS_B,
130 MLX4_CMD_WRAPPED);
131 if (err)
132 goto out;
133
134 mlx4_en_stats = mailbox->buf;
135
136 spin_lock_bh(&priv->stats_lock);
137
138 stats->rx_packets = 0;
139 stats->rx_bytes = 0;
140 priv->port_stats.rx_chksum_good = 0;
141 priv->port_stats.rx_chksum_none = 0;
142 for (i = 0; i < priv->rx_ring_num; i++) {
143 stats->rx_packets += priv->rx_ring[i]->packets;
144 stats->rx_bytes += priv->rx_ring[i]->bytes;
145 priv->port_stats.rx_chksum_good += priv->rx_ring[i]->csum_ok;
146 priv->port_stats.rx_chksum_none += priv->rx_ring[i]->csum_none;
147 }
148 stats->tx_packets = 0;
149 stats->tx_bytes = 0;
150 priv->port_stats.tx_chksum_offload = 0;
151 for (i = 0; i < priv->tx_ring_num; i++) {
152 stats->tx_packets += priv->tx_ring[i]->packets;
153 stats->tx_bytes += priv->tx_ring[i]->bytes;
154 priv->port_stats.tx_chksum_offload += priv->tx_ring[i]->tx_csum;
155 }
156
157 stats->rx_errors = be64_to_cpu(mlx4_en_stats->PCS) +
158 be32_to_cpu(mlx4_en_stats->RdropLength) +
159 be32_to_cpu(mlx4_en_stats->RJBBR) +
160 be32_to_cpu(mlx4_en_stats->RCRC) +
161 be32_to_cpu(mlx4_en_stats->RRUNT);
162 stats->tx_errors = be32_to_cpu(mlx4_en_stats->TDROP);
163 stats->multicast = be64_to_cpu(mlx4_en_stats->MCAST_prio_0) +
164 be64_to_cpu(mlx4_en_stats->MCAST_prio_1) +
165 be64_to_cpu(mlx4_en_stats->MCAST_prio_2) +
166 be64_to_cpu(mlx4_en_stats->MCAST_prio_3) +
167 be64_to_cpu(mlx4_en_stats->MCAST_prio_4) +
168 be64_to_cpu(mlx4_en_stats->MCAST_prio_5) +
169 be64_to_cpu(mlx4_en_stats->MCAST_prio_6) +
170 be64_to_cpu(mlx4_en_stats->MCAST_prio_7) +
171 be64_to_cpu(mlx4_en_stats->MCAST_novlan);
172 stats->collisions = 0;
173 stats->rx_length_errors = be32_to_cpu(mlx4_en_stats->RdropLength);
174 stats->rx_over_errors = be32_to_cpu(mlx4_en_stats->RdropOvflw);
175 stats->rx_crc_errors = be32_to_cpu(mlx4_en_stats->RCRC);
176 stats->rx_frame_errors = 0;
177 stats->rx_fifo_errors = be32_to_cpu(mlx4_en_stats->RdropOvflw);
178 stats->rx_missed_errors = be32_to_cpu(mlx4_en_stats->RdropOvflw);
179 stats->tx_aborted_errors = 0;
180 stats->tx_carrier_errors = 0;
181 stats->tx_fifo_errors = 0;
182 stats->tx_heartbeat_errors = 0;
183 stats->tx_window_errors = 0;
184
185 priv->pkstats.broadcast =
186 be64_to_cpu(mlx4_en_stats->RBCAST_prio_0) +
187 be64_to_cpu(mlx4_en_stats->RBCAST_prio_1) +
188 be64_to_cpu(mlx4_en_stats->RBCAST_prio_2) +
189 be64_to_cpu(mlx4_en_stats->RBCAST_prio_3) +
190 be64_to_cpu(mlx4_en_stats->RBCAST_prio_4) +
191 be64_to_cpu(mlx4_en_stats->RBCAST_prio_5) +
192 be64_to_cpu(mlx4_en_stats->RBCAST_prio_6) +
193 be64_to_cpu(mlx4_en_stats->RBCAST_prio_7) +
194 be64_to_cpu(mlx4_en_stats->RBCAST_novlan);
195 priv->pkstats.rx_prio[0] = be64_to_cpu(mlx4_en_stats->RTOT_prio_0);
196 priv->pkstats.rx_prio[1] = be64_to_cpu(mlx4_en_stats->RTOT_prio_1);
197 priv->pkstats.rx_prio[2] = be64_to_cpu(mlx4_en_stats->RTOT_prio_2);
198 priv->pkstats.rx_prio[3] = be64_to_cpu(mlx4_en_stats->RTOT_prio_3);
199 priv->pkstats.rx_prio[4] = be64_to_cpu(mlx4_en_stats->RTOT_prio_4);
200 priv->pkstats.rx_prio[5] = be64_to_cpu(mlx4_en_stats->RTOT_prio_5);
201 priv->pkstats.rx_prio[6] = be64_to_cpu(mlx4_en_stats->RTOT_prio_6);
202 priv->pkstats.rx_prio[7] = be64_to_cpu(mlx4_en_stats->RTOT_prio_7);
203 priv->pkstats.tx_prio[0] = be64_to_cpu(mlx4_en_stats->TTOT_prio_0);
204 priv->pkstats.tx_prio[1] = be64_to_cpu(mlx4_en_stats->TTOT_prio_1);
205 priv->pkstats.tx_prio[2] = be64_to_cpu(mlx4_en_stats->TTOT_prio_2);
206 priv->pkstats.tx_prio[3] = be64_to_cpu(mlx4_en_stats->TTOT_prio_3);
207 priv->pkstats.tx_prio[4] = be64_to_cpu(mlx4_en_stats->TTOT_prio_4);
208 priv->pkstats.tx_prio[5] = be64_to_cpu(mlx4_en_stats->TTOT_prio_5);
209 priv->pkstats.tx_prio[6] = be64_to_cpu(mlx4_en_stats->TTOT_prio_6);
210 priv->pkstats.tx_prio[7] = be64_to_cpu(mlx4_en_stats->TTOT_prio_7);
211 spin_unlock_bh(&priv->stats_lock);
212
213out:
214 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
215 return err;
216}
217
218