1
2
3
4
5
6
7
8
9
10#include <linux/delay.h>
11#include <asm/cmpxchg.h>
12#include "net_driver.h"
13#include "nic.h"
14#include "io.h"
15#include "farch_regs.h"
16#include "mcdi_pcol.h"
17#include "phy.h"
18
19
20
21
22
23
24
25
26#define MCDI_RPC_TIMEOUT (10 * HZ)
27
28
29
30
31
32#define MCDI_STATUS_DELAY_US 100
33#define MCDI_STATUS_DELAY_COUNT 2500
34#define MCDI_STATUS_SLEEP_MS \
35 (MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000)
36
37#define SEQ_MASK \
38 EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ))
39
40struct efx_mcdi_async_param {
41 struct list_head list;
42 unsigned int cmd;
43 size_t inlen;
44 size_t outlen;
45 efx_mcdi_async_completer *complete;
46 unsigned long cookie;
47
48};
49
50static void efx_mcdi_timeout_async(unsigned long context);
51static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
52 bool *was_attached_out);
53static bool efx_mcdi_poll_once(struct efx_nic *efx);
54
55static inline struct efx_mcdi_iface *efx_mcdi(struct efx_nic *efx)
56{
57 EFX_BUG_ON_PARANOID(!efx->mcdi);
58 return &efx->mcdi->iface;
59}
60
61int efx_mcdi_init(struct efx_nic *efx)
62{
63 struct efx_mcdi_iface *mcdi;
64 bool already_attached;
65 int rc;
66
67 efx->mcdi = kzalloc(sizeof(*efx->mcdi), GFP_KERNEL);
68 if (!efx->mcdi)
69 return -ENOMEM;
70
71 mcdi = efx_mcdi(efx);
72 mcdi->efx = efx;
73 init_waitqueue_head(&mcdi->wq);
74 spin_lock_init(&mcdi->iface_lock);
75 mcdi->state = MCDI_STATE_QUIESCENT;
76 mcdi->mode = MCDI_MODE_POLL;
77 spin_lock_init(&mcdi->async_lock);
78 INIT_LIST_HEAD(&mcdi->async_list);
79 setup_timer(&mcdi->async_timer, efx_mcdi_timeout_async,
80 (unsigned long)mcdi);
81
82 (void) efx_mcdi_poll_reboot(efx);
83 mcdi->new_epoch = true;
84
85
86 rc = efx_mcdi_handle_assertion(efx);
87 if (rc)
88 return rc;
89
90
91
92
93 rc = efx_mcdi_drv_attach(efx, true, &already_attached);
94 if (rc) {
95 netif_err(efx, probe, efx->net_dev,
96 "Unable to register driver with MCPU\n");
97 return rc;
98 }
99 if (already_attached)
100
101 netif_err(efx, probe, efx->net_dev,
102 "Host already registered with MCPU\n");
103
104 return 0;
105}
106
107void efx_mcdi_fini(struct efx_nic *efx)
108{
109 if (!efx->mcdi)
110 return;
111
112 BUG_ON(efx->mcdi->iface.state != MCDI_STATE_QUIESCENT);
113
114
115 efx_mcdi_drv_attach(efx, false, NULL);
116
117 kfree(efx->mcdi);
118}
119
120static void efx_mcdi_send_request(struct efx_nic *efx, unsigned cmd,
121 const efx_dword_t *inbuf, size_t inlen)
122{
123 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
124 efx_dword_t hdr[2];
125 size_t hdr_len;
126 u32 xflags, seqno;
127
128 BUG_ON(mcdi->state == MCDI_STATE_QUIESCENT);
129
130
131 spin_lock_bh(&mcdi->iface_lock);
132 ++mcdi->seqno;
133 spin_unlock_bh(&mcdi->iface_lock);
134
135 seqno = mcdi->seqno & SEQ_MASK;
136 xflags = 0;
137 if (mcdi->mode == MCDI_MODE_EVENTS)
138 xflags |= MCDI_HEADER_XFLAGS_EVREQ;
139
140 if (efx->type->mcdi_max_ver == 1) {
141
142 EFX_POPULATE_DWORD_7(hdr[0],
143 MCDI_HEADER_RESPONSE, 0,
144 MCDI_HEADER_RESYNC, 1,
145 MCDI_HEADER_CODE, cmd,
146 MCDI_HEADER_DATALEN, inlen,
147 MCDI_HEADER_SEQ, seqno,
148 MCDI_HEADER_XFLAGS, xflags,
149 MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
150 hdr_len = 4;
151 } else {
152
153 BUG_ON(inlen > MCDI_CTL_SDU_LEN_MAX_V2);
154 EFX_POPULATE_DWORD_7(hdr[0],
155 MCDI_HEADER_RESPONSE, 0,
156 MCDI_HEADER_RESYNC, 1,
157 MCDI_HEADER_CODE, MC_CMD_V2_EXTN,
158 MCDI_HEADER_DATALEN, 0,
159 MCDI_HEADER_SEQ, seqno,
160 MCDI_HEADER_XFLAGS, xflags,
161 MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
162 EFX_POPULATE_DWORD_2(hdr[1],
163 MC_CMD_V2_EXTN_IN_EXTENDED_CMD, cmd,
164 MC_CMD_V2_EXTN_IN_ACTUAL_LEN, inlen);
165 hdr_len = 8;
166 }
167
168 efx->type->mcdi_request(efx, hdr, hdr_len, inbuf, inlen);
169
170 mcdi->new_epoch = false;
171}
172
173static int efx_mcdi_errno(unsigned int mcdi_err)
174{
175 switch (mcdi_err) {
176 case 0:
177 return 0;
178#define TRANSLATE_ERROR(name) \
179 case MC_CMD_ERR_ ## name: \
180 return -name;
181 TRANSLATE_ERROR(EPERM);
182 TRANSLATE_ERROR(ENOENT);
183 TRANSLATE_ERROR(EINTR);
184 TRANSLATE_ERROR(EAGAIN);
185 TRANSLATE_ERROR(EACCES);
186 TRANSLATE_ERROR(EBUSY);
187 TRANSLATE_ERROR(EINVAL);
188 TRANSLATE_ERROR(EDEADLK);
189 TRANSLATE_ERROR(ENOSYS);
190 TRANSLATE_ERROR(ETIME);
191 TRANSLATE_ERROR(EALREADY);
192 TRANSLATE_ERROR(ENOSPC);
193#undef TRANSLATE_ERROR
194 case MC_CMD_ERR_ALLOC_FAIL:
195 return -ENOBUFS;
196 case MC_CMD_ERR_MAC_EXIST:
197 return -EADDRINUSE;
198 default:
199 return -EPROTO;
200 }
201}
202
203static void efx_mcdi_read_response_header(struct efx_nic *efx)
204{
205 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
206 unsigned int respseq, respcmd, error;
207 efx_dword_t hdr;
208
209 efx->type->mcdi_read_response(efx, &hdr, 0, 4);
210 respseq = EFX_DWORD_FIELD(hdr, MCDI_HEADER_SEQ);
211 respcmd = EFX_DWORD_FIELD(hdr, MCDI_HEADER_CODE);
212 error = EFX_DWORD_FIELD(hdr, MCDI_HEADER_ERROR);
213
214 if (respcmd != MC_CMD_V2_EXTN) {
215 mcdi->resp_hdr_len = 4;
216 mcdi->resp_data_len = EFX_DWORD_FIELD(hdr, MCDI_HEADER_DATALEN);
217 } else {
218 efx->type->mcdi_read_response(efx, &hdr, 4, 4);
219 mcdi->resp_hdr_len = 8;
220 mcdi->resp_data_len =
221 EFX_DWORD_FIELD(hdr, MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
222 }
223
224 if (error && mcdi->resp_data_len == 0) {
225 netif_err(efx, hw, efx->net_dev, "MC rebooted\n");
226 mcdi->resprc = -EIO;
227 } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) {
228 netif_err(efx, hw, efx->net_dev,
229 "MC response mismatch tx seq 0x%x rx seq 0x%x\n",
230 respseq, mcdi->seqno);
231 mcdi->resprc = -EIO;
232 } else if (error) {
233 efx->type->mcdi_read_response(efx, &hdr, mcdi->resp_hdr_len, 4);
234 mcdi->resprc =
235 efx_mcdi_errno(EFX_DWORD_FIELD(hdr, EFX_DWORD_0));
236 } else {
237 mcdi->resprc = 0;
238 }
239}
240
241static bool efx_mcdi_poll_once(struct efx_nic *efx)
242{
243 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
244
245 rmb();
246 if (!efx->type->mcdi_poll_response(efx))
247 return false;
248
249 spin_lock_bh(&mcdi->iface_lock);
250 efx_mcdi_read_response_header(efx);
251 spin_unlock_bh(&mcdi->iface_lock);
252
253 return true;
254}
255
256static int efx_mcdi_poll(struct efx_nic *efx)
257{
258 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
259 unsigned long time, finish;
260 unsigned int spins;
261 int rc;
262
263
264 rc = efx_mcdi_poll_reboot(efx);
265 if (rc) {
266 spin_lock_bh(&mcdi->iface_lock);
267 mcdi->resprc = rc;
268 mcdi->resp_hdr_len = 0;
269 mcdi->resp_data_len = 0;
270 spin_unlock_bh(&mcdi->iface_lock);
271 return 0;
272 }
273
274
275
276
277
278 spins = TICK_USEC;
279 finish = jiffies + MCDI_RPC_TIMEOUT;
280
281 while (1) {
282 if (spins != 0) {
283 --spins;
284 udelay(1);
285 } else {
286 schedule_timeout_uninterruptible(1);
287 }
288
289 time = jiffies;
290
291 if (efx_mcdi_poll_once(efx))
292 break;
293
294 if (time_after(time, finish))
295 return -ETIMEDOUT;
296 }
297
298
299 return 0;
300}
301
302
303
304
305int efx_mcdi_poll_reboot(struct efx_nic *efx)
306{
307 if (!efx->mcdi)
308 return 0;
309
310 return efx->type->mcdi_poll_reboot(efx);
311}
312
313static bool efx_mcdi_acquire_async(struct efx_mcdi_iface *mcdi)
314{
315 return cmpxchg(&mcdi->state,
316 MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_ASYNC) ==
317 MCDI_STATE_QUIESCENT;
318}
319
320static void efx_mcdi_acquire_sync(struct efx_mcdi_iface *mcdi)
321{
322
323
324
325 wait_event(mcdi->wq,
326 cmpxchg(&mcdi->state,
327 MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_SYNC) ==
328 MCDI_STATE_QUIESCENT);
329}
330
331static int efx_mcdi_await_completion(struct efx_nic *efx)
332{
333 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
334
335 if (wait_event_timeout(mcdi->wq, mcdi->state == MCDI_STATE_COMPLETED,
336 MCDI_RPC_TIMEOUT) == 0)
337 return -ETIMEDOUT;
338
339
340
341
342
343
344
345
346
347 if (mcdi->mode == MCDI_MODE_POLL)
348 return efx_mcdi_poll(efx);
349
350 return 0;
351}
352
353
354
355
356static bool efx_mcdi_complete_sync(struct efx_mcdi_iface *mcdi)
357{
358 if (cmpxchg(&mcdi->state,
359 MCDI_STATE_RUNNING_SYNC, MCDI_STATE_COMPLETED) ==
360 MCDI_STATE_RUNNING_SYNC) {
361 wake_up(&mcdi->wq);
362 return true;
363 }
364
365 return false;
366}
367
368static void efx_mcdi_release(struct efx_mcdi_iface *mcdi)
369{
370 if (mcdi->mode == MCDI_MODE_EVENTS) {
371 struct efx_mcdi_async_param *async;
372 struct efx_nic *efx = mcdi->efx;
373
374
375 spin_lock_bh(&mcdi->async_lock);
376 async = list_first_entry_or_null(
377 &mcdi->async_list, struct efx_mcdi_async_param, list);
378 if (async) {
379 mcdi->state = MCDI_STATE_RUNNING_ASYNC;
380 efx_mcdi_send_request(efx, async->cmd,
381 (const efx_dword_t *)(async + 1),
382 async->inlen);
383 mod_timer(&mcdi->async_timer,
384 jiffies + MCDI_RPC_TIMEOUT);
385 }
386 spin_unlock_bh(&mcdi->async_lock);
387
388 if (async)
389 return;
390 }
391
392 mcdi->state = MCDI_STATE_QUIESCENT;
393 wake_up(&mcdi->wq);
394}
395
396
397
398
399
400
401static bool efx_mcdi_complete_async(struct efx_mcdi_iface *mcdi, bool timeout)
402{
403 struct efx_nic *efx = mcdi->efx;
404 struct efx_mcdi_async_param *async;
405 size_t hdr_len, data_len;
406 efx_dword_t *outbuf;
407 int rc;
408
409 if (cmpxchg(&mcdi->state,
410 MCDI_STATE_RUNNING_ASYNC, MCDI_STATE_COMPLETED) !=
411 MCDI_STATE_RUNNING_ASYNC)
412 return false;
413
414 spin_lock(&mcdi->iface_lock);
415 if (timeout) {
416
417
418
419 ++mcdi->seqno;
420 ++mcdi->credits;
421 rc = -ETIMEDOUT;
422 hdr_len = 0;
423 data_len = 0;
424 } else {
425 rc = mcdi->resprc;
426 hdr_len = mcdi->resp_hdr_len;
427 data_len = mcdi->resp_data_len;
428 }
429 spin_unlock(&mcdi->iface_lock);
430
431
432
433
434
435 if (!timeout)
436 del_timer_sync(&mcdi->async_timer);
437
438 spin_lock(&mcdi->async_lock);
439 async = list_first_entry(&mcdi->async_list,
440 struct efx_mcdi_async_param, list);
441 list_del(&async->list);
442 spin_unlock(&mcdi->async_lock);
443
444 outbuf = (efx_dword_t *)(async + 1);
445 efx->type->mcdi_read_response(efx, outbuf, hdr_len,
446 min(async->outlen, data_len));
447 async->complete(efx, async->cookie, rc, outbuf, data_len);
448 kfree(async);
449
450 efx_mcdi_release(mcdi);
451
452 return true;
453}
454
455static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno,
456 unsigned int datalen, unsigned int mcdi_err)
457{
458 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
459 bool wake = false;
460
461 spin_lock(&mcdi->iface_lock);
462
463 if ((seqno ^ mcdi->seqno) & SEQ_MASK) {
464 if (mcdi->credits)
465
466 --mcdi->credits;
467 else
468 netif_err(efx, hw, efx->net_dev,
469 "MC response mismatch tx seq 0x%x rx "
470 "seq 0x%x\n", seqno, mcdi->seqno);
471 } else {
472 if (efx->type->mcdi_max_ver >= 2) {
473
474 efx_mcdi_read_response_header(efx);
475 } else {
476 mcdi->resprc = efx_mcdi_errno(mcdi_err);
477 mcdi->resp_hdr_len = 4;
478 mcdi->resp_data_len = datalen;
479 }
480
481 wake = true;
482 }
483
484 spin_unlock(&mcdi->iface_lock);
485
486 if (wake) {
487 if (!efx_mcdi_complete_async(mcdi, false))
488 (void) efx_mcdi_complete_sync(mcdi);
489
490
491
492
493
494
495
496 }
497}
498
499static void efx_mcdi_timeout_async(unsigned long context)
500{
501 struct efx_mcdi_iface *mcdi = (struct efx_mcdi_iface *)context;
502
503 efx_mcdi_complete_async(mcdi, true);
504}
505
506static int
507efx_mcdi_check_supported(struct efx_nic *efx, unsigned int cmd, size_t inlen)
508{
509 if (efx->type->mcdi_max_ver < 0 ||
510 (efx->type->mcdi_max_ver < 2 &&
511 cmd > MC_CMD_CMD_SPACE_ESCAPE_7))
512 return -EINVAL;
513
514 if (inlen > MCDI_CTL_SDU_LEN_MAX_V2 ||
515 (efx->type->mcdi_max_ver < 2 &&
516 inlen > MCDI_CTL_SDU_LEN_MAX_V1))
517 return -EMSGSIZE;
518
519 return 0;
520}
521
522int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
523 const efx_dword_t *inbuf, size_t inlen,
524 efx_dword_t *outbuf, size_t outlen,
525 size_t *outlen_actual)
526{
527 int rc;
528
529 rc = efx_mcdi_rpc_start(efx, cmd, inbuf, inlen);
530 if (rc)
531 return rc;
532 return efx_mcdi_rpc_finish(efx, cmd, inlen,
533 outbuf, outlen, outlen_actual);
534}
535
536int efx_mcdi_rpc_start(struct efx_nic *efx, unsigned cmd,
537 const efx_dword_t *inbuf, size_t inlen)
538{
539 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
540 int rc;
541
542 rc = efx_mcdi_check_supported(efx, cmd, inlen);
543 if (rc)
544 return rc;
545
546 efx_mcdi_acquire_sync(mcdi);
547 efx_mcdi_send_request(efx, cmd, inbuf, inlen);
548 return 0;
549}
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571int
572efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
573 const efx_dword_t *inbuf, size_t inlen, size_t outlen,
574 efx_mcdi_async_completer *complete, unsigned long cookie)
575{
576 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
577 struct efx_mcdi_async_param *async;
578 int rc;
579
580 rc = efx_mcdi_check_supported(efx, cmd, inlen);
581 if (rc)
582 return rc;
583
584 async = kmalloc(sizeof(*async) + ALIGN(max(inlen, outlen), 4),
585 GFP_ATOMIC);
586 if (!async)
587 return -ENOMEM;
588
589 async->cmd = cmd;
590 async->inlen = inlen;
591 async->outlen = outlen;
592 async->complete = complete;
593 async->cookie = cookie;
594 memcpy(async + 1, inbuf, inlen);
595
596 spin_lock_bh(&mcdi->async_lock);
597
598 if (mcdi->mode == MCDI_MODE_EVENTS) {
599 list_add_tail(&async->list, &mcdi->async_list);
600
601
602
603
604 if (mcdi->async_list.next == &async->list &&
605 efx_mcdi_acquire_async(mcdi)) {
606 efx_mcdi_send_request(efx, cmd, inbuf, inlen);
607 mod_timer(&mcdi->async_timer,
608 jiffies + MCDI_RPC_TIMEOUT);
609 }
610 } else {
611 kfree(async);
612 rc = -ENETDOWN;
613 }
614
615 spin_unlock_bh(&mcdi->async_lock);
616
617 return rc;
618}
619
620int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
621 efx_dword_t *outbuf, size_t outlen,
622 size_t *outlen_actual)
623{
624 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
625 int rc;
626
627 if (mcdi->mode == MCDI_MODE_POLL)
628 rc = efx_mcdi_poll(efx);
629 else
630 rc = efx_mcdi_await_completion(efx);
631
632 if (rc != 0) {
633 netif_err(efx, hw, efx->net_dev,
634 "MC command 0x%x inlen %d mode %d timed out\n",
635 cmd, (int)inlen, mcdi->mode);
636
637 if (mcdi->mode == MCDI_MODE_EVENTS && efx_mcdi_poll_once(efx)) {
638 netif_err(efx, hw, efx->net_dev,
639 "MCDI request was completed without an event\n");
640 rc = 0;
641 }
642
643
644
645
646
647 spin_lock_bh(&mcdi->iface_lock);
648 ++mcdi->seqno;
649 ++mcdi->credits;
650 spin_unlock_bh(&mcdi->iface_lock);
651 }
652
653 if (rc == 0) {
654 size_t hdr_len, data_len;
655
656
657
658
659
660 spin_lock_bh(&mcdi->iface_lock);
661 rc = mcdi->resprc;
662 hdr_len = mcdi->resp_hdr_len;
663 data_len = mcdi->resp_data_len;
664 spin_unlock_bh(&mcdi->iface_lock);
665
666 BUG_ON(rc > 0);
667
668 if (rc == 0) {
669 efx->type->mcdi_read_response(efx, outbuf, hdr_len,
670 min(outlen, data_len));
671 if (outlen_actual != NULL)
672 *outlen_actual = data_len;
673 } else if (cmd == MC_CMD_REBOOT && rc == -EIO)
674 ;
675 else if (rc == -EIO || rc == -EINTR) {
676 netif_err(efx, hw, efx->net_dev, "MC fatal error %d\n",
677 -rc);
678 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
679 } else
680 netif_dbg(efx, hw, efx->net_dev,
681 "MC command 0x%x inlen %d failed rc=%d\n",
682 cmd, (int)inlen, -rc);
683
684 if (rc == -EIO || rc == -EINTR) {
685 msleep(MCDI_STATUS_SLEEP_MS);
686 efx_mcdi_poll_reboot(efx);
687 mcdi->new_epoch = true;
688 }
689 }
690
691 efx_mcdi_release(mcdi);
692 return rc;
693}
694
695
696
697
698
699void efx_mcdi_mode_poll(struct efx_nic *efx)
700{
701 struct efx_mcdi_iface *mcdi;
702
703 if (!efx->mcdi)
704 return;
705
706 mcdi = efx_mcdi(efx);
707 if (mcdi->mode == MCDI_MODE_POLL)
708 return;
709
710
711
712
713
714
715
716
717
718 mcdi->mode = MCDI_MODE_POLL;
719
720 efx_mcdi_complete_sync(mcdi);
721}
722
723
724
725
726void efx_mcdi_flush_async(struct efx_nic *efx)
727{
728 struct efx_mcdi_async_param *async, *next;
729 struct efx_mcdi_iface *mcdi;
730
731 if (!efx->mcdi)
732 return;
733
734 mcdi = efx_mcdi(efx);
735
736
737 BUG_ON(mcdi->mode != MCDI_MODE_POLL);
738
739 del_timer_sync(&mcdi->async_timer);
740
741
742
743
744
745 if (mcdi->state == MCDI_STATE_RUNNING_ASYNC) {
746 efx_mcdi_poll(efx);
747 mcdi->state = MCDI_STATE_QUIESCENT;
748 }
749
750
751
752
753
754
755 list_for_each_entry_safe(async, next, &mcdi->async_list, list) {
756 async->complete(efx, async->cookie, -ENETDOWN, NULL, 0);
757 list_del(&async->list);
758 kfree(async);
759 }
760}
761
762void efx_mcdi_mode_event(struct efx_nic *efx)
763{
764 struct efx_mcdi_iface *mcdi;
765
766 if (!efx->mcdi)
767 return;
768
769 mcdi = efx_mcdi(efx);
770
771 if (mcdi->mode == MCDI_MODE_EVENTS)
772 return;
773
774
775
776
777
778
779
780
781 efx_mcdi_acquire_sync(mcdi);
782 mcdi->mode = MCDI_MODE_EVENTS;
783 efx_mcdi_release(mcdi);
784}
785
786static void efx_mcdi_ev_death(struct efx_nic *efx, int rc)
787{
788 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811 spin_lock(&mcdi->iface_lock);
812 if (efx_mcdi_complete_sync(mcdi)) {
813 if (mcdi->mode == MCDI_MODE_EVENTS) {
814 mcdi->resprc = rc;
815 mcdi->resp_hdr_len = 0;
816 mcdi->resp_data_len = 0;
817 ++mcdi->credits;
818 }
819 } else {
820 int count;
821
822
823 for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) {
824 if (efx_mcdi_poll_reboot(efx))
825 break;
826 udelay(MCDI_STATUS_DELAY_US);
827 }
828 mcdi->new_epoch = true;
829
830
831 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
832 }
833
834 spin_unlock(&mcdi->iface_lock);
835}
836
837
838void efx_mcdi_process_event(struct efx_channel *channel,
839 efx_qword_t *event)
840{
841 struct efx_nic *efx = channel->efx;
842 int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE);
843 u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA);
844
845 switch (code) {
846 case MCDI_EVENT_CODE_BADSSERT:
847 netif_err(efx, hw, efx->net_dev,
848 "MC watchdog or assertion failure at 0x%x\n", data);
849 efx_mcdi_ev_death(efx, -EINTR);
850 break;
851
852 case MCDI_EVENT_CODE_PMNOTICE:
853 netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n");
854 break;
855
856 case MCDI_EVENT_CODE_CMDDONE:
857 efx_mcdi_ev_cpl(efx,
858 MCDI_EVENT_FIELD(*event, CMDDONE_SEQ),
859 MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN),
860 MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO));
861 break;
862
863 case MCDI_EVENT_CODE_LINKCHANGE:
864 efx_mcdi_process_link_change(efx, event);
865 break;
866 case MCDI_EVENT_CODE_SENSOREVT:
867 efx_mcdi_sensor_event(efx, event);
868 break;
869 case MCDI_EVENT_CODE_SCHEDERR:
870 netif_info(efx, hw, efx->net_dev,
871 "MC Scheduler error address=0x%x\n", data);
872 break;
873 case MCDI_EVENT_CODE_REBOOT:
874 case MCDI_EVENT_CODE_MC_REBOOT:
875 netif_info(efx, hw, efx->net_dev, "MC Reboot\n");
876 efx_mcdi_ev_death(efx, -EIO);
877 break;
878 case MCDI_EVENT_CODE_MAC_STATS_DMA:
879
880 break;
881 case MCDI_EVENT_CODE_FLR:
882 efx_sriov_flr(efx, MCDI_EVENT_FIELD(*event, FLR_VF));
883 break;
884 case MCDI_EVENT_CODE_PTP_RX:
885 case MCDI_EVENT_CODE_PTP_FAULT:
886 case MCDI_EVENT_CODE_PTP_PPS:
887 efx_ptp_event(efx, event);
888 break;
889 case MCDI_EVENT_CODE_TX_FLUSH:
890 case MCDI_EVENT_CODE_RX_FLUSH:
891
892
893
894
895
896
897 BUILD_BUG_ON(MCDI_EVENT_TX_FLUSH_TO_DRIVER_LBN !=
898 MCDI_EVENT_RX_FLUSH_TO_DRIVER_LBN);
899 if (!MCDI_EVENT_FIELD(*event, TX_FLUSH_TO_DRIVER))
900 efx_ef10_handle_drain_event(efx);
901 break;
902 case MCDI_EVENT_CODE_TX_ERR:
903 case MCDI_EVENT_CODE_RX_ERR:
904 netif_err(efx, hw, efx->net_dev,
905 "%s DMA error (event: "EFX_QWORD_FMT")\n",
906 code == MCDI_EVENT_CODE_TX_ERR ? "TX" : "RX",
907 EFX_QWORD_VAL(*event));
908 efx_schedule_reset(efx, RESET_TYPE_DMA_ERROR);
909 break;
910 default:
911 netif_err(efx, hw, efx->net_dev, "Unknown MCDI event 0x%x\n",
912 code);
913 }
914}
915
916
917
918
919
920
921
922
923void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len)
924{
925 MCDI_DECLARE_BUF(outbuf,
926 max(MC_CMD_GET_VERSION_OUT_LEN,
927 MC_CMD_GET_CAPABILITIES_OUT_LEN));
928 size_t outlength;
929 const __le16 *ver_words;
930 size_t offset;
931 int rc;
932
933 BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0);
934 rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0,
935 outbuf, sizeof(outbuf), &outlength);
936 if (rc)
937 goto fail;
938 if (outlength < MC_CMD_GET_VERSION_OUT_LEN) {
939 rc = -EIO;
940 goto fail;
941 }
942
943 ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION);
944 offset = snprintf(buf, len, "%u.%u.%u.%u",
945 le16_to_cpu(ver_words[0]), le16_to_cpu(ver_words[1]),
946 le16_to_cpu(ver_words[2]), le16_to_cpu(ver_words[3]));
947
948
949
950
951 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) {
952 BUILD_BUG_ON(MC_CMD_GET_CAPABILITIES_IN_LEN != 0);
953 rc = efx_mcdi_rpc(efx, MC_CMD_GET_CAPABILITIES, NULL, 0,
954 outbuf, sizeof(outbuf), &outlength);
955 if (rc || outlength < MC_CMD_GET_CAPABILITIES_OUT_LEN)
956 offset += snprintf(
957 buf + offset, len - offset, " rx? tx?");
958 else
959 offset += snprintf(
960 buf + offset, len - offset, " rx%x tx%x",
961 MCDI_WORD(outbuf,
962 GET_CAPABILITIES_OUT_RX_DPCPU_FW_ID),
963 MCDI_WORD(outbuf,
964 GET_CAPABILITIES_OUT_TX_DPCPU_FW_ID));
965
966
967
968
969
970 if (WARN_ON(offset >= len))
971 buf[0] = 0;
972 }
973
974 return;
975
976fail:
977 netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
978 buf[0] = 0;
979}
980
981static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
982 bool *was_attached)
983{
984 MCDI_DECLARE_BUF(inbuf, MC_CMD_DRV_ATTACH_IN_LEN);
985 MCDI_DECLARE_BUF(outbuf, MC_CMD_DRV_ATTACH_EXT_OUT_LEN);
986 size_t outlen;
987 int rc;
988
989 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE,
990 driver_operating ? 1 : 0);
991 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1);
992 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_LOW_LATENCY);
993
994 rc = efx_mcdi_rpc(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf),
995 outbuf, sizeof(outbuf), &outlen);
996 if (rc)
997 goto fail;
998 if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) {
999 rc = -EIO;
1000 goto fail;
1001 }
1002
1003
1004
1005
1006
1007 if (driver_operating &&
1008 outlen >= MC_CMD_DRV_ATTACH_EXT_OUT_LEN &&
1009 (MCDI_DWORD(outbuf, DRV_ATTACH_EXT_OUT_FUNC_FLAGS) &
1010 (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL |
1011 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED)) !=
1012 (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL |
1013 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED)) {
1014 netif_err(efx, probe, efx->net_dev,
1015 "This driver version only supports one function per port\n");
1016 return -ENODEV;
1017 }
1018
1019 if (was_attached != NULL)
1020 *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE);
1021 return 0;
1022
1023fail:
1024 netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1025 return rc;
1026}
1027
1028int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address,
1029 u16 *fw_subtype_list, u32 *capabilities)
1030{
1031 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_BOARD_CFG_OUT_LENMAX);
1032 size_t outlen, i;
1033 int port_num = efx_port_num(efx);
1034 int rc;
1035
1036 BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0);
1037
1038 rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0,
1039 outbuf, sizeof(outbuf), &outlen);
1040 if (rc)
1041 goto fail;
1042
1043 if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
1044 rc = -EIO;
1045 goto fail;
1046 }
1047
1048 if (mac_address)
1049 memcpy(mac_address,
1050 port_num ?
1051 MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1) :
1052 MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0),
1053 ETH_ALEN);
1054 if (fw_subtype_list) {
1055 for (i = 0;
1056 i < MCDI_VAR_ARRAY_LEN(outlen,
1057 GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST);
1058 i++)
1059 fw_subtype_list[i] = MCDI_ARRAY_WORD(
1060 outbuf, GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST, i);
1061 for (; i < MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM; i++)
1062 fw_subtype_list[i] = 0;
1063 }
1064 if (capabilities) {
1065 if (port_num)
1066 *capabilities = MCDI_DWORD(outbuf,
1067 GET_BOARD_CFG_OUT_CAPABILITIES_PORT1);
1068 else
1069 *capabilities = MCDI_DWORD(outbuf,
1070 GET_BOARD_CFG_OUT_CAPABILITIES_PORT0);
1071 }
1072
1073 return 0;
1074
1075fail:
1076 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n",
1077 __func__, rc, (int)outlen);
1078
1079 return rc;
1080}
1081
1082int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq)
1083{
1084 MCDI_DECLARE_BUF(inbuf, MC_CMD_LOG_CTRL_IN_LEN);
1085 u32 dest = 0;
1086 int rc;
1087
1088 if (uart)
1089 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART;
1090 if (evq)
1091 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ;
1092
1093 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest);
1094 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq);
1095
1096 BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0);
1097
1098 rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf),
1099 NULL, 0, NULL);
1100 if (rc)
1101 goto fail;
1102
1103 return 0;
1104
1105fail:
1106 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1107 return rc;
1108}
1109
1110int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out)
1111{
1112 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TYPES_OUT_LEN);
1113 size_t outlen;
1114 int rc;
1115
1116 BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0);
1117
1118 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0,
1119 outbuf, sizeof(outbuf), &outlen);
1120 if (rc)
1121 goto fail;
1122 if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) {
1123 rc = -EIO;
1124 goto fail;
1125 }
1126
1127 *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES);
1128 return 0;
1129
1130fail:
1131 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
1132 __func__, rc);
1133 return rc;
1134}
1135
1136int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,
1137 size_t *size_out, size_t *erase_size_out,
1138 bool *protected_out)
1139{
1140 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_INFO_IN_LEN);
1141 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_INFO_OUT_LEN);
1142 size_t outlen;
1143 int rc;
1144
1145 MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type);
1146
1147 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf),
1148 outbuf, sizeof(outbuf), &outlen);
1149 if (rc)
1150 goto fail;
1151 if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) {
1152 rc = -EIO;
1153 goto fail;
1154 }
1155
1156 *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE);
1157 *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE);
1158 *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) &
1159 (1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN));
1160 return 0;
1161
1162fail:
1163 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1164 return rc;
1165}
1166
1167static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type)
1168{
1169 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_TEST_IN_LEN);
1170 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TEST_OUT_LEN);
1171 int rc;
1172
1173 MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type);
1174
1175 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf),
1176 outbuf, sizeof(outbuf), NULL);
1177 if (rc)
1178 return rc;
1179
1180 switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) {
1181 case MC_CMD_NVRAM_TEST_PASS:
1182 case MC_CMD_NVRAM_TEST_NOTSUPP:
1183 return 0;
1184 default:
1185 return -EIO;
1186 }
1187}
1188
1189int efx_mcdi_nvram_test_all(struct efx_nic *efx)
1190{
1191 u32 nvram_types;
1192 unsigned int type;
1193 int rc;
1194
1195 rc = efx_mcdi_nvram_types(efx, &nvram_types);
1196 if (rc)
1197 goto fail1;
1198
1199 type = 0;
1200 while (nvram_types != 0) {
1201 if (nvram_types & 1) {
1202 rc = efx_mcdi_nvram_test(efx, type);
1203 if (rc)
1204 goto fail2;
1205 }
1206 type++;
1207 nvram_types >>= 1;
1208 }
1209
1210 return 0;
1211
1212fail2:
1213 netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n",
1214 __func__, type);
1215fail1:
1216 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1217 return rc;
1218}
1219
1220static int efx_mcdi_read_assertion(struct efx_nic *efx)
1221{
1222 MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_ASSERTS_IN_LEN);
1223 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_ASSERTS_OUT_LEN);
1224 unsigned int flags, index;
1225 const char *reason;
1226 size_t outlen;
1227 int retry;
1228 int rc;
1229
1230
1231
1232
1233
1234
1235 retry = 2;
1236 do {
1237 MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1);
1238 rc = efx_mcdi_rpc(efx, MC_CMD_GET_ASSERTS,
1239 inbuf, MC_CMD_GET_ASSERTS_IN_LEN,
1240 outbuf, sizeof(outbuf), &outlen);
1241 } while ((rc == -EINTR || rc == -EIO) && retry-- > 0);
1242
1243 if (rc)
1244 return rc;
1245 if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN)
1246 return -EIO;
1247
1248
1249 flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS);
1250 if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
1251 return 0;
1252
1253 reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
1254 ? "system-level assertion"
1255 : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
1256 ? "thread-level assertion"
1257 : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
1258 ? "watchdog reset"
1259 : "unknown assertion";
1260 netif_err(efx, hw, efx->net_dev,
1261 "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason,
1262 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS),
1263 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS));
1264
1265
1266 for (index = 0;
1267 index < MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM;
1268 index++)
1269 netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n",
1270 1 + index,
1271 MCDI_ARRAY_DWORD(outbuf, GET_ASSERTS_OUT_GP_REGS_OFFS,
1272 index));
1273
1274 return 0;
1275}
1276
1277static void efx_mcdi_exit_assertion(struct efx_nic *efx)
1278{
1279 MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
1280
1281
1282
1283
1284
1285
1286
1287 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
1288 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS,
1289 MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION);
1290 (void) efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN,
1291 NULL, 0, NULL);
1292}
1293
1294int efx_mcdi_handle_assertion(struct efx_nic *efx)
1295{
1296 int rc;
1297
1298 rc = efx_mcdi_read_assertion(efx);
1299 if (rc)
1300 return rc;
1301
1302 efx_mcdi_exit_assertion(efx);
1303
1304 return 0;
1305}
1306
1307void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
1308{
1309 MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_ID_LED_IN_LEN);
1310 int rc;
1311
1312 BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF);
1313 BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON);
1314 BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT);
1315
1316 BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0);
1317
1318 MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode);
1319
1320 rc = efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf),
1321 NULL, 0, NULL);
1322 if (rc)
1323 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
1324 __func__, rc);
1325}
1326
1327static int efx_mcdi_reset_port(struct efx_nic *efx)
1328{
1329 int rc = efx_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, NULL, 0, NULL, 0, NULL);
1330 if (rc)
1331 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
1332 __func__, rc);
1333 return rc;
1334}
1335
1336static int efx_mcdi_reset_mc(struct efx_nic *efx)
1337{
1338 MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
1339 int rc;
1340
1341 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
1342 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0);
1343 rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf),
1344 NULL, 0, NULL);
1345
1346 if (rc == -EIO)
1347 return 0;
1348 if (rc == 0)
1349 rc = -EIO;
1350 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1351 return rc;
1352}
1353
1354enum reset_type efx_mcdi_map_reset_reason(enum reset_type reason)
1355{
1356 return RESET_TYPE_RECOVER_OR_ALL;
1357}
1358
1359int efx_mcdi_reset(struct efx_nic *efx, enum reset_type method)
1360{
1361 int rc;
1362
1363
1364 rc = efx_mcdi_handle_assertion(efx);
1365 if (rc)
1366 return rc;
1367
1368 if (method == RESET_TYPE_WORLD)
1369 return efx_mcdi_reset_mc(efx);
1370 else
1371 return efx_mcdi_reset_port(efx);
1372}
1373
1374static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type,
1375 const u8 *mac, int *id_out)
1376{
1377 MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_SET_IN_LEN);
1378 MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_SET_OUT_LEN);
1379 size_t outlen;
1380 int rc;
1381
1382 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type);
1383 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE,
1384 MC_CMD_FILTER_MODE_SIMPLE);
1385 memcpy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac, ETH_ALEN);
1386
1387 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf),
1388 outbuf, sizeof(outbuf), &outlen);
1389 if (rc)
1390 goto fail;
1391
1392 if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) {
1393 rc = -EIO;
1394 goto fail;
1395 }
1396
1397 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID);
1398
1399 return 0;
1400
1401fail:
1402 *id_out = -1;
1403 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1404 return rc;
1405
1406}
1407
1408
1409int
1410efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out)
1411{
1412 return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out);
1413}
1414
1415
1416int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out)
1417{
1418 MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_GET_OUT_LEN);
1419 size_t outlen;
1420 int rc;
1421
1422 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0,
1423 outbuf, sizeof(outbuf), &outlen);
1424 if (rc)
1425 goto fail;
1426
1427 if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) {
1428 rc = -EIO;
1429 goto fail;
1430 }
1431
1432 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID);
1433
1434 return 0;
1435
1436fail:
1437 *id_out = -1;
1438 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1439 return rc;
1440}
1441
1442
1443int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id)
1444{
1445 MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_REMOVE_IN_LEN);
1446 int rc;
1447
1448 MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id);
1449
1450 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf),
1451 NULL, 0, NULL);
1452 if (rc)
1453 goto fail;
1454
1455 return 0;
1456
1457fail:
1458 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1459 return rc;
1460}
1461
1462int efx_mcdi_flush_rxqs(struct efx_nic *efx)
1463{
1464 struct efx_channel *channel;
1465 struct efx_rx_queue *rx_queue;
1466 MCDI_DECLARE_BUF(inbuf,
1467 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS));
1468 int rc, count;
1469
1470 BUILD_BUG_ON(EFX_MAX_CHANNELS >
1471 MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM);
1472
1473 count = 0;
1474 efx_for_each_channel(channel, efx) {
1475 efx_for_each_channel_rx_queue(rx_queue, channel) {
1476 if (rx_queue->flush_pending) {
1477 rx_queue->flush_pending = false;
1478 atomic_dec(&efx->rxq_flush_pending);
1479 MCDI_SET_ARRAY_DWORD(
1480 inbuf, FLUSH_RX_QUEUES_IN_QID_OFST,
1481 count, efx_rx_queue_index(rx_queue));
1482 count++;
1483 }
1484 }
1485 }
1486
1487 rc = efx_mcdi_rpc(efx, MC_CMD_FLUSH_RX_QUEUES, inbuf,
1488 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(count), NULL, 0, NULL);
1489 WARN_ON(rc < 0);
1490
1491 return rc;
1492}
1493
1494int efx_mcdi_wol_filter_reset(struct efx_nic *efx)
1495{
1496 int rc;
1497
1498 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL);
1499 if (rc)
1500 goto fail;
1501
1502 return 0;
1503
1504fail:
1505 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1506 return rc;
1507}
1508
1509int efx_mcdi_set_workaround(struct efx_nic *efx, u32 type, bool enabled)
1510{
1511 MCDI_DECLARE_BUF(inbuf, MC_CMD_WORKAROUND_IN_LEN);
1512
1513 BUILD_BUG_ON(MC_CMD_WORKAROUND_OUT_LEN != 0);
1514 MCDI_SET_DWORD(inbuf, WORKAROUND_IN_TYPE, type);
1515 MCDI_SET_DWORD(inbuf, WORKAROUND_IN_ENABLED, enabled);
1516 return efx_mcdi_rpc(efx, MC_CMD_WORKAROUND, inbuf, sizeof(inbuf),
1517 NULL, 0, NULL);
1518}
1519
1520#ifdef CONFIG_SFC_MTD
1521
1522#define EFX_MCDI_NVRAM_LEN_MAX 128
1523
1524static int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type)
1525{
1526 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_START_IN_LEN);
1527 int rc;
1528
1529 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type);
1530
1531 BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0);
1532
1533 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf),
1534 NULL, 0, NULL);
1535 if (rc)
1536 goto fail;
1537
1538 return 0;
1539
1540fail:
1541 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1542 return rc;
1543}
1544
1545static int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,
1546 loff_t offset, u8 *buffer, size_t length)
1547{
1548 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_READ_IN_LEN);
1549 MCDI_DECLARE_BUF(outbuf,
1550 MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX));
1551 size_t outlen;
1552 int rc;
1553
1554 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type);
1555 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset);
1556 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length);
1557
1558 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf),
1559 outbuf, sizeof(outbuf), &outlen);
1560 if (rc)
1561 goto fail;
1562
1563 memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length);
1564 return 0;
1565
1566fail:
1567 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1568 return rc;
1569}
1570
1571static int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
1572 loff_t offset, const u8 *buffer, size_t length)
1573{
1574 MCDI_DECLARE_BUF(inbuf,
1575 MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX));
1576 int rc;
1577
1578 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type);
1579 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset);
1580 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length);
1581 memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length);
1582
1583 BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0);
1584
1585 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf,
1586 ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4),
1587 NULL, 0, NULL);
1588 if (rc)
1589 goto fail;
1590
1591 return 0;
1592
1593fail:
1594 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1595 return rc;
1596}
1597
1598static int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,
1599 loff_t offset, size_t length)
1600{
1601 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_ERASE_IN_LEN);
1602 int rc;
1603
1604 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type);
1605 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset);
1606 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length);
1607
1608 BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0);
1609
1610 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf),
1611 NULL, 0, NULL);
1612 if (rc)
1613 goto fail;
1614
1615 return 0;
1616
1617fail:
1618 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1619 return rc;
1620}
1621
1622static int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type)
1623{
1624 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN);
1625 int rc;
1626
1627 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type);
1628
1629 BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN != 0);
1630
1631 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf),
1632 NULL, 0, NULL);
1633 if (rc)
1634 goto fail;
1635
1636 return 0;
1637
1638fail:
1639 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1640 return rc;
1641}
1642
1643int efx_mcdi_mtd_read(struct mtd_info *mtd, loff_t start,
1644 size_t len, size_t *retlen, u8 *buffer)
1645{
1646 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1647 struct efx_nic *efx = mtd->priv;
1648 loff_t offset = start;
1649 loff_t end = min_t(loff_t, start + len, mtd->size);
1650 size_t chunk;
1651 int rc = 0;
1652
1653 while (offset < end) {
1654 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
1655 rc = efx_mcdi_nvram_read(efx, part->nvram_type, offset,
1656 buffer, chunk);
1657 if (rc)
1658 goto out;
1659 offset += chunk;
1660 buffer += chunk;
1661 }
1662out:
1663 *retlen = offset - start;
1664 return rc;
1665}
1666
1667int efx_mcdi_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
1668{
1669 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1670 struct efx_nic *efx = mtd->priv;
1671 loff_t offset = start & ~((loff_t)(mtd->erasesize - 1));
1672 loff_t end = min_t(loff_t, start + len, mtd->size);
1673 size_t chunk = part->common.mtd.erasesize;
1674 int rc = 0;
1675
1676 if (!part->updating) {
1677 rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
1678 if (rc)
1679 goto out;
1680 part->updating = true;
1681 }
1682
1683
1684
1685
1686 while (offset < end) {
1687 rc = efx_mcdi_nvram_erase(efx, part->nvram_type, offset,
1688 chunk);
1689 if (rc)
1690 goto out;
1691 offset += chunk;
1692 }
1693out:
1694 return rc;
1695}
1696
1697int efx_mcdi_mtd_write(struct mtd_info *mtd, loff_t start,
1698 size_t len, size_t *retlen, const u8 *buffer)
1699{
1700 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1701 struct efx_nic *efx = mtd->priv;
1702 loff_t offset = start;
1703 loff_t end = min_t(loff_t, start + len, mtd->size);
1704 size_t chunk;
1705 int rc = 0;
1706
1707 if (!part->updating) {
1708 rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
1709 if (rc)
1710 goto out;
1711 part->updating = true;
1712 }
1713
1714 while (offset < end) {
1715 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
1716 rc = efx_mcdi_nvram_write(efx, part->nvram_type, offset,
1717 buffer, chunk);
1718 if (rc)
1719 goto out;
1720 offset += chunk;
1721 buffer += chunk;
1722 }
1723out:
1724 *retlen = offset - start;
1725 return rc;
1726}
1727
1728int efx_mcdi_mtd_sync(struct mtd_info *mtd)
1729{
1730 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1731 struct efx_nic *efx = mtd->priv;
1732 int rc = 0;
1733
1734 if (part->updating) {
1735 part->updating = false;
1736 rc = efx_mcdi_nvram_update_finish(efx, part->nvram_type);
1737 }
1738
1739 return rc;
1740}
1741
1742void efx_mcdi_mtd_rename(struct efx_mtd_partition *part)
1743{
1744 struct efx_mcdi_mtd_partition *mcdi_part =
1745 container_of(part, struct efx_mcdi_mtd_partition, common);
1746 struct efx_nic *efx = part->mtd.priv;
1747
1748 snprintf(part->name, sizeof(part->name), "%s %s:%02x",
1749 efx->name, part->type_name, mcdi_part->fw_subtype);
1750}
1751
1752#endif
1753