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30#include "../wifi.h"
31#include "../core.h"
32#include "../pci.h"
33#include "../base.h"
34#include "reg.h"
35#include "def.h"
36#include "phy.h"
37#include "dm.h"
38#include "hw.h"
39#include "sw.h"
40#include "trx.h"
41#include "led.h"
42#include "table.h"
43
44#include <linux/vmalloc.h>
45#include <linux/module.h>
46
47static void rtl88e_init_aspm_vars(struct ieee80211_hw *hw)
48{
49 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
50
51
52 rtlpci->const_amdpci_aspm = 0;
53
54
55
56
57
58
59
60
61
62 rtlpci->const_pci_aspm = 3;
63
64
65 rtlpci->const_devicepci_aspm_setting = 0x03;
66
67
68 rtlpci->const_hostpci_aspm_setting = 0x02;
69
70
71
72
73
74
75
76
77 rtlpci->const_hwsw_rfoff_d3 = 0;
78
79
80
81
82
83
84
85 rtlpci->const_support_pciaspm = 1;
86}
87
88int rtl88e_init_sw_vars(struct ieee80211_hw *hw)
89{
90 int err = 0;
91 struct rtl_priv *rtlpriv = rtl_priv(hw);
92 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
93 u8 tid;
94
95 rtl8188ee_bt_reg_init(hw);
96
97 rtlpriv->dm.dm_initialgain_enable = 1;
98 rtlpriv->dm.dm_flag = 0;
99 rtlpriv->dm.disable_framebursting = 0;
100 rtlpriv->dm.thermalvalue = 0;
101 rtlpci->transmit_config = CFENDFORM | BIT(15);
102
103
104 rtlpriv->rtlhal.current_bandtype = BAND_ON_2_4G;
105 rtlpriv->rtlhal.bandset = BAND_ON_2_4G;
106 rtlpriv->rtlhal.macphymode = SINGLEMAC_SINGLEPHY;
107
108 rtlpci->receive_config = (RCR_APPFCS |
109 RCR_APP_MIC |
110 RCR_APP_ICV |
111 RCR_APP_PHYST_RXFF |
112 RCR_HTC_LOC_CTRL |
113 RCR_AMF |
114 RCR_ACF |
115 RCR_ADF |
116 RCR_AICV |
117 RCR_ACRC32 |
118 RCR_AB |
119 RCR_AM |
120 RCR_APM |
121 0);
122
123 rtlpci->irq_mask[0] =
124 (u32) (IMR_PSTIMEOUT |
125 IMR_HSISR_IND_ON_INT |
126 IMR_C2HCMD |
127 IMR_HIGHDOK |
128 IMR_MGNTDOK |
129 IMR_BKDOK |
130 IMR_BEDOK |
131 IMR_VIDOK |
132 IMR_VODOK |
133 IMR_RDU |
134 IMR_ROK |
135 0);
136 rtlpci->irq_mask[1] = (u32) (IMR_RXFOVW | 0);
137 rtlpci->sys_irq_mask = (u32) (HSIMR_PDN_INT_EN | HSIMR_RON_INT_EN);
138
139
140 rtlpriv->dbg.global_debuglevel = rtlpriv->cfg->mod_params->debug;
141
142 rtlpriv->psc.inactiveps = rtlpriv->cfg->mod_params->inactiveps;
143 rtlpriv->psc.swctrl_lps = rtlpriv->cfg->mod_params->swctrl_lps;
144 rtlpriv->psc.fwctrl_lps = rtlpriv->cfg->mod_params->fwctrl_lps;
145 if (!rtlpriv->psc.inactiveps)
146 pr_info("rtl8188ee: Power Save off (module option)\n");
147 if (!rtlpriv->psc.fwctrl_lps)
148 pr_info("rtl8188ee: FW Power Save off (module option)\n");
149 rtlpriv->psc.reg_fwctrl_lps = 3;
150 rtlpriv->psc.reg_max_lps_awakeintvl = 5;
151
152
153
154 rtl88e_init_aspm_vars(hw);
155
156 if (rtlpriv->psc.reg_fwctrl_lps == 1)
157 rtlpriv->psc.fwctrl_psmode = FW_PS_MIN_MODE;
158 else if (rtlpriv->psc.reg_fwctrl_lps == 2)
159 rtlpriv->psc.fwctrl_psmode = FW_PS_MAX_MODE;
160 else if (rtlpriv->psc.reg_fwctrl_lps == 3)
161 rtlpriv->psc.fwctrl_psmode = FW_PS_DTIM_MODE;
162
163
164 rtlpriv->rtlhal.pfirmware = vmalloc(0x8000);
165 if (!rtlpriv->rtlhal.pfirmware) {
166 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
167 "Can't alloc buffer for fw.\n");
168 return 1;
169 }
170
171 rtlpriv->cfg->fw_name = "rtlwifi/rtl8188efw.bin";
172 rtlpriv->max_fw_size = 0x8000;
173 pr_info("Using firmware %s\n", rtlpriv->cfg->fw_name);
174 err = request_firmware_nowait(THIS_MODULE, 1, rtlpriv->cfg->fw_name,
175 rtlpriv->io.dev, GFP_KERNEL, hw,
176 rtl_fw_cb);
177 if (err) {
178 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
179 "Failed to request firmware!\n");
180 return 1;
181 }
182
183
184 rtlpriv->rtlhal.earlymode_enable = false;
185 rtlpriv->rtlhal.max_earlymode_num = 10;
186 for (tid = 0; tid < 8; tid++)
187 skb_queue_head_init(&rtlpriv->mac80211.skb_waitq[tid]);
188
189
190 rtlpriv->psc.low_power_enable = false;
191 if (rtlpriv->psc.low_power_enable) {
192 init_timer(&rtlpriv->works.fw_clockoff_timer);
193 setup_timer(&rtlpriv->works.fw_clockoff_timer,
194 rtl88ee_fw_clk_off_timer_callback,
195 (unsigned long)hw);
196 }
197
198 init_timer(&rtlpriv->works.fast_antenna_training_timer);
199 setup_timer(&rtlpriv->works.fast_antenna_training_timer,
200 rtl88e_dm_fast_antenna_training_callback,
201 (unsigned long)hw);
202 return err;
203}
204
205void rtl88e_deinit_sw_vars(struct ieee80211_hw *hw)
206{
207 struct rtl_priv *rtlpriv = rtl_priv(hw);
208
209 if (rtlpriv->rtlhal.pfirmware) {
210 vfree(rtlpriv->rtlhal.pfirmware);
211 rtlpriv->rtlhal.pfirmware = NULL;
212 }
213
214 if (rtlpriv->psc.low_power_enable)
215 del_timer_sync(&rtlpriv->works.fw_clockoff_timer);
216
217 del_timer_sync(&rtlpriv->works.fast_antenna_training_timer);
218}
219
220static struct rtl_hal_ops rtl8188ee_hal_ops = {
221 .init_sw_vars = rtl88e_init_sw_vars,
222 .deinit_sw_vars = rtl88e_deinit_sw_vars,
223 .read_eeprom_info = rtl88ee_read_eeprom_info,
224 .interrupt_recognized = rtl88ee_interrupt_recognized,
225 .hw_init = rtl88ee_hw_init,
226 .hw_disable = rtl88ee_card_disable,
227 .hw_suspend = rtl88ee_suspend,
228 .hw_resume = rtl88ee_resume,
229 .enable_interrupt = rtl88ee_enable_interrupt,
230 .disable_interrupt = rtl88ee_disable_interrupt,
231 .set_network_type = rtl88ee_set_network_type,
232 .set_chk_bssid = rtl88ee_set_check_bssid,
233 .set_qos = rtl88ee_set_qos,
234 .set_bcn_reg = rtl88ee_set_beacon_related_registers,
235 .set_bcn_intv = rtl88ee_set_beacon_interval,
236 .update_interrupt_mask = rtl88ee_update_interrupt_mask,
237 .get_hw_reg = rtl88ee_get_hw_reg,
238 .set_hw_reg = rtl88ee_set_hw_reg,
239 .update_rate_tbl = rtl88ee_update_hal_rate_tbl,
240 .fill_tx_desc = rtl88ee_tx_fill_desc,
241 .fill_tx_cmddesc = rtl88ee_tx_fill_cmddesc,
242 .query_rx_desc = rtl88ee_rx_query_desc,
243 .set_channel_access = rtl88ee_update_channel_access_setting,
244 .radio_onoff_checking = rtl88ee_gpio_radio_on_off_checking,
245 .set_bw_mode = rtl88e_phy_set_bw_mode,
246 .switch_channel = rtl88e_phy_sw_chnl,
247 .dm_watchdog = rtl88e_dm_watchdog,
248 .scan_operation_backup = rtl_phy_scan_operation_backup,
249 .set_rf_power_state = rtl88e_phy_set_rf_power_state,
250 .led_control = rtl88ee_led_control,
251 .set_desc = rtl88ee_set_desc,
252 .get_desc = rtl88ee_get_desc,
253 .tx_polling = rtl88ee_tx_polling,
254 .enable_hw_sec = rtl88ee_enable_hw_security_config,
255 .set_key = rtl88ee_set_key,
256 .init_sw_leds = rtl88ee_init_sw_leds,
257 .allow_all_destaddr = rtl88ee_allow_all_destaddr,
258 .get_bbreg = rtl88e_phy_query_bb_reg,
259 .set_bbreg = rtl88e_phy_set_bb_reg,
260 .get_rfreg = rtl88e_phy_query_rf_reg,
261 .set_rfreg = rtl88e_phy_set_rf_reg,
262};
263
264static struct rtl_mod_params rtl88ee_mod_params = {
265 .sw_crypto = false,
266 .inactiveps = true,
267 .swctrl_lps = false,
268 .fwctrl_lps = true,
269 .debug = DBG_EMERG,
270};
271
272static struct rtl_hal_cfg rtl88ee_hal_cfg = {
273 .bar_id = 2,
274 .write_readback = true,
275 .name = "rtl88e_pci",
276 .ops = &rtl8188ee_hal_ops,
277 .mod_params = &rtl88ee_mod_params,
278
279 .maps[SYS_ISO_CTRL] = REG_SYS_ISO_CTRL,
280 .maps[SYS_FUNC_EN] = REG_SYS_FUNC_EN,
281 .maps[SYS_CLK] = REG_SYS_CLKR,
282 .maps[MAC_RCR_AM] = AM,
283 .maps[MAC_RCR_AB] = AB,
284 .maps[MAC_RCR_ACRC32] = ACRC32,
285 .maps[MAC_RCR_ACF] = ACF,
286 .maps[MAC_RCR_AAP] = AAP,
287
288 .maps[EFUSE_ACCESS] = REG_EFUSE_ACCESS,
289
290 .maps[EFUSE_TEST] = REG_EFUSE_TEST,
291 .maps[EFUSE_CTRL] = REG_EFUSE_CTRL,
292 .maps[EFUSE_CLK] = 0,
293 .maps[EFUSE_CLK_CTRL] = REG_EFUSE_CTRL,
294 .maps[EFUSE_PWC_EV12V] = PWC_EV12V,
295 .maps[EFUSE_FEN_ELDR] = FEN_ELDR,
296 .maps[EFUSE_LOADER_CLK_EN] = LOADER_CLK_EN,
297 .maps[EFUSE_ANA8M] = ANA8M,
298 .maps[EFUSE_HWSET_MAX_SIZE] = HWSET_MAX_SIZE,
299 .maps[EFUSE_MAX_SECTION_MAP] = EFUSE_MAX_SECTION,
300 .maps[EFUSE_REAL_CONTENT_SIZE] = EFUSE_REAL_CONTENT_LEN,
301 .maps[EFUSE_OOB_PROTECT_BYTES_LEN] = EFUSE_OOB_PROTECT_BYTES,
302
303 .maps[RWCAM] = REG_CAMCMD,
304 .maps[WCAMI] = REG_CAMWRITE,
305 .maps[RCAMO] = REG_CAMREAD,
306 .maps[CAMDBG] = REG_CAMDBG,
307 .maps[SECR] = REG_SECCFG,
308 .maps[SEC_CAM_NONE] = CAM_NONE,
309 .maps[SEC_CAM_WEP40] = CAM_WEP40,
310 .maps[SEC_CAM_TKIP] = CAM_TKIP,
311 .maps[SEC_CAM_AES] = CAM_AES,
312 .maps[SEC_CAM_WEP104] = CAM_WEP104,
313
314 .maps[RTL_IMR_BCNDMAINT6] = IMR_BCNDMAINT6,
315 .maps[RTL_IMR_BCNDMAINT5] = IMR_BCNDMAINT5,
316 .maps[RTL_IMR_BCNDMAINT4] = IMR_BCNDMAINT4,
317 .maps[RTL_IMR_BCNDMAINT3] = IMR_BCNDMAINT3,
318 .maps[RTL_IMR_BCNDMAINT2] = IMR_BCNDMAINT2,
319 .maps[RTL_IMR_BCNDMAINT1] = IMR_BCNDMAINT1,
320
321 .maps[RTL_IMR_BCNDOK7] = IMR_BCNDOK7,
322 .maps[RTL_IMR_BCNDOK6] = IMR_BCNDOK6,
323 .maps[RTL_IMR_BCNDOK5] = IMR_BCNDOK5,
324 .maps[RTL_IMR_BCNDOK4] = IMR_BCNDOK4,
325 .maps[RTL_IMR_BCNDOK3] = IMR_BCNDOK3,
326 .maps[RTL_IMR_BCNDOK2] = IMR_BCNDOK2,
327 .maps[RTL_IMR_BCNDOK1] = IMR_BCNDOK1,
328
329
330
331 .maps[RTL_IMR_TXFOVW] = IMR_TXFOVW,
332 .maps[RTL_IMR_PSTIMEOUT] = IMR_PSTIMEOUT,
333 .maps[RTL_IMR_BCNINT] = IMR_BCNDMAINT0,
334 .maps[RTL_IMR_RXFOVW] = IMR_RXFOVW,
335 .maps[RTL_IMR_RDU] = IMR_RDU,
336 .maps[RTL_IMR_ATIMEND] = IMR_ATIMEND,
337 .maps[RTL_IMR_BDOK] = IMR_BCNDOK0,
338 .maps[RTL_IMR_MGNTDOK] = IMR_MGNTDOK,
339 .maps[RTL_IMR_TBDER] = IMR_TBDER,
340 .maps[RTL_IMR_HIGHDOK] = IMR_HIGHDOK,
341 .maps[RTL_IMR_TBDOK] = IMR_TBDOK,
342 .maps[RTL_IMR_BKDOK] = IMR_BKDOK,
343 .maps[RTL_IMR_BEDOK] = IMR_BEDOK,
344 .maps[RTL_IMR_VIDOK] = IMR_VIDOK,
345 .maps[RTL_IMR_VODOK] = IMR_VODOK,
346 .maps[RTL_IMR_ROK] = IMR_ROK,
347 .maps[RTL_IBSS_INT_MASKS] = (IMR_BCNDMAINT0 | IMR_TBDOK | IMR_TBDER),
348
349 .maps[RTL_RC_CCK_RATE1M] = DESC92C_RATE1M,
350 .maps[RTL_RC_CCK_RATE2M] = DESC92C_RATE2M,
351 .maps[RTL_RC_CCK_RATE5_5M] = DESC92C_RATE5_5M,
352 .maps[RTL_RC_CCK_RATE11M] = DESC92C_RATE11M,
353 .maps[RTL_RC_OFDM_RATE6M] = DESC92C_RATE6M,
354 .maps[RTL_RC_OFDM_RATE9M] = DESC92C_RATE9M,
355 .maps[RTL_RC_OFDM_RATE12M] = DESC92C_RATE12M,
356 .maps[RTL_RC_OFDM_RATE18M] = DESC92C_RATE18M,
357 .maps[RTL_RC_OFDM_RATE24M] = DESC92C_RATE24M,
358 .maps[RTL_RC_OFDM_RATE36M] = DESC92C_RATE36M,
359 .maps[RTL_RC_OFDM_RATE48M] = DESC92C_RATE48M,
360 .maps[RTL_RC_OFDM_RATE54M] = DESC92C_RATE54M,
361
362 .maps[RTL_RC_HT_RATEMCS7] = DESC92C_RATEMCS7,
363 .maps[RTL_RC_HT_RATEMCS15] = DESC92C_RATEMCS15,
364};
365
366static DEFINE_PCI_DEVICE_TABLE(rtl88ee_pci_ids) = {
367 {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8179, rtl88ee_hal_cfg)},
368 {},
369};
370
371MODULE_DEVICE_TABLE(pci, rtl88ee_pci_ids);
372
373MODULE_AUTHOR("zhiyuan_yang <zhiyuan_yang@realsil.com.cn>");
374MODULE_AUTHOR("Realtek WlanFAE <wlanfae@realtek.com>");
375MODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>");
376MODULE_LICENSE("GPL");
377MODULE_DESCRIPTION("Realtek 8188E 802.11n PCI wireless");
378MODULE_FIRMWARE("rtlwifi/rtl8188efw.bin");
379
380module_param_named(swenc, rtl88ee_mod_params.sw_crypto, bool, 0444);
381module_param_named(debug, rtl88ee_mod_params.debug, int, 0444);
382module_param_named(ips, rtl88ee_mod_params.inactiveps, bool, 0444);
383module_param_named(swlps, rtl88ee_mod_params.swctrl_lps, bool, 0444);
384module_param_named(fwlps, rtl88ee_mod_params.fwctrl_lps, bool, 0444);
385MODULE_PARM_DESC(swenc, "Set to 1 for software crypto (default 0)\n");
386MODULE_PARM_DESC(ips, "Set to 0 to not use link power save (default 1)\n");
387MODULE_PARM_DESC(swlps, "Set to 1 to use SW control power save (default 0)\n");
388MODULE_PARM_DESC(fwlps, "Set to 1 to use FW control power save (default 1)\n");
389MODULE_PARM_DESC(debug, "Set debug level (0-5) (default 0)");
390
391static SIMPLE_DEV_PM_OPS(rtlwifi_pm_ops, rtl_pci_suspend, rtl_pci_resume);
392
393static struct pci_driver rtl88ee_driver = {
394 .name = KBUILD_MODNAME,
395 .id_table = rtl88ee_pci_ids,
396 .probe = rtl_pci_probe,
397 .remove = rtl_pci_disconnect,
398 .driver.pm = &rtlwifi_pm_ops,
399};
400
401module_pci_driver(rtl88ee_driver);
402
