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30#include "../wifi.h"
31#include "../pci.h"
32#include "../base.h"
33#include "../stats.h"
34#include "reg.h"
35#include "def.h"
36#include "phy.h"
37#include "trx.h"
38#include "led.h"
39#include "dm.h"
40
41static u8 _rtl88ee_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue)
42{
43 __le16 fc = rtl_get_fc(skb);
44
45 if (unlikely(ieee80211_is_beacon(fc)))
46 return QSLT_BEACON;
47 if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
48 return QSLT_MGNT;
49
50 return skb->priority;
51}
52
53static void _rtl88ee_query_rxphystatus(struct ieee80211_hw *hw,
54 struct rtl_stats *pstatus, u8 *pdesc,
55 struct rx_fwinfo_88e *p_drvinfo,
56 bool bpacket_match_bssid,
57 bool bpacket_toself, bool packet_beacon)
58{
59 struct rtl_priv *rtlpriv = rtl_priv(hw);
60 struct rtl_ps_ctl *ppsc = rtl_psc(rtlpriv);
61 struct phy_sts_cck_8192s_t *cck_buf;
62 struct phy_status_rpt *phystrpt = (struct phy_status_rpt *)p_drvinfo;
63 struct rtl_dm *rtldm = rtl_dm(rtl_priv(hw));
64 char rx_pwr_all = 0, rx_pwr[4];
65 u8 rf_rx_num = 0, evm, pwdb_all;
66 u8 i, max_spatial_stream;
67 u32 rssi, total_rssi = 0;
68 bool is_cck = pstatus->is_cck;
69 u8 lan_idx, vga_idx;
70
71
72 pstatus->packet_matchbssid = bpacket_match_bssid;
73 pstatus->packet_toself = bpacket_toself;
74 pstatus->packet_beacon = packet_beacon;
75 pstatus->rx_mimo_sig_qual[0] = -1;
76 pstatus->rx_mimo_sig_qual[1] = -1;
77
78 if (is_cck) {
79 u8 cck_hipwr;
80 u8 cck_agc_rpt;
81
82 cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo;
83 cck_agc_rpt = cck_buf->cck_agc_rpt;
84
85
86
87
88
89 if (ppsc->rfpwr_state == ERFON)
90 cck_hipwr = rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2,
91 BIT(9));
92 else
93 cck_hipwr = false;
94
95 lan_idx = ((cck_agc_rpt & 0xE0) >> 5);
96 vga_idx = (cck_agc_rpt & 0x1f);
97 switch (lan_idx) {
98 case 7:
99 if (vga_idx <= 27)
100 rx_pwr_all = -100 + 2 * (27 - vga_idx);
101 else
102 rx_pwr_all = -100;
103 break;
104 case 6:
105 rx_pwr_all = -48 + 2 * (2 - vga_idx);
106 break;
107 case 5:
108 rx_pwr_all = -42 + 2 * (7 - vga_idx);
109 break;
110 case 4:
111 rx_pwr_all = -36 + 2 * (7 - vga_idx);
112 break;
113 case 3:
114 rx_pwr_all = -24 + 2 * (7 - vga_idx);
115 break;
116 case 2:
117 if (cck_hipwr)
118 rx_pwr_all = -12 + 2 * (5 - vga_idx);
119 else
120 rx_pwr_all = -6 + 2 * (5 - vga_idx);
121 break;
122 case 1:
123 rx_pwr_all = 8 - 2 * vga_idx;
124 break;
125 case 0:
126 rx_pwr_all = 14 - 2 * vga_idx;
127 break;
128 default:
129 break;
130 }
131 rx_pwr_all += 6;
132 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
133
134
135
136
137 pwdb_all += 6;
138 if (pwdb_all > 100)
139 pwdb_all = 100;
140
141
142
143 if (pwdb_all > 34 && pwdb_all <= 42)
144 pwdb_all -= 2;
145 else if (pwdb_all > 26 && pwdb_all <= 34)
146 pwdb_all -= 6;
147 else if (pwdb_all > 14 && pwdb_all <= 26)
148 pwdb_all -= 8;
149 else if (pwdb_all > 4 && pwdb_all <= 14)
150 pwdb_all -= 4;
151 if (cck_hipwr == false) {
152 if (pwdb_all >= 80)
153 pwdb_all = ((pwdb_all - 80)<<1) +
154 ((pwdb_all - 80)>>1) + 80;
155 else if ((pwdb_all <= 78) && (pwdb_all >= 20))
156 pwdb_all += 3;
157 if (pwdb_all > 100)
158 pwdb_all = 100;
159 }
160
161 pstatus->rx_pwdb_all = pwdb_all;
162 pstatus->recvsignalpower = rx_pwr_all;
163
164
165 if (bpacket_match_bssid) {
166 u8 sq;
167
168 if (pstatus->rx_pwdb_all > 40) {
169 sq = 100;
170 } else {
171 sq = cck_buf->sq_rpt;
172 if (sq > 64)
173 sq = 0;
174 else if (sq < 20)
175 sq = 100;
176 else
177 sq = ((64 - sq) * 100) / 44;
178 }
179
180 pstatus->signalquality = sq;
181 pstatus->rx_mimo_sig_qual[0] = sq;
182 pstatus->rx_mimo_sig_qual[1] = -1;
183 }
184 } else {
185 rtlpriv->dm.rfpath_rxenable[0] =
186 rtlpriv->dm.rfpath_rxenable[1] = true;
187
188
189 for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) {
190
191 if (rtlpriv->dm.rfpath_rxenable[i])
192 rf_rx_num++;
193
194 rx_pwr[i] = ((p_drvinfo->gain_trsw[i] & 0x3f) * 2)-110;
195
196
197 rssi = rtl_query_rxpwrpercentage(rx_pwr[i]);
198 total_rssi += rssi;
199
200
201 rtlpriv->stats.rx_snr_db[i] = p_drvinfo->rxsnr[i] / 2;
202
203
204 if (bpacket_match_bssid)
205 pstatus->rx_mimo_signalstrength[i] = (u8) rssi;
206 }
207
208
209
210
211 rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
212
213 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
214 pstatus->rx_pwdb_all = pwdb_all;
215 pstatus->rxpower = rx_pwr_all;
216 pstatus->recvsignalpower = rx_pwr_all;
217
218
219 if (pstatus->is_ht && pstatus->rate >= DESC92C_RATEMCS8 &&
220 pstatus->rate <= DESC92C_RATEMCS15)
221 max_spatial_stream = 2;
222 else
223 max_spatial_stream = 1;
224
225 for (i = 0; i < max_spatial_stream; i++) {
226 evm = rtl_evm_db_to_percentage(p_drvinfo->rxevm[i]);
227
228 if (bpacket_match_bssid) {
229
230
231
232 if (i == 0)
233 pstatus->signalquality = evm & 0xff;
234 pstatus->rx_mimo_sig_qual[i] = evm & 0xff;
235 }
236 }
237 }
238
239
240
241
242 if (is_cck)
243 pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
244 pwdb_all));
245 else if (rf_rx_num != 0)
246 pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
247 total_rssi /= rf_rx_num));
248
249 rtldm->fat_table.antsel_rx_keep_0 = phystrpt->ant_sel;
250 rtldm->fat_table.antsel_rx_keep_1 = phystrpt->ant_sel_b;
251 rtldm->fat_table.antsel_rx_keep_2 = phystrpt->antsel_rx_keep_2;
252}
253
254static void _rtl88ee_smart_antenna(struct ieee80211_hw *hw,
255 struct rtl_stats *pstatus)
256{
257 struct rtl_dm *rtldm = rtl_dm(rtl_priv(hw));
258 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
259 u8 ant_mux;
260 struct fast_ant_training *pfat = &(rtldm->fat_table);
261
262 if (rtlefuse->antenna_div_type == CG_TRX_SMART_ANTDIV) {
263 if (pfat->fat_state == FAT_TRAINING_STATE) {
264 if (pstatus->packet_toself) {
265 ant_mux = (pfat->antsel_rx_keep_2 << 2) |
266 (pfat->antsel_rx_keep_1 << 1) |
267 pfat->antsel_rx_keep_0;
268 pfat->ant_sum[ant_mux] += pstatus->rx_pwdb_all;
269 pfat->ant_cnt[ant_mux]++;
270 }
271 }
272 } else if ((rtlefuse->antenna_div_type == CG_TRX_HW_ANTDIV) ||
273 (rtlefuse->antenna_div_type == CGCS_RX_HW_ANTDIV)) {
274 if (pstatus->packet_toself || pstatus->packet_matchbssid) {
275 ant_mux = (pfat->antsel_rx_keep_2 << 2) |
276 (pfat->antsel_rx_keep_1 << 1) |
277 pfat->antsel_rx_keep_0;
278 rtl88e_dm_ant_sel_statistics(hw, ant_mux, 0,
279 pstatus->rx_pwdb_all);
280 }
281 }
282}
283
284static void _rtl88ee_translate_rx_signal_stuff(struct ieee80211_hw *hw,
285 struct sk_buff *skb, struct rtl_stats *pstatus,
286 u8 *pdesc, struct rx_fwinfo_88e *p_drvinfo)
287{
288 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
289 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
290 struct ieee80211_hdr *hdr;
291 u8 *tmp_buf;
292 u8 *praddr;
293 u8 *psaddr;
294 __le16 fc;
295 u16 type, ufc;
296 bool match_bssid, packet_toself, packet_beacon, addr;
297
298 tmp_buf = skb->data + pstatus->rx_drvinfo_size + pstatus->rx_bufshift;
299
300 hdr = (struct ieee80211_hdr *)tmp_buf;
301 fc = hdr->frame_control;
302 ufc = le16_to_cpu(fc);
303 type = WLAN_FC_GET_TYPE(fc);
304 praddr = hdr->addr1;
305 psaddr = ieee80211_get_SA(hdr);
306 memcpy(pstatus->psaddr, psaddr, ETH_ALEN);
307
308 addr = ether_addr_equal(mac->bssid,
309 (ufc & IEEE80211_FCTL_TODS) ? hdr->addr1 :
310 (ufc & IEEE80211_FCTL_FROMDS) ? hdr->addr2 :
311 hdr->addr3);
312 match_bssid = ((IEEE80211_FTYPE_CTL != type) && (!pstatus->hwerror) &&
313 (!pstatus->crc) && (!pstatus->icv)) && addr;
314
315 addr = ether_addr_equal(praddr, rtlefuse->dev_addr);
316 packet_toself = match_bssid && addr;
317
318 if (ieee80211_is_beacon(fc))
319 packet_beacon = true;
320
321 _rtl88ee_query_rxphystatus(hw, pstatus, pdesc, p_drvinfo,
322 match_bssid, packet_toself, packet_beacon);
323 _rtl88ee_smart_antenna(hw, pstatus);
324 rtl_process_phyinfo(hw, tmp_buf, pstatus);
325}
326
327static void insert_em(struct rtl_tcb_desc *ptcb_desc, u8 *virtualaddress)
328{
329 u32 dwtmp = 0;
330
331 memset(virtualaddress, 0, 8);
332
333 SET_EARLYMODE_PKTNUM(virtualaddress, ptcb_desc->empkt_num);
334 if (ptcb_desc->empkt_num == 1) {
335 dwtmp = ptcb_desc->empkt_len[0];
336 } else {
337 dwtmp = ptcb_desc->empkt_len[0];
338 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
339 dwtmp += ptcb_desc->empkt_len[1];
340 }
341 SET_EARLYMODE_LEN0(virtualaddress, dwtmp);
342
343 if (ptcb_desc->empkt_num <= 3) {
344 dwtmp = ptcb_desc->empkt_len[2];
345 } else {
346 dwtmp = ptcb_desc->empkt_len[2];
347 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
348 dwtmp += ptcb_desc->empkt_len[3];
349 }
350 SET_EARLYMODE_LEN1(virtualaddress, dwtmp);
351 if (ptcb_desc->empkt_num <= 5) {
352 dwtmp = ptcb_desc->empkt_len[4];
353 } else {
354 dwtmp = ptcb_desc->empkt_len[4];
355 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
356 dwtmp += ptcb_desc->empkt_len[5];
357 }
358 SET_EARLYMODE_LEN2_1(virtualaddress, dwtmp & 0xF);
359 SET_EARLYMODE_LEN2_2(virtualaddress, dwtmp >> 4);
360 if (ptcb_desc->empkt_num <= 7) {
361 dwtmp = ptcb_desc->empkt_len[6];
362 } else {
363 dwtmp = ptcb_desc->empkt_len[6];
364 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
365 dwtmp += ptcb_desc->empkt_len[7];
366 }
367 SET_EARLYMODE_LEN3(virtualaddress, dwtmp);
368 if (ptcb_desc->empkt_num <= 9) {
369 dwtmp = ptcb_desc->empkt_len[8];
370 } else {
371 dwtmp = ptcb_desc->empkt_len[8];
372 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
373 dwtmp += ptcb_desc->empkt_len[9];
374 }
375 SET_EARLYMODE_LEN4(virtualaddress, dwtmp);
376}
377
378bool rtl88ee_rx_query_desc(struct ieee80211_hw *hw,
379 struct rtl_stats *status,
380 struct ieee80211_rx_status *rx_status,
381 u8 *pdesc, struct sk_buff *skb)
382{
383 struct rtl_priv *rtlpriv = rtl_priv(hw);
384 struct rx_fwinfo_88e *p_drvinfo;
385 struct ieee80211_hdr *hdr;
386
387 u32 phystatus = GET_RX_DESC_PHYST(pdesc);
388 status->packet_report_type = (u8)GET_RX_STATUS_DESC_RPT_SEL(pdesc);
389 if (status->packet_report_type == TX_REPORT2)
390 status->length = (u16) GET_RX_RPT2_DESC_PKT_LEN(pdesc);
391 else
392 status->length = (u16) GET_RX_DESC_PKT_LEN(pdesc);
393 status->rx_drvinfo_size = (u8) GET_RX_DESC_DRV_INFO_SIZE(pdesc) *
394 RX_DRV_INFO_SIZE_UNIT;
395 status->rx_bufshift = (u8) (GET_RX_DESC_SHIFT(pdesc) & 0x03);
396 status->icv = (u16) GET_RX_DESC_ICV(pdesc);
397 status->crc = (u16) GET_RX_DESC_CRC32(pdesc);
398 status->hwerror = (status->crc | status->icv);
399 status->decrypted = !GET_RX_DESC_SWDEC(pdesc);
400 status->rate = (u8) GET_RX_DESC_RXMCS(pdesc);
401 status->shortpreamble = (u16) GET_RX_DESC_SPLCP(pdesc);
402 status->isampdu = (bool) (GET_RX_DESC_PAGGR(pdesc) == 1);
403 status->isfirst_ampdu = (bool) ((GET_RX_DESC_PAGGR(pdesc) == 1) &&
404 (GET_RX_DESC_FAGGR(pdesc) == 1));
405 if (status->packet_report_type == NORMAL_RX)
406 status->timestamp_low = GET_RX_DESC_TSFL(pdesc);
407 status->rx_is40Mhzpacket = (bool) GET_RX_DESC_BW(pdesc);
408 status->is_ht = (bool)GET_RX_DESC_RXHT(pdesc);
409
410 status->is_cck = RTL8188_RX_HAL_IS_CCK_RATE(status->rate);
411
412 status->macid = GET_RX_DESC_MACID(pdesc);
413 if (GET_RX_STATUS_DESC_MAGIC_MATCH(pdesc))
414 status->wake_match = BIT(2);
415 else if (GET_RX_STATUS_DESC_MAGIC_MATCH(pdesc))
416 status->wake_match = BIT(1);
417 else if (GET_RX_STATUS_DESC_UNICAST_MATCH(pdesc))
418 status->wake_match = BIT(0);
419 else
420 status->wake_match = 0;
421 if (status->wake_match)
422 RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD,
423 "Get Wakeup Packet!! WakeMatch =%d\n",
424 status->wake_match);
425 rx_status->freq = hw->conf.chandef.chan->center_freq;
426 rx_status->band = hw->conf.chandef.chan->band;
427
428 if (status->crc)
429 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
430
431 if (status->rx_is40Mhzpacket)
432 rx_status->flag |= RX_FLAG_40MHZ;
433
434 if (status->is_ht)
435 rx_status->flag |= RX_FLAG_HT;
436
437 rx_status->flag |= RX_FLAG_MACTIME_START;
438
439
440
441
442
443
444
445
446
447 if (status->decrypted) {
448 hdr = (struct ieee80211_hdr *)(skb->data +
449 status->rx_drvinfo_size + status->rx_bufshift);
450
451 if (!hdr) {
452
453 return false;
454 }
455 if ((ieee80211_is_robust_mgmt_frame(hdr)) &&
456 (ieee80211_has_protected(hdr->frame_control)))
457 rx_status->flag &= ~RX_FLAG_DECRYPTED;
458 else
459 rx_status->flag |= RX_FLAG_DECRYPTED;
460 }
461
462
463
464
465
466
467 rx_status->rate_idx = rtlwifi_rate_mapping(hw, status->is_ht,
468 status->rate, false);
469
470 rx_status->mactime = status->timestamp_low;
471 if (phystatus == true) {
472 p_drvinfo = (struct rx_fwinfo_88e *)(skb->data +
473 status->rx_bufshift);
474
475 _rtl88ee_translate_rx_signal_stuff(hw, skb, status, pdesc,
476 p_drvinfo);
477 }
478
479
480 rx_status->signal = status->recvsignalpower + 10;
481 if (status->packet_report_type == TX_REPORT2) {
482 status->macid_valid_entry[0] =
483 GET_RX_RPT2_DESC_MACID_VALID_1(pdesc);
484 status->macid_valid_entry[1] =
485 GET_RX_RPT2_DESC_MACID_VALID_2(pdesc);
486 }
487 return true;
488}
489
490void rtl88ee_tx_fill_desc(struct ieee80211_hw *hw,
491 struct ieee80211_hdr *hdr, u8 *pdesc_tx,
492 struct ieee80211_tx_info *info,
493 struct ieee80211_sta *sta,
494 struct sk_buff *skb,
495 u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)
496{
497 struct rtl_priv *rtlpriv = rtl_priv(hw);
498 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
499 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
500 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
501 u8 *pdesc = (u8 *)pdesc_tx;
502 u16 seq_number;
503 __le16 fc = hdr->frame_control;
504 unsigned int buf_len = 0;
505 unsigned int skb_len = skb->len;
506 u8 fw_qsel = _rtl88ee_map_hwqueue_to_fwqueue(skb, hw_queue);
507 bool firstseg = ((hdr->seq_ctrl &
508 cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
509 bool lastseg = ((hdr->frame_control &
510 cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
511 dma_addr_t mapping;
512 u8 bw_40 = 0;
513 u8 short_gi = 0;
514
515 if (mac->opmode == NL80211_IFTYPE_STATION) {
516 bw_40 = mac->bw_40;
517 } else if (mac->opmode == NL80211_IFTYPE_AP ||
518 mac->opmode == NL80211_IFTYPE_ADHOC) {
519 if (sta)
520 bw_40 = sta->ht_cap.cap &
521 IEEE80211_HT_CAP_SUP_WIDTH_20_40;
522 }
523 seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
524 rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);
525
526 if (rtlhal->earlymode_enable) {
527 skb_push(skb, EM_HDR_LEN);
528 memset(skb->data, 0, EM_HDR_LEN);
529 }
530 buf_len = skb->len;
531 mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len,
532 PCI_DMA_TODEVICE);
533 if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
534 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
535 "DMA mapping error");
536 return;
537 }
538 CLEAR_PCI_TX_DESC_CONTENT(pdesc, sizeof(struct tx_desc_88e));
539 if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
540 firstseg = true;
541 lastseg = true;
542 }
543 if (firstseg) {
544 if (rtlhal->earlymode_enable) {
545 SET_TX_DESC_PKT_OFFSET(pdesc, 1);
546 SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN +
547 EM_HDR_LEN);
548 if (ptcb_desc->empkt_num) {
549 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
550 "Insert 8 byte.pTcb->EMPktNum:%d\n",
551 ptcb_desc->empkt_num);
552 insert_em(ptcb_desc, (u8 *)(skb->data));
553 }
554 } else {
555 SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
556 }
557
558 ptcb_desc->use_driver_rate = true;
559 SET_TX_DESC_TX_RATE(pdesc, ptcb_desc->hw_rate);
560 if (ptcb_desc->hw_rate > DESC92C_RATEMCS0)
561 short_gi = (ptcb_desc->use_shortgi) ? 1 : 0;
562 else
563 short_gi = (ptcb_desc->use_shortpreamble) ? 1 : 0;
564 SET_TX_DESC_DATA_SHORTGI(pdesc, short_gi);
565
566 if (info->flags & IEEE80211_TX_CTL_AMPDU) {
567 SET_TX_DESC_AGG_ENABLE(pdesc, 1);
568 SET_TX_DESC_MAX_AGG_NUM(pdesc, 0x14);
569 }
570 SET_TX_DESC_SEQ(pdesc, seq_number);
571 SET_TX_DESC_RTS_ENABLE(pdesc, ((ptcb_desc->rts_enable &&
572 !ptcb_desc->cts_enable) ? 1 : 0));
573 SET_TX_DESC_HW_RTS_ENABLE(pdesc, 0);
574 SET_TX_DESC_CTS2SELF(pdesc, ((ptcb_desc->cts_enable) ? 1 : 0));
575 SET_TX_DESC_RTS_STBC(pdesc, ((ptcb_desc->rts_stbc) ? 1 : 0));
576
577 SET_TX_DESC_RTS_RATE(pdesc, ptcb_desc->rts_rate);
578 SET_TX_DESC_RTS_BW(pdesc, 0);
579 SET_TX_DESC_RTS_SC(pdesc, ptcb_desc->rts_sc);
580 SET_TX_DESC_RTS_SHORT(pdesc,
581 ((ptcb_desc->rts_rate <= DESC92C_RATE54M) ?
582 (ptcb_desc->rts_use_shortpreamble ? 1 : 0) :
583 (ptcb_desc->rts_use_shortgi ? 1 : 0)));
584
585 if (ptcb_desc->btx_enable_sw_calc_duration)
586 SET_TX_DESC_NAV_USE_HDR(pdesc, 1);
587
588 if (bw_40) {
589 if (ptcb_desc->packet_bw) {
590 SET_TX_DESC_DATA_BW(pdesc, 1);
591 SET_TX_DESC_TX_SUB_CARRIER(pdesc, 3);
592 } else {
593 SET_TX_DESC_DATA_BW(pdesc, 0);
594 SET_TX_DESC_TX_SUB_CARRIER(pdesc,
595 mac->cur_40_prime_sc);
596 }
597 } else {
598 SET_TX_DESC_DATA_BW(pdesc, 0);
599 SET_TX_DESC_TX_SUB_CARRIER(pdesc, 0);
600 }
601
602 SET_TX_DESC_LINIP(pdesc, 0);
603 SET_TX_DESC_PKT_SIZE(pdesc, (u16) skb_len);
604 if (sta) {
605 u8 ampdu_density = sta->ht_cap.ampdu_density;
606 SET_TX_DESC_AMPDU_DENSITY(pdesc, ampdu_density);
607 }
608 if (info->control.hw_key) {
609 struct ieee80211_key_conf *keyconf;
610 keyconf = info->control.hw_key;
611 switch (keyconf->cipher) {
612 case WLAN_CIPHER_SUITE_WEP40:
613 case WLAN_CIPHER_SUITE_WEP104:
614 case WLAN_CIPHER_SUITE_TKIP:
615 SET_TX_DESC_SEC_TYPE(pdesc, 0x1);
616 break;
617 case WLAN_CIPHER_SUITE_CCMP:
618 SET_TX_DESC_SEC_TYPE(pdesc, 0x3);
619 break;
620 default:
621 SET_TX_DESC_SEC_TYPE(pdesc, 0x0);
622 break;
623 }
624 }
625
626 SET_TX_DESC_QUEUE_SEL(pdesc, fw_qsel);
627 SET_TX_DESC_DATA_RATE_FB_LIMIT(pdesc, 0x1F);
628 SET_TX_DESC_RTS_RATE_FB_LIMIT(pdesc, 0xF);
629 SET_TX_DESC_DISABLE_FB(pdesc, ptcb_desc->disable_ratefallback ?
630 1 : 0);
631 SET_TX_DESC_USE_RATE(pdesc, ptcb_desc->use_driver_rate ? 1 : 0);
632
633
634
635
636 if (!ptcb_desc->use_driver_rate) {
637
638
639 }
640 if (ieee80211_is_data_qos(fc)) {
641 if (mac->rdg_en) {
642 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
643 "Enable RDG function.\n");
644 SET_TX_DESC_RDG_ENABLE(pdesc, 1);
645 SET_TX_DESC_HTC(pdesc, 1);
646 }
647 }
648 }
649
650 SET_TX_DESC_FIRST_SEG(pdesc, (firstseg ? 1 : 0));
651 SET_TX_DESC_LAST_SEG(pdesc, (lastseg ? 1 : 0));
652 SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16) buf_len);
653 SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
654 if (rtlpriv->dm.useramask) {
655 SET_TX_DESC_RATE_ID(pdesc, ptcb_desc->ratr_index);
656 SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id);
657 } else {
658 SET_TX_DESC_RATE_ID(pdesc, 0xC + ptcb_desc->ratr_index);
659 SET_TX_DESC_MACID(pdesc, ptcb_desc->ratr_index);
660 }
661 if (ieee80211_is_data_qos(fc))
662 SET_TX_DESC_QOS(pdesc, 1);
663
664 if (!ieee80211_is_data_qos(fc))
665 SET_TX_DESC_HWSEQ_EN(pdesc, 1);
666 SET_TX_DESC_MORE_FRAG(pdesc, (lastseg ? 0 : 1));
667 if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
668 is_broadcast_ether_addr(ieee80211_get_DA(hdr)))
669 SET_TX_DESC_BMC(pdesc, 1);
670
671 rtl88e_dm_set_tx_ant_by_tx_info(hw, pdesc, ptcb_desc->mac_id);
672 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
673}
674
675void rtl88ee_tx_fill_cmddesc(struct ieee80211_hw *hw,
676 u8 *pdesc, bool firstseg,
677 bool lastseg, struct sk_buff *skb)
678{
679 struct rtl_priv *rtlpriv = rtl_priv(hw);
680 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
681 u8 fw_queue = QSLT_BEACON;
682
683 dma_addr_t mapping = pci_map_single(rtlpci->pdev,
684 skb->data, skb->len,
685 PCI_DMA_TODEVICE);
686
687 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
688 __le16 fc = hdr->frame_control;
689
690 if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
691 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
692 "DMA mapping error");
693 return;
694 }
695 CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_DESC_SIZE);
696
697 if (firstseg)
698 SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
699
700 SET_TX_DESC_TX_RATE(pdesc, DESC92C_RATE1M);
701
702 SET_TX_DESC_SEQ(pdesc, 0);
703
704 SET_TX_DESC_LINIP(pdesc, 0);
705
706 SET_TX_DESC_QUEUE_SEL(pdesc, fw_queue);
707
708 SET_TX_DESC_FIRST_SEG(pdesc, 1);
709 SET_TX_DESC_LAST_SEG(pdesc, 1);
710
711 SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)(skb->len));
712
713 SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
714
715 SET_TX_DESC_RATE_ID(pdesc, 7);
716 SET_TX_DESC_MACID(pdesc, 0);
717
718 SET_TX_DESC_OWN(pdesc, 1);
719
720 SET_TX_DESC_PKT_SIZE((u8 *)pdesc, (u16)(skb->len));
721
722 SET_TX_DESC_FIRST_SEG(pdesc, 1);
723 SET_TX_DESC_LAST_SEG(pdesc, 1);
724
725 SET_TX_DESC_OFFSET(pdesc, 0x20);
726
727 SET_TX_DESC_USE_RATE(pdesc, 1);
728
729 if (!ieee80211_is_data_qos(fc))
730 SET_TX_DESC_HWSEQ_EN(pdesc, 1);
731
732 RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
733 "H2C Tx Cmd Content\n",
734 pdesc, TX_DESC_SIZE);
735}
736
737void rtl88ee_set_desc(u8 *pdesc, bool istx, u8 desc_name, u8 *val)
738{
739 if (istx == true) {
740 switch (desc_name) {
741 case HW_DESC_OWN:
742 SET_TX_DESC_OWN(pdesc, 1);
743 break;
744 case HW_DESC_TX_NEXTDESC_ADDR:
745 SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *)val);
746 break;
747 default:
748 RT_ASSERT(false, "ERR txdesc :%d not processed\n",
749 desc_name);
750 break;
751 }
752 } else {
753 switch (desc_name) {
754 case HW_DESC_RXOWN:
755 SET_RX_DESC_OWN(pdesc, 1);
756 break;
757 case HW_DESC_RXBUFF_ADDR:
758 SET_RX_DESC_BUFF_ADDR(pdesc, *(u32 *)val);
759 break;
760 case HW_DESC_RXPKT_LEN:
761 SET_RX_DESC_PKT_LEN(pdesc, *(u32 *)val);
762 break;
763 case HW_DESC_RXERO:
764 SET_RX_DESC_EOR(pdesc, 1);
765 break;
766 default:
767 RT_ASSERT(false, "ERR rxdesc :%d not processed\n",
768 desc_name);
769 break;
770 }
771 }
772}
773
774u32 rtl88ee_get_desc(u8 *pdesc, bool istx, u8 desc_name)
775{
776 u32 ret = 0;
777
778 if (istx == true) {
779 switch (desc_name) {
780 case HW_DESC_OWN:
781 ret = GET_TX_DESC_OWN(pdesc);
782 break;
783 case HW_DESC_TXBUFF_ADDR:
784 ret = GET_TX_DESC_TX_BUFFER_ADDRESS(pdesc);
785 break;
786 default:
787 RT_ASSERT(false, "ERR txdesc :%d not processed\n",
788 desc_name);
789 break;
790 }
791 } else {
792 switch (desc_name) {
793 case HW_DESC_OWN:
794 ret = GET_RX_DESC_OWN(pdesc);
795 break;
796 case HW_DESC_RXPKT_LEN:
797 ret = GET_RX_DESC_PKT_LEN(pdesc);
798 break;
799 default:
800 RT_ASSERT(false, "ERR rxdesc :%d not processed\n",
801 desc_name);
802 break;
803 }
804 }
805 return ret;
806}
807
808void rtl88ee_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
809{
810 struct rtl_priv *rtlpriv = rtl_priv(hw);
811 if (hw_queue == BEACON_QUEUE) {
812 rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4));
813 } else {
814 rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG,
815 BIT(0) << (hw_queue));
816 }
817}
818
