linux/drivers/staging/comedi/drivers/dyna_pci10xx.c
<<
>>
Prefs
   1/*
   2 * comedi/drivers/dyna_pci10xx.c
   3 * Copyright (C) 2011 Prashant Shah, pshah.mumbai@gmail.com
   4 *
   5 * This program is free software; you can redistribute it and/or modify
   6 * it under the terms of the GNU General Public License as published by
   7 * the Free Software Foundation; either version 2 of the License, or
   8 * (at your option) any later version.
   9 *
  10 * This program is distributed in the hope that it will be useful,
  11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13 * GNU General Public License for more details.
  14 */
  15
  16/*
  17 Driver: dyna_pci10xx
  18 Devices: Dynalog India PCI DAQ Cards, http://www.dynalogindia.com/
  19 Author: Prashant Shah <pshah.mumbai@gmail.com>
  20 Developed at Automation Labs, Chemical Dept., IIT Bombay, India.
  21 Prof. Kannan Moudgalya <kannan@iitb.ac.in>
  22 http://www.iitb.ac.in
  23 Status: Stable
  24 Version: 1.0
  25 Device Supported :
  26 - Dynalog PCI 1050
  27
  28 Notes :
  29 - Dynalog India Pvt. Ltd. does not have a registered PCI Vendor ID and
  30 they are using the PLX Technlogies Vendor ID since that is the PCI Chip used
  31 in the card.
  32 - Dynalog India Pvt. Ltd. has provided the internal register specification for
  33 their cards in their manuals.
  34*/
  35
  36#include <linux/module.h>
  37#include <linux/delay.h>
  38#include <linux/pci.h>
  39#include <linux/mutex.h>
  40
  41#include "../comedidev.h"
  42
  43#define READ_TIMEOUT 50
  44
  45static const struct comedi_lrange range_pci1050_ai = { 3, {
  46                                                          BIP_RANGE(10),
  47                                                          BIP_RANGE(5),
  48                                                          UNI_RANGE(10)
  49                                                          }
  50};
  51
  52static const char range_codes_pci1050_ai[] = { 0x00, 0x10, 0x30 };
  53
  54struct dyna_pci10xx_private {
  55        struct mutex mutex;
  56        unsigned long BADR3;
  57};
  58
  59/******************************************************************************/
  60/************************** READ WRITE FUNCTIONS ******************************/
  61/******************************************************************************/
  62
  63/* analog input callback */
  64static int dyna_pci10xx_insn_read_ai(struct comedi_device *dev,
  65                        struct comedi_subdevice *s,
  66                        struct comedi_insn *insn, unsigned int *data)
  67{
  68        struct dyna_pci10xx_private *devpriv = dev->private;
  69        int n, counter;
  70        u16 d = 0;
  71        unsigned int chan, range;
  72
  73        /* get the channel number and range */
  74        chan = CR_CHAN(insn->chanspec);
  75        range = range_codes_pci1050_ai[CR_RANGE((insn->chanspec))];
  76
  77        mutex_lock(&devpriv->mutex);
  78        /* convert n samples */
  79        for (n = 0; n < insn->n; n++) {
  80                /* trigger conversion */
  81                smp_mb();
  82                outw_p(0x0000 + range + chan, dev->iobase + 2);
  83                udelay(10);
  84                /* read data */
  85                for (counter = 0; counter < READ_TIMEOUT; counter++) {
  86                        d = inw_p(dev->iobase);
  87
  88                        /* check if read is successful if the EOC bit is set */
  89                        if (d & (1 << 15))
  90                                goto conv_finish;
  91                }
  92                data[n] = 0;
  93                printk(KERN_DEBUG "comedi: dyna_pci10xx: "
  94                        "timeout reading analog input\n");
  95                continue;
  96conv_finish:
  97                /* mask the first 4 bits - EOC bits */
  98                d &= 0x0FFF;
  99                data[n] = d;
 100        }
 101        mutex_unlock(&devpriv->mutex);
 102
 103        /* return the number of samples read/written */
 104        return n;
 105}
 106
 107/* analog output callback */
 108static int dyna_pci10xx_insn_write_ao(struct comedi_device *dev,
 109                                 struct comedi_subdevice *s,
 110                                 struct comedi_insn *insn, unsigned int *data)
 111{
 112        struct dyna_pci10xx_private *devpriv = dev->private;
 113        int n;
 114        unsigned int chan, range;
 115
 116        chan = CR_CHAN(insn->chanspec);
 117        range = range_codes_pci1050_ai[CR_RANGE((insn->chanspec))];
 118
 119        mutex_lock(&devpriv->mutex);
 120        for (n = 0; n < insn->n; n++) {
 121                smp_mb();
 122                /* trigger conversion and write data */
 123                outw_p(data[n], dev->iobase);
 124                udelay(10);
 125        }
 126        mutex_unlock(&devpriv->mutex);
 127        return n;
 128}
 129
 130/* digital input bit interface */
 131static int dyna_pci10xx_di_insn_bits(struct comedi_device *dev,
 132                              struct comedi_subdevice *s,
 133                              struct comedi_insn *insn, unsigned int *data)
 134{
 135        struct dyna_pci10xx_private *devpriv = dev->private;
 136        u16 d = 0;
 137
 138        mutex_lock(&devpriv->mutex);
 139        smp_mb();
 140        d = inw_p(devpriv->BADR3);
 141        udelay(10);
 142
 143        /* on return the data[0] contains output and data[1] contains input */
 144        data[1] = d;
 145        data[0] = s->state;
 146        mutex_unlock(&devpriv->mutex);
 147        return insn->n;
 148}
 149
 150static int dyna_pci10xx_do_insn_bits(struct comedi_device *dev,
 151                                     struct comedi_subdevice *s,
 152                                     struct comedi_insn *insn,
 153                                     unsigned int *data)
 154{
 155        struct dyna_pci10xx_private *devpriv = dev->private;
 156
 157        mutex_lock(&devpriv->mutex);
 158        if (comedi_dio_update_state(s, data)) {
 159                smp_mb();
 160                outw_p(s->state, devpriv->BADR3);
 161                udelay(10);
 162        }
 163
 164        data[1] = s->state;
 165        mutex_unlock(&devpriv->mutex);
 166
 167        return insn->n;
 168}
 169
 170static int dyna_pci10xx_auto_attach(struct comedi_device *dev,
 171                                              unsigned long context_unused)
 172{
 173        struct pci_dev *pcidev = comedi_to_pci_dev(dev);
 174        struct dyna_pci10xx_private *devpriv;
 175        struct comedi_subdevice *s;
 176        int ret;
 177
 178        devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
 179        if (!devpriv)
 180                return -ENOMEM;
 181
 182        ret = comedi_pci_enable(dev);
 183        if (ret)
 184                return ret;
 185        dev->iobase = pci_resource_start(pcidev, 2);
 186        devpriv->BADR3 = pci_resource_start(pcidev, 3);
 187
 188        mutex_init(&devpriv->mutex);
 189
 190        ret = comedi_alloc_subdevices(dev, 4);
 191        if (ret)
 192                return ret;
 193
 194        /* analog input */
 195        s = &dev->subdevices[0];
 196        s->type = COMEDI_SUBD_AI;
 197        s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DIFF;
 198        s->n_chan = 16;
 199        s->maxdata = 0x0FFF;
 200        s->range_table = &range_pci1050_ai;
 201        s->len_chanlist = 16;
 202        s->insn_read = dyna_pci10xx_insn_read_ai;
 203
 204        /* analog output */
 205        s = &dev->subdevices[1];
 206        s->type = COMEDI_SUBD_AO;
 207        s->subdev_flags = SDF_WRITABLE;
 208        s->n_chan = 16;
 209        s->maxdata = 0x0FFF;
 210        s->range_table = &range_unipolar10;
 211        s->len_chanlist = 16;
 212        s->insn_write = dyna_pci10xx_insn_write_ao;
 213
 214        /* digital input */
 215        s = &dev->subdevices[2];
 216        s->type = COMEDI_SUBD_DI;
 217        s->subdev_flags = SDF_READABLE | SDF_GROUND;
 218        s->n_chan = 16;
 219        s->maxdata = 1;
 220        s->range_table = &range_digital;
 221        s->len_chanlist = 16;
 222        s->insn_bits = dyna_pci10xx_di_insn_bits;
 223
 224        /* digital output */
 225        s = &dev->subdevices[3];
 226        s->type = COMEDI_SUBD_DO;
 227        s->subdev_flags = SDF_WRITABLE | SDF_GROUND;
 228        s->n_chan = 16;
 229        s->maxdata = 1;
 230        s->range_table = &range_digital;
 231        s->len_chanlist = 16;
 232        s->state = 0;
 233        s->insn_bits = dyna_pci10xx_do_insn_bits;
 234
 235        dev_info(dev->class_dev, "%s attached\n", dev->board_name);
 236
 237        return 0;
 238}
 239
 240static void dyna_pci10xx_detach(struct comedi_device *dev)
 241{
 242        struct dyna_pci10xx_private *devpriv = dev->private;
 243
 244        if (devpriv)
 245                mutex_destroy(&devpriv->mutex);
 246        comedi_pci_disable(dev);
 247}
 248
 249static struct comedi_driver dyna_pci10xx_driver = {
 250        .driver_name    = "dyna_pci10xx",
 251        .module         = THIS_MODULE,
 252        .auto_attach    = dyna_pci10xx_auto_attach,
 253        .detach         = dyna_pci10xx_detach,
 254};
 255
 256static int dyna_pci10xx_pci_probe(struct pci_dev *dev,
 257                                  const struct pci_device_id *id)
 258{
 259        return comedi_pci_auto_config(dev, &dyna_pci10xx_driver,
 260                                      id->driver_data);
 261}
 262
 263static DEFINE_PCI_DEVICE_TABLE(dyna_pci10xx_pci_table) = {
 264        { PCI_DEVICE(PCI_VENDOR_ID_PLX, 0x1050) },
 265        { 0 }
 266};
 267MODULE_DEVICE_TABLE(pci, dyna_pci10xx_pci_table);
 268
 269static struct pci_driver dyna_pci10xx_pci_driver = {
 270        .name           = "dyna_pci10xx",
 271        .id_table       = dyna_pci10xx_pci_table,
 272        .probe          = dyna_pci10xx_pci_probe,
 273        .remove         = comedi_pci_auto_unconfig,
 274};
 275module_comedi_pci_driver(dyna_pci10xx_driver, dyna_pci10xx_pci_driver);
 276
 277MODULE_LICENSE("GPL");
 278MODULE_AUTHOR("Prashant Shah <pshah.mumbai@gmail.com>");
 279MODULE_DESCRIPTION("Comedi based drivers for Dynalog PCI DAQ cards");
 280