LXR linux/drivers/staging/rtl8188eu/hal/odm

   1/******************************************************************************
   2 *
   3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   4 *
   5 * This program is free software; you can redistribute it and/or modify it
   6 * under the terms of version 2 of the GNU General Public License as
   7 * published by the Free Software Foundation.
   8 *
   9 * This program is distributed in the hope that it will be useful, but WITHOUT
  10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12 * more details.
  13 *
  14 * You should have received a copy of the GNU General Public License along with
  15 * this program; if not, write to the Free Software Foundation, Inc.,
  16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17 *
  18 *
  19 ******************************************************************************/
  20
  21/*  include files */
  22
  23#include "odm_precomp.h"
  24
  25#define READ_AND_CONFIG     READ_AND_CONFIG_MP
  26
  27#define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig##txt##ic(dm_odm))
  28#define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC##txt##ic(dm_odm))
  29
  30static u8 odm_QueryRxPwrPercentage(s8 AntPower)
  31{
  32        if ((AntPower <= -100) || (AntPower >= 20))
  33                return  0;
  34        else if (AntPower >= 0)
  35                return  100;
  36        else
  37                return 100+AntPower;
  38}
  39
  40/*  2012/01/12 MH MOve some signal strength smooth method to MP HAL layer. */
  41/*  IF other SW team do not support the feature, remove this section.?? */
  42static s32 odm_sig_patch_lenove(struct odm_dm_struct *dm_odm, s32 CurrSig)
  43{
  44        return 0;
  45}
  46
  47static s32 odm_sig_patch_netcore(struct odm_dm_struct *dm_odm, s32 CurrSig)
  48{
  49        return 0;
  50}
  51
  52static s32 odm_SignalScaleMapping_92CSeries(struct odm_dm_struct *dm_odm, s32 CurrSig)
  53{
  54        s32 RetSig = 0;
  55
  56        if ((dm_odm->SupportInterface  == ODM_ITRF_USB) ||
  57            (dm_odm->SupportInterface  == ODM_ITRF_SDIO)) {
  58                if (CurrSig >= 51 && CurrSig <= 100)
  59                        RetSig = 100;
  60                else if (CurrSig >= 41 && CurrSig <= 50)
  61                        RetSig = 80 + ((CurrSig - 40)*2);
  62                else if (CurrSig >= 31 && CurrSig <= 40)
  63                        RetSig = 66 + (CurrSig - 30);
  64                else if (CurrSig >= 21 && CurrSig <= 30)
  65                        RetSig = 54 + (CurrSig - 20);
  66                else if (CurrSig >= 10 && CurrSig <= 20)
  67                        RetSig = 42 + (((CurrSig - 10) * 2) / 3);
  68                else if (CurrSig >= 5 && CurrSig <= 9)
  69                        RetSig = 22 + (((CurrSig - 5) * 3) / 2);
  70                else if (CurrSig >= 1 && CurrSig <= 4)
  71                        RetSig = 6 + (((CurrSig - 1) * 3) / 2);
  72                else
  73                        RetSig = CurrSig;
  74        }
  75        return RetSig;
  76}
  77
  78static s32 odm_SignalScaleMapping(struct odm_dm_struct *dm_odm, s32 CurrSig)
  79{
  80        if ((dm_odm->SupportPlatform == ODM_MP) &&
  81            (dm_odm->SupportInterface != ODM_ITRF_PCIE) && /* USB & SDIO */
  82            (dm_odm->PatchID == 10))
  83                return odm_sig_patch_netcore(dm_odm, CurrSig);
  84        else if ((dm_odm->SupportPlatform == ODM_MP) &&
  85                 (dm_odm->SupportInterface == ODM_ITRF_PCIE) &&
  86                 (dm_odm->PatchID == 19))
  87                return odm_sig_patch_lenove(dm_odm, CurrSig);
  88        else
  89                return odm_SignalScaleMapping_92CSeries(dm_odm, CurrSig);
  90}
  91
  92/* pMgntInfo->CustomerID == RT_CID_819x_Lenovo */
  93static u8 odm_SQ_process_patch_RT_CID_819x_Lenovo(struct odm_dm_struct *dm_odm,
  94        u8 isCCKrate, u8 PWDB_ALL, u8 path, u8 RSSI)
  95{
  96        return 0;
  97}
  98
  99static u8 odm_EVMdbToPercentage(s8 Value)
 100{
 101        /*  -33dB~0dB to 0%~99% */
 102        s8 ret_val;
 103
 104        ret_val = Value;
 105
 106        if (ret_val >= 0)
 107                ret_val = 0;
 108        if (ret_val <= -33)
 109                ret_val = -33;
 110
 111        ret_val = 0 - ret_val;
 112        ret_val *= 3;
 113
 114        if (ret_val == 99)
 115                ret_val = 100;
 116        return ret_val;
 117}
 118
 119static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
 120                        struct odm_phy_status_info *pPhyInfo,
 121                        u8 *pPhyStatus,
 122                        struct odm_per_pkt_info *pPktinfo)
 123{
 124        struct sw_ant_switch *pDM_SWAT_Table = &dm_odm->DM_SWAT_Table;
 125        u8 i, Max_spatial_stream;
 126        s8 rx_pwr[4], rx_pwr_all = 0;
 127        u8 EVM, PWDB_ALL = 0, PWDB_ALL_BT;
 128        u8 RSSI, total_rssi = 0;
 129        u8 isCCKrate = 0;
 130        u8 rf_rx_num = 0;
 131        u8 cck_highpwr = 0;
 132        u8 LNA_idx, VGA_idx;
 133
 134        struct phy_status_rpt *pPhyStaRpt = (struct phy_status_rpt *)pPhyStatus;
 135
 136        isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M)) ? true : false;
 137
 138        pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1;
 139        pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;
 140
 141        if (isCCKrate) {
 142                u8 report;
 143                u8 cck_agc_rpt;
 144
 145                dm_odm->PhyDbgInfo.NumQryPhyStatusCCK++;
 146                /*  (1)Hardware does not provide RSSI for CCK */
 147                /*  (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */
 148
 149                cck_highpwr = dm_odm->bCckHighPower;
 150
 151                cck_agc_rpt =  pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a ;
 152
 153                /* 2011.11.28 LukeLee: 88E use different LNA & VGA gain table */
 154                /* The RSSI formula should be modified according to the gain table */
 155                /* In 88E, cck_highpwr is always set to 1 */
 156                if (dm_odm->SupportICType & (ODM_RTL8188E|ODM_RTL8812)) {
 157                        LNA_idx = ((cck_agc_rpt & 0xE0) >> 5);
 158                        VGA_idx = (cck_agc_rpt & 0x1F);
 159                        switch (LNA_idx) {
 160                        case 7:
 161                                if (VGA_idx <= 27)
 162                                        rx_pwr_all = -100 + 2*(27-VGA_idx); /* VGA_idx = 27~2 */
 163                                else
 164                                        rx_pwr_all = -100;
 165                                break;
 166                        case 6:
 167                                rx_pwr_all = -48 + 2*(2-VGA_idx); /* VGA_idx = 2~0 */
 168                                break;
 169                        case 5:
 170                                rx_pwr_all = -42 + 2*(7-VGA_idx); /* VGA_idx = 7~5 */
 171                                break;
 172                        case 4:
 173                                rx_pwr_all = -36 + 2*(7-VGA_idx); /* VGA_idx = 7~4 */
 174                                break;
 175                        case 3:
 176                                rx_pwr_all = -24 + 2*(7-VGA_idx); /* VGA_idx = 7~0 */
 177                                break;
 178                        case 2:
 179                                if (cck_highpwr)
 180                                        rx_pwr_all = -12 + 2*(5-VGA_idx); /* VGA_idx = 5~0 */
 181                                else
 182                                        rx_pwr_all = -6 + 2*(5-VGA_idx);
 183                                break;
 184                        case 1:
 185                                        rx_pwr_all = 8-2*VGA_idx;
 186                                break;
 187                        case 0:
 188                                        rx_pwr_all = 14-2*VGA_idx;
 189                                break;
 190                        default:
 191                                break;
 192                        }
 193                        rx_pwr_all += 6;
 194                        PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
 195                        if (!cck_highpwr) {
 196                                if (PWDB_ALL >= 80)
 197                                        PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80;
 198                                else if ((PWDB_ALL <= 78) && (PWDB_ALL >= 20))
 199                                        PWDB_ALL += 3;
 200                                if (PWDB_ALL > 100)
 201                                        PWDB_ALL = 100;
 202                        }
 203                } else {
 204                        if (!cck_highpwr) {
 205                                report = (cck_agc_rpt & 0xc0)>>6;
 206                                switch (report) {
 207                                /*  03312009 modified by cosa */
 208                                /*  Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion */
 209                                /*  Note: different RF with the different RNA gain. */
 210                                case 0x3:
 211                                        rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
 212                                        break;
 213                                case 0x2:
 214                                        rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
 215                                        break;
 216                                case 0x1:
 217                                        rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
 218                                        break;
 219                                case 0x0:
 220                                        rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
 221                                        break;
 222                                }
 223                        } else {
 224                                report = (cck_agc_rpt & 0x60)>>5;
 225                                switch (report) {
 226                                case 0x3:
 227                                        rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f)<<1) ;
 228                                        break;
 229                                case 0x2:
 230                                        rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f)<<1);
 231                                        break;
 232                                case 0x1:
 233                                        rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f)<<1);
 234                                        break;
 235                                case 0x0:
 236                                        rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f)<<1);
 237                                        break;
 238                                }
 239                        }
 240
 241                        PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
 242
 243                        /* Modification for ext-LNA board */
 244                        if (dm_odm->BoardType == ODM_BOARD_HIGHPWR) {
 245                                if ((cck_agc_rpt>>7) == 0) {
 246                                        PWDB_ALL = (PWDB_ALL > 94) ? 100 : (PWDB_ALL+6);
 247                                } else {
 248                                        if (PWDB_ALL > 38)
 249                                                PWDB_ALL -= 16;
 250                                        else
 251                                                PWDB_ALL = (PWDB_ALL <= 16) ? (PWDB_ALL>>2) : (PWDB_ALL-12);
 252                                }
 253
 254                                /* CCK modification */
 255                                if (PWDB_ALL > 25 && PWDB_ALL <= 60)
 256                                        PWDB_ALL += 6;
 257                        } else {/* Modification for int-LNA board */
 258                                if (PWDB_ALL > 99)
 259                                        PWDB_ALL -= 8;
 260                                else if (PWDB_ALL > 50 && PWDB_ALL <= 68)
 261                                        PWDB_ALL += 4;
 262                        }
 263                }
 264
 265                pPhyInfo->RxPWDBAll = PWDB_ALL;
 266                pPhyInfo->BTRxRSSIPercentage = PWDB_ALL;
 267                pPhyInfo->RecvSignalPower = rx_pwr_all;
 268                /*  (3) Get Signal Quality (EVM) */
 269                if (pPktinfo->bPacketMatchBSSID) {
 270                        u8 SQ, SQ_rpt;
 271
 272                        if ((dm_odm->SupportPlatform == ODM_MP) && (dm_odm->PatchID == 19)) {
 273                                SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(dm_odm, isCCKrate, PWDB_ALL, 0, 0);
 274                        } else if (pPhyInfo->RxPWDBAll > 40 && !dm_odm->bInHctTest) {
 275                                SQ = 100;
 276                        } else {
 277                                SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all;
 278
 279                                if (SQ_rpt > 64)
 280                                        SQ = 0;
 281                                else if (SQ_rpt < 20)
 282                                        SQ = 100;
 283                                else
 284                                        SQ = ((64-SQ_rpt) * 100) / 44;
 285                        }
 286                        pPhyInfo->SignalQuality = SQ;
 287                        pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = SQ;
 288                        pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;
 289                }
 290        } else { /* is OFDM rate */
 291                dm_odm->PhyDbgInfo.NumQryPhyStatusOFDM++;
 292
 293                /*  (1)Get RSSI for HT rate */
 294
 295                 for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++) {
 296                        /*  2008/01/30 MH we will judge RF RX path now. */
 297                        if (dm_odm->RFPathRxEnable & BIT(i))
 298                                rf_rx_num++;
 299
 300                        rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain & 0x3F)*2) - 110;
 301
 302                        pPhyInfo->RxPwr[i] = rx_pwr[i];
 303
 304                        /* Translate DBM to percentage. */
 305                        RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]);
 306                        total_rssi += RSSI;
 307
 308                        /* Modification for ext-LNA board */
 309                        if (dm_odm->BoardType == ODM_BOARD_HIGHPWR) {
 310                                if ((pPhyStaRpt->path_agc[i].trsw) == 1)
 311                                        RSSI = (RSSI > 94) ? 100 : (RSSI + 6);
 312                                else
 313                                        RSSI = (RSSI <= 16) ? (RSSI >> 3) : (RSSI - 16);
 314
 315                                if ((RSSI <= 34) && (RSSI >= 4))
 316                                        RSSI -= 4;
 317                        }
 318
 319                        pPhyInfo->RxMIMOSignalStrength[i] = (u8)RSSI;
 320
 321                        /* Get Rx snr value in DB */
 322                        pPhyInfo->RxSNR[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2);
 323                        dm_odm->PhyDbgInfo.RxSNRdB[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2);
 324
 325                        /* Record Signal Strength for next packet */
 326                        if (pPktinfo->bPacketMatchBSSID) {
 327                                if ((dm_odm->SupportPlatform == ODM_MP) && (dm_odm->PatchID == 19)) {
 328                                        if (i == ODM_RF_PATH_A)
 329                                                pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(dm_odm, isCCKrate, PWDB_ALL, i, RSSI);
 330                                }
 331                        }
 332                }
 333                /*  (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */
 334                rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1) & 0x7f) - 110;
 335
 336                PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
 337                PWDB_ALL_BT = PWDB_ALL;
 338
 339                pPhyInfo->RxPWDBAll = PWDB_ALL;
 340                pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT;
 341                pPhyInfo->RxPower = rx_pwr_all;
 342                pPhyInfo->RecvSignalPower = rx_pwr_all;
 343
 344                if ((dm_odm->SupportPlatform == ODM_MP) && (dm_odm->PatchID == 19)) {
 345                        /* do nothing */
 346                } else {
 347                        /*  (3)EVM of HT rate */
 348                        if (pPktinfo->Rate >= DESC92C_RATEMCS8 && pPktinfo->Rate <= DESC92C_RATEMCS15)
 349                                Max_spatial_stream = 2; /* both spatial stream make sense */
 350                        else
 351                                Max_spatial_stream = 1; /* only spatial stream 1 makes sense */
 352
 353                        for (i = 0; i < Max_spatial_stream; i++) {
 354                                /*  Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */
 355                                /*  fill most significant bit to "zero" when doing shifting operation which may change a negative */
 356                                /*  value to positive one, then the dbm value (which is supposed to be negative)  is not correct anymore. */
 357                                EVM = odm_EVMdbToPercentage((pPhyStaRpt->stream_rxevm[i]));     /* dbm */
 358
 359                                if (pPktinfo->bPacketMatchBSSID) {
 360                                        if (i == ODM_RF_PATH_A) /*  Fill value in RFD, Get the first spatial stream only */
 361                                                pPhyInfo->SignalQuality = (u8)(EVM & 0xff);
 362                                        pPhyInfo->RxMIMOSignalQuality[i] = (u8)(EVM & 0xff);
 363                                }
 364                        }
 365                }
 366        }
 367        /* UI BSS List signal strength(in percentage), make it good looking, from 0~100. */
 368        /* It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). */
 369        if (isCCKrate) {
 370                pPhyInfo->SignalStrength = (u8)(odm_SignalScaleMapping(dm_odm, PWDB_ALL));/* PWDB_ALL; */
 371        } else {
 372                if (rf_rx_num != 0)
 373                        pPhyInfo->SignalStrength = (u8)(odm_SignalScaleMapping(dm_odm, total_rssi /= rf_rx_num));
 374        }
 375
 376        /* For 92C/92D HW (Hybrid) Antenna Diversity */
 377        pDM_SWAT_Table->antsel = pPhyStaRpt->ant_sel;
 378        /* For 88E HW Antenna Diversity */
 379        dm_odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->ant_sel;
 380        dm_odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->ant_sel_b;
 381        dm_odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antsel_rx_keep_2;
 382}
 383
 384void odm_Init_RSSIForDM(struct odm_dm_struct *dm_odm)
 385{
 386}
 387
 388static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm,
 389                                  struct odm_phy_status_info *pPhyInfo,
 390                                  struct odm_per_pkt_info *pPktinfo)
 391{
 392        s32 UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK;
 393        s32 UndecoratedSmoothedOFDM, RSSI_Ave;
 394        u8 isCCKrate = 0;
 395        u8 RSSI_max, RSSI_min, i;
 396        u32 OFDM_pkt = 0;
 397        u32 Weighting = 0;
 398        struct sta_info *pEntry;
 399
 400        if (pPktinfo->StationID == 0xFF)
 401                return;
 402        pEntry = dm_odm->pODM_StaInfo[pPktinfo->StationID];
 403        if (!IS_STA_VALID(pEntry))
 404                return;
 405        if ((!pPktinfo->bPacketMatchBSSID))
 406                return;
 407
 408        isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M)) ? true : false;
 409
 410        /* Smart Antenna Debug Message------------------  */
 411        if (dm_odm->SupportICType == ODM_RTL8188E) {
 412                u8 antsel_tr_mux;
 413                struct fast_ant_train *pDM_FatTable = &dm_odm->DM_FatTable;
 414
 415                if (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV) {
 416                        if (pDM_FatTable->FAT_State == FAT_TRAINING_STATE) {
 417                                if (pPktinfo->bPacketToSelf) {
 418                                        antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) |
 419                                                        (pDM_FatTable->antsel_rx_keep_1<<1) |
 420                                                        pDM_FatTable->antsel_rx_keep_0;
 421                                        pDM_FatTable->antSumRSSI[antsel_tr_mux] += pPhyInfo->RxPWDBAll;
 422                                        pDM_FatTable->antRSSIcnt[antsel_tr_mux]++;
 423                                }
 424                        }
 425                } else if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)) {
 426                        if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) {
 427                                antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) |
 428                                                (pDM_FatTable->antsel_rx_keep_1<<1) | pDM_FatTable->antsel_rx_keep_0;
 429                                ODM_AntselStatistics_88E(dm_odm, antsel_tr_mux, pPktinfo->StationID, pPhyInfo->RxPWDBAll);
 430                        }
 431                }
 432        }
 433        /* Smart Antenna Debug Message------------------ */
 434
 435        UndecoratedSmoothedCCK =  pEntry->rssi_stat.UndecoratedSmoothedCCK;
 436        UndecoratedSmoothedOFDM = pEntry->rssi_stat.UndecoratedSmoothedOFDM;
 437        UndecoratedSmoothedPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;
 438
 439        if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) {
 440                if (!isCCKrate) { /* ofdm rate */
 441                        if (pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B] == 0) {
 442                                RSSI_Ave = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];
 443                        } else {
 444                                if (pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A] > pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]) {
 445                                        RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];
 446                                        RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];
 447                                } else {
 448                                        RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];
 449                                        RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];
 450                                }
 451                                if ((RSSI_max - RSSI_min) < 3)
 452                                        RSSI_Ave = RSSI_max;
 453                                else if ((RSSI_max - RSSI_min) < 6)
 454                                        RSSI_Ave = RSSI_max - 1;
 455                                else if ((RSSI_max - RSSI_min) < 10)
 456                                        RSSI_Ave = RSSI_max - 2;
 457                                else
 458                                        RSSI_Ave = RSSI_max - 3;
 459                        }
 460
 461                        /* 1 Process OFDM RSSI */
 462                        if (UndecoratedSmoothedOFDM <= 0) {     /*  initialize */
 463                                UndecoratedSmoothedOFDM = pPhyInfo->RxPWDBAll;
 464                        } else {
 465                                if (pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedOFDM) {
 466                                        UndecoratedSmoothedOFDM =
 467                                                        (((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) +
 468                                                        (RSSI_Ave)) / (Rx_Smooth_Factor);
 469                                        UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM + 1;
 470                                } else {
 471                                        UndecoratedSmoothedOFDM =
 472                                                        (((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) +
 473                                                        (RSSI_Ave)) / (Rx_Smooth_Factor);
 474                                }
 475                        }
 476
 477                        pEntry->rssi_stat.PacketMap = (pEntry->rssi_stat.PacketMap<<1) | BIT0;
 478
 479                } else {
 480                        RSSI_Ave = pPhyInfo->RxPWDBAll;
 481
 482                        /* 1 Process CCK RSSI */
 483                        if (UndecoratedSmoothedCCK <= 0) {      /*  initialize */
 484                                UndecoratedSmoothedCCK = pPhyInfo->RxPWDBAll;
 485                        } else {
 486                                if (pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedCCK) {
 487                                        UndecoratedSmoothedCCK =
 488                                                        ((UndecoratedSmoothedCCK * (Rx_Smooth_Factor-1)) +
 489                                                        pPhyInfo->RxPWDBAll) / Rx_Smooth_Factor;
 490                                        UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1;
 491                                } else {
 492                                        UndecoratedSmoothedCCK =
 493                                                        ((UndecoratedSmoothedCCK * (Rx_Smooth_Factor-1)) +
 494                                                        pPhyInfo->RxPWDBAll) / Rx_Smooth_Factor;
 495                                }
 496                        }
 497                        pEntry->rssi_stat.PacketMap = pEntry->rssi_stat.PacketMap<<1;
 498                }
 499                /* 2011.07.28 LukeLee: modified to prevent unstable CCK RSSI */
 500                if (pEntry->rssi_stat.ValidBit >= 64)
 501                        pEntry->rssi_stat.ValidBit = 64;
 502                else
 503                        pEntry->rssi_stat.ValidBit++;
 504
 505                for (i = 0; i < pEntry->rssi_stat.ValidBit; i++)
 506                        OFDM_pkt += (u8)(pEntry->rssi_stat.PacketMap>>i)&BIT0;
 507
 508                if (pEntry->rssi_stat.ValidBit == 64) {
 509                        Weighting = ((OFDM_pkt<<4) > 64) ? 64 : (OFDM_pkt<<4);
 510                        UndecoratedSmoothedPWDB = (Weighting*UndecoratedSmoothedOFDM+(64-Weighting)*UndecoratedSmoothedCCK)>>6;
 511                } else {
 512                        if (pEntry->rssi_stat.ValidBit != 0)
 513                                UndecoratedSmoothedPWDB = (OFDM_pkt * UndecoratedSmoothedOFDM +
 514                                                          (pEntry->rssi_stat.ValidBit-OFDM_pkt) *
 515                                                          UndecoratedSmoothedCCK)/pEntry->rssi_stat.ValidBit;
 516                        else
 517                                UndecoratedSmoothedPWDB = 0;
 518                }
 519                pEntry->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK;
 520                pEntry->rssi_stat.UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM;
 521                pEntry->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
 522        }
 523}
 524
 525/*  Endianness before calling this API */
 526static void ODM_PhyStatusQuery_92CSeries(struct odm_dm_struct *dm_odm,
 527                                         struct odm_phy_status_info *pPhyInfo,
 528                                         u8 *pPhyStatus,
 529                                         struct odm_per_pkt_info *pPktinfo)
 530{
 531        odm_RxPhyStatus92CSeries_Parsing(dm_odm, pPhyInfo, pPhyStatus,
 532                                         pPktinfo);
 533        if (dm_odm->RSSI_test) {
 534                /*  Select the packets to do RSSI checking for antenna switching. */
 535                if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon)
 536                                ODM_SwAntDivChkPerPktRssi(dm_odm, pPktinfo->StationID, pPhyInfo);
 537        } else {
 538                odm_Process_RSSIForDM(dm_odm, pPhyInfo, pPktinfo);
 539        }
 540}
 541
 542void ODM_PhyStatusQuery(struct odm_dm_struct *dm_odm,
 543                        struct odm_phy_status_info *pPhyInfo,
 544                        u8 *pPhyStatus, struct odm_per_pkt_info *pPktinfo)
 545{
 546        ODM_PhyStatusQuery_92CSeries(dm_odm, pPhyInfo, pPhyStatus, pPktinfo);
 547}
 548
 549/*  For future use. */
 550void ODM_MacStatusQuery(struct odm_dm_struct *dm_odm, u8 *mac_stat,
 551                        u8 macid, bool pkt_match_bssid,
 552                        bool pkttoself, bool pkt_beacon)
 553{
 554        /*  2011/10/19 Driver team will handle in the future. */
 555}
 556
 557enum HAL_STATUS ODM_ConfigRFWithHeaderFile(struct odm_dm_struct *dm_odm,
 558                                           enum ODM_RF_RADIO_PATH content,
 559                                           enum ODM_RF_RADIO_PATH rfpath)
 560{
 561        ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===>ODM_ConfigRFWithHeaderFile\n"));
 562        if (dm_odm->SupportICType == ODM_RTL8188E) {
 563                if (rfpath == ODM_RF_PATH_A)
 564                        READ_AND_CONFIG(8188E, _RadioA_1T_);
 565                ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> ODM_ConfigRFWithHeaderFile() Radio_A:Rtl8188ERadioA_1TArray\n"));
 566                ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> ODM_ConfigRFWithHeaderFile() Radio_B:Rtl8188ERadioB_1TArray\n"));
 567        }
 568
 569        ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("ODM_ConfigRFWithHeaderFile: Radio No %x\n", rfpath));
 570        return HAL_STATUS_SUCCESS;
 571}
 572
 573enum HAL_STATUS ODM_ConfigBBWithHeaderFile(struct odm_dm_struct *dm_odm,
 574                                           enum odm_bb_config_type config_tp)
 575{
 576        if (dm_odm->SupportICType == ODM_RTL8188E) {
 577                if (config_tp == CONFIG_BB_PHY_REG) {
 578                        READ_AND_CONFIG(8188E, _PHY_REG_1T_);
 579                } else if (config_tp == CONFIG_BB_AGC_TAB) {
 580                        READ_AND_CONFIG(8188E, _AGC_TAB_1T_);
 581                } else if (config_tp == CONFIG_BB_PHY_REG_PG) {
 582                        READ_AND_CONFIG(8188E, _PHY_REG_PG_);
 583                        ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD,
 584                                     (" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8188EPHY_REG_PGArray\n"));
 585                }
 586        }
 587        return HAL_STATUS_SUCCESS;
 588}
 589
 590enum HAL_STATUS ODM_ConfigMACWithHeaderFile(struct odm_dm_struct *dm_odm)
 591{
 592        u8 result = HAL_STATUS_SUCCESS;
 593        if (dm_odm->SupportICType == ODM_RTL8188E)
 594                result = READ_AND_CONFIG(8188E, _MAC_REG_);
 595        return result;
 596}
 597