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11#include <linux/tty.h>
12#include <linux/tty_flip.h>
13#include <linux/serial_reg.h>
14#include <linux/dma-mapping.h>
15
16#include "8250.h"
17
18static void __dma_tx_complete(void *param)
19{
20 struct uart_8250_port *p = param;
21 struct uart_8250_dma *dma = p->dma;
22 struct circ_buf *xmit = &p->port.state->xmit;
23
24 dma->tx_running = 0;
25
26 dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr,
27 UART_XMIT_SIZE, DMA_TO_DEVICE);
28
29 xmit->tail += dma->tx_size;
30 xmit->tail &= UART_XMIT_SIZE - 1;
31 p->port.icount.tx += dma->tx_size;
32
33 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
34 uart_write_wakeup(&p->port);
35
36 if (!uart_circ_empty(xmit) && !uart_tx_stopped(&p->port))
37 serial8250_tx_dma(p);
38}
39
40static void __dma_rx_complete(void *param)
41{
42 struct uart_8250_port *p = param;
43 struct uart_8250_dma *dma = p->dma;
44 struct tty_port *tty_port = &p->port.state->port;
45 struct dma_tx_state state;
46 int count;
47
48 dma_sync_single_for_cpu(dma->rxchan->device->dev, dma->rx_addr,
49 dma->rx_size, DMA_FROM_DEVICE);
50
51 dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
52 dmaengine_terminate_all(dma->rxchan);
53
54 count = dma->rx_size - state.residue;
55
56 tty_insert_flip_string(tty_port, dma->rx_buf, count);
57 p->port.icount.rx += count;
58
59 tty_flip_buffer_push(tty_port);
60}
61
62int serial8250_tx_dma(struct uart_8250_port *p)
63{
64 struct uart_8250_dma *dma = p->dma;
65 struct circ_buf *xmit = &p->port.state->xmit;
66 struct dma_async_tx_descriptor *desc;
67
68 if (uart_tx_stopped(&p->port) || dma->tx_running ||
69 uart_circ_empty(xmit))
70 return 0;
71
72 dma->tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
73
74 desc = dmaengine_prep_slave_single(dma->txchan,
75 dma->tx_addr + xmit->tail,
76 dma->tx_size, DMA_MEM_TO_DEV,
77 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
78 if (!desc)
79 return -EBUSY;
80
81 dma->tx_running = 1;
82
83 desc->callback = __dma_tx_complete;
84 desc->callback_param = p;
85
86 dma->tx_cookie = dmaengine_submit(desc);
87
88 dma_sync_single_for_device(dma->txchan->device->dev, dma->tx_addr,
89 UART_XMIT_SIZE, DMA_TO_DEVICE);
90
91 dma_async_issue_pending(dma->txchan);
92
93 return 0;
94}
95EXPORT_SYMBOL_GPL(serial8250_tx_dma);
96
97int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir)
98{
99 struct uart_8250_dma *dma = p->dma;
100 struct dma_async_tx_descriptor *desc;
101 struct dma_tx_state state;
102 int dma_status;
103
104 dma_status = dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
105
106 switch (iir & 0x3f) {
107 case UART_IIR_RLSI:
108
109 return -EIO;
110 case UART_IIR_RX_TIMEOUT:
111
112
113
114
115 if (dma_status == DMA_IN_PROGRESS) {
116 dmaengine_pause(dma->rxchan);
117 __dma_rx_complete(p);
118 }
119 return -ETIMEDOUT;
120 default:
121 break;
122 }
123
124 if (dma_status)
125 return 0;
126
127 desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr,
128 dma->rx_size, DMA_DEV_TO_MEM,
129 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
130 if (!desc)
131 return -EBUSY;
132
133 desc->callback = __dma_rx_complete;
134 desc->callback_param = p;
135
136 dma->rx_cookie = dmaengine_submit(desc);
137
138 dma_sync_single_for_device(dma->rxchan->device->dev, dma->rx_addr,
139 dma->rx_size, DMA_FROM_DEVICE);
140
141 dma_async_issue_pending(dma->rxchan);
142
143 return 0;
144}
145EXPORT_SYMBOL_GPL(serial8250_rx_dma);
146
147int serial8250_request_dma(struct uart_8250_port *p)
148{
149 struct uart_8250_dma *dma = p->dma;
150 dma_cap_mask_t mask;
151
152
153 dma->rxconf.direction = DMA_DEV_TO_MEM;
154 dma->rxconf.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
155 dma->rxconf.src_addr = p->port.mapbase + UART_RX;
156
157 dma->txconf.direction = DMA_MEM_TO_DEV;
158 dma->txconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
159 dma->txconf.dst_addr = p->port.mapbase + UART_TX;
160
161 dma_cap_zero(mask);
162 dma_cap_set(DMA_SLAVE, mask);
163
164
165 dma->rxchan = dma_request_slave_channel_compat(mask,
166 dma->fn, dma->rx_param,
167 p->port.dev, "rx");
168 if (!dma->rxchan)
169 return -ENODEV;
170
171 dmaengine_slave_config(dma->rxchan, &dma->rxconf);
172
173
174 dma->txchan = dma_request_slave_channel_compat(mask,
175 dma->fn, dma->tx_param,
176 p->port.dev, "tx");
177 if (!dma->txchan) {
178 dma_release_channel(dma->rxchan);
179 return -ENODEV;
180 }
181
182 dmaengine_slave_config(dma->txchan, &dma->txconf);
183
184
185 if (!dma->rx_size)
186 dma->rx_size = PAGE_SIZE;
187
188 dma->rx_buf = dma_alloc_coherent(dma->rxchan->device->dev, dma->rx_size,
189 &dma->rx_addr, GFP_KERNEL);
190 if (!dma->rx_buf) {
191 dma_release_channel(dma->rxchan);
192 dma_release_channel(dma->txchan);
193 return -ENOMEM;
194 }
195
196
197 dma->tx_addr = dma_map_single(dma->txchan->device->dev,
198 p->port.state->xmit.buf,
199 UART_XMIT_SIZE,
200 DMA_TO_DEVICE);
201
202 dev_dbg_ratelimited(p->port.dev, "got both dma channels\n");
203
204 return 0;
205}
206EXPORT_SYMBOL_GPL(serial8250_request_dma);
207
208void serial8250_release_dma(struct uart_8250_port *p)
209{
210 struct uart_8250_dma *dma = p->dma;
211
212 if (!dma)
213 return;
214
215
216 dmaengine_terminate_all(dma->rxchan);
217 dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, dma->rx_buf,
218 dma->rx_addr);
219 dma_release_channel(dma->rxchan);
220 dma->rxchan = NULL;
221
222
223 dmaengine_terminate_all(dma->txchan);
224 dma_unmap_single(dma->txchan->device->dev, dma->tx_addr,
225 UART_XMIT_SIZE, DMA_TO_DEVICE);
226 dma_release_channel(dma->txchan);
227 dma->txchan = NULL;
228 dma->tx_running = 0;
229
230 dev_dbg_ratelimited(p->port.dev, "dma channels released\n");
231}
232EXPORT_SYMBOL_GPL(serial8250_release_dma);
233