linux/sound/soc/codecs/ak4642.c
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   1/*
   2 * ak4642.c  --  AK4642/AK4643 ALSA Soc Audio driver
   3 *
   4 * Copyright (C) 2009 Renesas Solutions Corp.
   5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
   6 *
   7 * Based on wm8731.c by Richard Purdie
   8 * Based on ak4535.c by Richard Purdie
   9 * Based on wm8753.c by Liam Girdwood
  10 *
  11 * This program is free software; you can redistribute it and/or modify
  12 * it under the terms of the GNU General Public License version 2 as
  13 * published by the Free Software Foundation.
  14 */
  15
  16/* ** CAUTION **
  17 *
  18 * This is very simple driver.
  19 * It can use headphone output / stereo input only
  20 *
  21 * AK4642 is tested.
  22 * AK4643 is tested.
  23 * AK4648 is tested.
  24 */
  25
  26#include <linux/delay.h>
  27#include <linux/i2c.h>
  28#include <linux/slab.h>
  29#include <linux/of_device.h>
  30#include <linux/module.h>
  31#include <sound/soc.h>
  32#include <sound/initval.h>
  33#include <sound/tlv.h>
  34
  35#define PW_MGMT1        0x00
  36#define PW_MGMT2        0x01
  37#define SG_SL1          0x02
  38#define SG_SL2          0x03
  39#define MD_CTL1         0x04
  40#define MD_CTL2         0x05
  41#define TIMER           0x06
  42#define ALC_CTL1        0x07
  43#define ALC_CTL2        0x08
  44#define L_IVC           0x09
  45#define L_DVC           0x0a
  46#define ALC_CTL3        0x0b
  47#define R_IVC           0x0c
  48#define R_DVC           0x0d
  49#define MD_CTL3         0x0e
  50#define MD_CTL4         0x0f
  51#define PW_MGMT3        0x10
  52#define DF_S            0x11
  53#define FIL3_0          0x12
  54#define FIL3_1          0x13
  55#define FIL3_2          0x14
  56#define FIL3_3          0x15
  57#define EQ_0            0x16
  58#define EQ_1            0x17
  59#define EQ_2            0x18
  60#define EQ_3            0x19
  61#define EQ_4            0x1a
  62#define EQ_5            0x1b
  63#define FIL1_0          0x1c
  64#define FIL1_1          0x1d
  65#define FIL1_2          0x1e
  66#define FIL1_3          0x1f
  67#define PW_MGMT4        0x20
  68#define MD_CTL5         0x21
  69#define LO_MS           0x22
  70#define HP_MS           0x23
  71#define SPK_MS          0x24
  72
  73/* PW_MGMT1*/
  74#define PMVCM           (1 << 6) /* VCOM Power Management */
  75#define PMMIN           (1 << 5) /* MIN Input Power Management */
  76#define PMDAC           (1 << 2) /* DAC Power Management */
  77#define PMADL           (1 << 0) /* MIC Amp Lch and ADC Lch Power Management */
  78
  79/* PW_MGMT2 */
  80#define HPMTN           (1 << 6)
  81#define PMHPL           (1 << 5)
  82#define PMHPR           (1 << 4)
  83#define MS              (1 << 3) /* master/slave select */
  84#define MCKO            (1 << 1)
  85#define PMPLL           (1 << 0)
  86
  87#define PMHP_MASK       (PMHPL | PMHPR)
  88#define PMHP            PMHP_MASK
  89
  90/* PW_MGMT3 */
  91#define PMADR           (1 << 0) /* MIC L / ADC R Power Management */
  92
  93/* SG_SL1 */
  94#define MINS            (1 << 6) /* Switch from MIN to Speaker */
  95#define DACL            (1 << 4) /* Switch from DAC to Stereo or Receiver */
  96#define PMMP            (1 << 2) /* MPWR pin Power Management */
  97#define MGAIN0          (1 << 0) /* MIC amp gain*/
  98
  99/* TIMER */
 100#define ZTM(param)      ((param & 0x3) << 4) /* ALC Zoro Crossing TimeOut */
 101#define WTM(param)      (((param & 0x4) << 4) | ((param & 0x3) << 2))
 102
 103/* ALC_CTL1 */
 104#define ALC             (1 << 5) /* ALC Enable */
 105#define LMTH0           (1 << 0) /* ALC Limiter / Recovery Level */
 106
 107/* MD_CTL1 */
 108#define PLL3            (1 << 7)
 109#define PLL2            (1 << 6)
 110#define PLL1            (1 << 5)
 111#define PLL0            (1 << 4)
 112#define PLL_MASK        (PLL3 | PLL2 | PLL1 | PLL0)
 113
 114#define BCKO_MASK       (1 << 3)
 115#define BCKO_64         BCKO_MASK
 116
 117#define DIF_MASK        (3 << 0)
 118#define DSP             (0 << 0)
 119#define RIGHT_J         (1 << 0)
 120#define LEFT_J          (2 << 0)
 121#define I2S             (3 << 0)
 122
 123/* MD_CTL2 */
 124#define FS0             (1 << 0)
 125#define FS1             (1 << 1)
 126#define FS2             (1 << 2)
 127#define FS3             (1 << 5)
 128#define FS_MASK         (FS0 | FS1 | FS2 | FS3)
 129
 130/* MD_CTL3 */
 131#define BST1            (1 << 3)
 132
 133/* MD_CTL4 */
 134#define DACH            (1 << 0)
 135
 136/*
 137 * Playback Volume (table 39)
 138 *
 139 * max : 0x00 : +12.0 dB
 140 *       ( 0.5 dB step )
 141 * min : 0xFE : -115.0 dB
 142 * mute: 0xFF
 143 */
 144static const DECLARE_TLV_DB_SCALE(out_tlv, -11550, 50, 1);
 145
 146static const struct snd_kcontrol_new ak4642_snd_controls[] = {
 147
 148        SOC_DOUBLE_R_TLV("Digital Playback Volume", L_DVC, R_DVC,
 149                         0, 0xFF, 1, out_tlv),
 150};
 151
 152static const struct snd_kcontrol_new ak4642_headphone_control =
 153        SOC_DAPM_SINGLE("Switch", PW_MGMT2, 6, 1, 0);
 154
 155static const struct snd_kcontrol_new ak4642_lout_mixer_controls[] = {
 156        SOC_DAPM_SINGLE("DACL", SG_SL1, 4, 1, 0),
 157};
 158
 159static const struct snd_soc_dapm_widget ak4642_dapm_widgets[] = {
 160
 161        /* Outputs */
 162        SND_SOC_DAPM_OUTPUT("HPOUTL"),
 163        SND_SOC_DAPM_OUTPUT("HPOUTR"),
 164        SND_SOC_DAPM_OUTPUT("LINEOUT"),
 165
 166        SND_SOC_DAPM_PGA("HPL Out", PW_MGMT2, 5, 0, NULL, 0),
 167        SND_SOC_DAPM_PGA("HPR Out", PW_MGMT2, 4, 0, NULL, 0),
 168        SND_SOC_DAPM_SWITCH("Headphone Enable", SND_SOC_NOPM, 0, 0,
 169                            &ak4642_headphone_control),
 170
 171        SND_SOC_DAPM_PGA("DACH", MD_CTL4, 0, 0, NULL, 0),
 172
 173        SND_SOC_DAPM_MIXER("LINEOUT Mixer", PW_MGMT1, 3, 0,
 174                           &ak4642_lout_mixer_controls[0],
 175                           ARRAY_SIZE(ak4642_lout_mixer_controls)),
 176
 177        /* DAC */
 178        SND_SOC_DAPM_DAC("DAC", "HiFi Playback", PW_MGMT1, 2, 0),
 179};
 180
 181static const struct snd_soc_dapm_route ak4642_intercon[] = {
 182
 183        /* Outputs */
 184        {"HPOUTL", NULL, "HPL Out"},
 185        {"HPOUTR", NULL, "HPR Out"},
 186        {"LINEOUT", NULL, "LINEOUT Mixer"},
 187
 188        {"HPL Out", NULL, "Headphone Enable"},
 189        {"HPR Out", NULL, "Headphone Enable"},
 190
 191        {"Headphone Enable", "Switch", "DACH"},
 192
 193        {"DACH", NULL, "DAC"},
 194
 195        {"LINEOUT Mixer", "DACL", "DAC"},
 196};
 197
 198/*
 199 * ak4642 register cache
 200 */
 201static const u8 ak4642_reg[] = {
 202        0x00, 0x00, 0x01, 0x00,
 203        0x02, 0x00, 0x00, 0x00,
 204        0xe1, 0xe1, 0x18, 0x00,
 205        0xe1, 0x18, 0x11, 0x08,
 206        0x00, 0x00, 0x00, 0x00,
 207        0x00, 0x00, 0x00, 0x00,
 208        0x00, 0x00, 0x00, 0x00,
 209        0x00, 0x00, 0x00, 0x00,
 210        0x00, 0x00, 0x00, 0x00,
 211        0x00,
 212};
 213
 214static const u8 ak4648_reg[] = {
 215        0x00, 0x00, 0x01, 0x00,
 216        0x02, 0x00, 0x00, 0x00,
 217        0xe1, 0xe1, 0x18, 0x00,
 218        0xe1, 0x18, 0x11, 0xb8,
 219        0x00, 0x00, 0x00, 0x00,
 220        0x00, 0x00, 0x00, 0x00,
 221        0x00, 0x00, 0x00, 0x00,
 222        0x00, 0x00, 0x00, 0x00,
 223        0x00, 0x00, 0x00, 0x00,
 224        0x00, 0x88, 0x88, 0x08,
 225};
 226
 227static int ak4642_dai_startup(struct snd_pcm_substream *substream,
 228                              struct snd_soc_dai *dai)
 229{
 230        int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
 231        struct snd_soc_codec *codec = dai->codec;
 232
 233        if (is_play) {
 234                /*
 235                 * start headphone output
 236                 *
 237                 * PLL, Master Mode
 238                 * Audio I/F Format :MSB justified (ADC & DAC)
 239                 * Bass Boost Level : Middle
 240                 *
 241                 * This operation came from example code of
 242                 * "ASAHI KASEI AK4642" (japanese) manual p97.
 243                 */
 244                snd_soc_write(codec, L_IVC, 0x91); /* volume */
 245                snd_soc_write(codec, R_IVC, 0x91); /* volume */
 246        } else {
 247                /*
 248                 * start stereo input
 249                 *
 250                 * PLL Master Mode
 251                 * Audio I/F Format:MSB justified (ADC & DAC)
 252                 * Pre MIC AMP:+20dB
 253                 * MIC Power On
 254                 * ALC setting:Refer to Table 35
 255                 * ALC bit=“1”
 256                 *
 257                 * This operation came from example code of
 258                 * "ASAHI KASEI AK4642" (japanese) manual p94.
 259                 */
 260                snd_soc_update_bits(codec, SG_SL1, PMMP | MGAIN0, PMMP | MGAIN0);
 261                snd_soc_write(codec, TIMER, ZTM(0x3) | WTM(0x3));
 262                snd_soc_write(codec, ALC_CTL1, ALC | LMTH0);
 263                snd_soc_update_bits(codec, PW_MGMT1, PMADL, PMADL);
 264                snd_soc_update_bits(codec, PW_MGMT3, PMADR, PMADR);
 265        }
 266
 267        return 0;
 268}
 269
 270static void ak4642_dai_shutdown(struct snd_pcm_substream *substream,
 271                               struct snd_soc_dai *dai)
 272{
 273        int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
 274        struct snd_soc_codec *codec = dai->codec;
 275
 276        if (is_play) {
 277        } else {
 278                /* stop stereo input */
 279                snd_soc_update_bits(codec, PW_MGMT1, PMADL, 0);
 280                snd_soc_update_bits(codec, PW_MGMT3, PMADR, 0);
 281                snd_soc_update_bits(codec, ALC_CTL1, ALC, 0);
 282        }
 283}
 284
 285static int ak4642_dai_set_sysclk(struct snd_soc_dai *codec_dai,
 286        int clk_id, unsigned int freq, int dir)
 287{
 288        struct snd_soc_codec *codec = codec_dai->codec;
 289        u8 pll;
 290
 291        switch (freq) {
 292        case 11289600:
 293                pll = PLL2;
 294                break;
 295        case 12288000:
 296                pll = PLL2 | PLL0;
 297                break;
 298        case 12000000:
 299                pll = PLL2 | PLL1;
 300                break;
 301        case 24000000:
 302                pll = PLL2 | PLL1 | PLL0;
 303                break;
 304        case 13500000:
 305                pll = PLL3 | PLL2;
 306                break;
 307        case 27000000:
 308                pll = PLL3 | PLL2 | PLL0;
 309                break;
 310        default:
 311                return -EINVAL;
 312        }
 313        snd_soc_update_bits(codec, MD_CTL1, PLL_MASK, pll);
 314
 315        return 0;
 316}
 317
 318static int ak4642_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
 319{
 320        struct snd_soc_codec *codec = dai->codec;
 321        u8 data;
 322        u8 bcko;
 323
 324        data = MCKO | PMPLL; /* use MCKO */
 325        bcko = 0;
 326
 327        /* set master/slave audio interface */
 328        switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 329        case SND_SOC_DAIFMT_CBM_CFM:
 330                data |= MS;
 331                bcko = BCKO_64;
 332                break;
 333        case SND_SOC_DAIFMT_CBS_CFS:
 334                break;
 335        default:
 336                return -EINVAL;
 337        }
 338        snd_soc_update_bits(codec, PW_MGMT2, MS | MCKO | PMPLL, data);
 339        snd_soc_update_bits(codec, MD_CTL1, BCKO_MASK, bcko);
 340
 341        /* format type */
 342        data = 0;
 343        switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 344        case SND_SOC_DAIFMT_LEFT_J:
 345                data = LEFT_J;
 346                break;
 347        case SND_SOC_DAIFMT_I2S:
 348                data = I2S;
 349                break;
 350        /* FIXME
 351         * Please add RIGHT_J / DSP support here
 352         */
 353        default:
 354                return -EINVAL;
 355        }
 356        snd_soc_update_bits(codec, MD_CTL1, DIF_MASK, data);
 357
 358        return 0;
 359}
 360
 361static int ak4642_dai_hw_params(struct snd_pcm_substream *substream,
 362                                struct snd_pcm_hw_params *params,
 363                                struct snd_soc_dai *dai)
 364{
 365        struct snd_soc_codec *codec = dai->codec;
 366        u8 rate;
 367
 368        switch (params_rate(params)) {
 369        case 7350:
 370                rate = FS2;
 371                break;
 372        case 8000:
 373                rate = 0;
 374                break;
 375        case 11025:
 376                rate = FS2 | FS0;
 377                break;
 378        case 12000:
 379                rate = FS0;
 380                break;
 381        case 14700:
 382                rate = FS2 | FS1;
 383                break;
 384        case 16000:
 385                rate = FS1;
 386                break;
 387        case 22050:
 388                rate = FS2 | FS1 | FS0;
 389                break;
 390        case 24000:
 391                rate = FS1 | FS0;
 392                break;
 393        case 29400:
 394                rate = FS3 | FS2 | FS1;
 395                break;
 396        case 32000:
 397                rate = FS3 | FS1;
 398                break;
 399        case 44100:
 400                rate = FS3 | FS2 | FS1 | FS0;
 401                break;
 402        case 48000:
 403                rate = FS3 | FS1 | FS0;
 404                break;
 405        default:
 406                return -EINVAL;
 407        }
 408        snd_soc_update_bits(codec, MD_CTL2, FS_MASK, rate);
 409
 410        return 0;
 411}
 412
 413static int ak4642_set_bias_level(struct snd_soc_codec *codec,
 414                                 enum snd_soc_bias_level level)
 415{
 416        switch (level) {
 417        case SND_SOC_BIAS_OFF:
 418                snd_soc_write(codec, PW_MGMT1, 0x00);
 419                break;
 420        default:
 421                snd_soc_update_bits(codec, PW_MGMT1, PMVCM, PMVCM);
 422                break;
 423        }
 424        codec->dapm.bias_level = level;
 425
 426        return 0;
 427}
 428
 429static const struct snd_soc_dai_ops ak4642_dai_ops = {
 430        .startup        = ak4642_dai_startup,
 431        .shutdown       = ak4642_dai_shutdown,
 432        .set_sysclk     = ak4642_dai_set_sysclk,
 433        .set_fmt        = ak4642_dai_set_fmt,
 434        .hw_params      = ak4642_dai_hw_params,
 435};
 436
 437static struct snd_soc_dai_driver ak4642_dai = {
 438        .name = "ak4642-hifi",
 439        .playback = {
 440                .stream_name = "Playback",
 441                .channels_min = 1,
 442                .channels_max = 2,
 443                .rates = SNDRV_PCM_RATE_8000_48000,
 444                .formats = SNDRV_PCM_FMTBIT_S16_LE },
 445        .capture = {
 446                .stream_name = "Capture",
 447                .channels_min = 1,
 448                .channels_max = 2,
 449                .rates = SNDRV_PCM_RATE_8000_48000,
 450                .formats = SNDRV_PCM_FMTBIT_S16_LE },
 451        .ops = &ak4642_dai_ops,
 452        .symmetric_rates = 1,
 453};
 454
 455static int ak4642_resume(struct snd_soc_codec *codec)
 456{
 457        snd_soc_cache_sync(codec);
 458        return 0;
 459}
 460
 461
 462static int ak4642_probe(struct snd_soc_codec *codec)
 463{
 464        int ret;
 465
 466        ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_I2C);
 467        if (ret < 0) {
 468                dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
 469                return ret;
 470        }
 471
 472        snd_soc_add_codec_controls(codec, ak4642_snd_controls,
 473                             ARRAY_SIZE(ak4642_snd_controls));
 474
 475        ak4642_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
 476
 477        return 0;
 478}
 479
 480static int ak4642_remove(struct snd_soc_codec *codec)
 481{
 482        ak4642_set_bias_level(codec, SND_SOC_BIAS_OFF);
 483        return 0;
 484}
 485
 486static struct snd_soc_codec_driver soc_codec_dev_ak4642 = {
 487        .probe                  = ak4642_probe,
 488        .remove                 = ak4642_remove,
 489        .resume                 = ak4642_resume,
 490        .set_bias_level         = ak4642_set_bias_level,
 491        .reg_cache_default      = ak4642_reg,                   /* ak4642 reg */
 492        .reg_cache_size         = ARRAY_SIZE(ak4642_reg),       /* ak4642 reg */
 493        .reg_word_size          = sizeof(u8),
 494        .dapm_widgets           = ak4642_dapm_widgets,
 495        .num_dapm_widgets       = ARRAY_SIZE(ak4642_dapm_widgets),
 496        .dapm_routes            = ak4642_intercon,
 497        .num_dapm_routes        = ARRAY_SIZE(ak4642_intercon),
 498};
 499
 500static struct snd_soc_codec_driver soc_codec_dev_ak4648 = {
 501        .probe                  = ak4642_probe,
 502        .remove                 = ak4642_remove,
 503        .resume                 = ak4642_resume,
 504        .set_bias_level         = ak4642_set_bias_level,
 505        .reg_cache_default      = ak4648_reg,                   /* ak4648 reg */
 506        .reg_cache_size         = ARRAY_SIZE(ak4648_reg),       /* ak4648 reg */
 507        .reg_word_size          = sizeof(u8),
 508        .dapm_widgets           = ak4642_dapm_widgets,
 509        .num_dapm_widgets       = ARRAY_SIZE(ak4642_dapm_widgets),
 510        .dapm_routes            = ak4642_intercon,
 511        .num_dapm_routes        = ARRAY_SIZE(ak4642_intercon),
 512};
 513
 514#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
 515static struct of_device_id ak4642_of_match[];
 516static int ak4642_i2c_probe(struct i2c_client *i2c,
 517                            const struct i2c_device_id *id)
 518{
 519        struct device_node *np = i2c->dev.of_node;
 520        const struct snd_soc_codec_driver *driver;
 521
 522        driver = NULL;
 523        if (np) {
 524                const struct of_device_id *of_id;
 525
 526                of_id = of_match_device(ak4642_of_match, &i2c->dev);
 527                if (of_id)
 528                        driver = of_id->data;
 529        } else {
 530                driver = (struct snd_soc_codec_driver *)id->driver_data;
 531        }
 532
 533        if (!driver) {
 534                dev_err(&i2c->dev, "no driver\n");
 535                return -EINVAL;
 536        }
 537
 538        return snd_soc_register_codec(&i2c->dev,
 539                                      driver, &ak4642_dai, 1);
 540}
 541
 542static int ak4642_i2c_remove(struct i2c_client *client)
 543{
 544        snd_soc_unregister_codec(&client->dev);
 545        return 0;
 546}
 547
 548static struct of_device_id ak4642_of_match[] = {
 549        { .compatible = "asahi-kasei,ak4642",   .data = &soc_codec_dev_ak4642},
 550        { .compatible = "asahi-kasei,ak4643",   .data = &soc_codec_dev_ak4642},
 551        { .compatible = "asahi-kasei,ak4648",   .data = &soc_codec_dev_ak4648},
 552        {},
 553};
 554MODULE_DEVICE_TABLE(of, ak4642_of_match);
 555
 556static const struct i2c_device_id ak4642_i2c_id[] = {
 557        { "ak4642", (kernel_ulong_t)&soc_codec_dev_ak4642 },
 558        { "ak4643", (kernel_ulong_t)&soc_codec_dev_ak4642 },
 559        { "ak4648", (kernel_ulong_t)&soc_codec_dev_ak4648 },
 560        { }
 561};
 562MODULE_DEVICE_TABLE(i2c, ak4642_i2c_id);
 563
 564static struct i2c_driver ak4642_i2c_driver = {
 565        .driver = {
 566                .name = "ak4642-codec",
 567                .owner = THIS_MODULE,
 568                .of_match_table = ak4642_of_match,
 569        },
 570        .probe          = ak4642_i2c_probe,
 571        .remove         = ak4642_i2c_remove,
 572        .id_table       = ak4642_i2c_id,
 573};
 574#endif
 575
 576static int __init ak4642_modinit(void)
 577{
 578        int ret = 0;
 579#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
 580        ret = i2c_add_driver(&ak4642_i2c_driver);
 581#endif
 582        return ret;
 583
 584}
 585module_init(ak4642_modinit);
 586
 587static void __exit ak4642_exit(void)
 588{
 589#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
 590        i2c_del_driver(&ak4642_i2c_driver);
 591#endif
 592
 593}
 594module_exit(ak4642_exit);
 595
 596MODULE_DESCRIPTION("Soc AK4642 driver");
 597MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
 598MODULE_LICENSE("GPL");
 599