linux/arch/arm/mach-imx/mach-mx31_3ds.c
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   1/*
   2 *  Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
   3 *
   4 * This program is free software; you can redistribute it and/or modify
   5 * it under the terms of the GNU General Public License as published by
   6 * the Free Software Foundation; either version 2 of the License, or
   7 * (at your option) any later version.
   8 *
   9 * This program is distributed in the hope that it will be useful,
  10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12 * GNU General Public License for more details.
  13 */
  14
  15#include <linux/delay.h>
  16#include <linux/dma-mapping.h>
  17#include <linux/types.h>
  18#include <linux/init.h>
  19#include <linux/clk.h>
  20#include <linux/irq.h>
  21#include <linux/gpio.h>
  22#include <linux/platform_device.h>
  23#include <linux/mfd/mc13783.h>
  24#include <linux/spi/spi.h>
  25#include <linux/spi/l4f00242t03.h>
  26#include <linux/regulator/machine.h>
  27#include <linux/usb/otg.h>
  28#include <linux/usb/ulpi.h>
  29#include <linux/memblock.h>
  30
  31#include <media/soc_camera.h>
  32
  33#include <asm/mach-types.h>
  34#include <asm/mach/arch.h>
  35#include <asm/mach/time.h>
  36#include <asm/memory.h>
  37#include <asm/mach/map.h>
  38#include <asm/memblock.h>
  39
  40#include "3ds_debugboard.h"
  41#include "common.h"
  42#include "devices-imx31.h"
  43#include "hardware.h"
  44#include "iomux-mx3.h"
  45#include "ulpi.h"
  46
  47static int mx31_3ds_pins[] = {
  48        /* UART1 */
  49        MX31_PIN_CTS1__CTS1,
  50        MX31_PIN_RTS1__RTS1,
  51        MX31_PIN_TXD1__TXD1,
  52        MX31_PIN_RXD1__RXD1,
  53        IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO),
  54        /*SPI0*/
  55        IOMUX_MODE(MX31_PIN_DSR_DCE1, IOMUX_CONFIG_ALT1),
  56        IOMUX_MODE(MX31_PIN_RI_DCE1, IOMUX_CONFIG_ALT1),
  57        /* SPI 1 */
  58        MX31_PIN_CSPI2_SCLK__SCLK,
  59        MX31_PIN_CSPI2_MOSI__MOSI,
  60        MX31_PIN_CSPI2_MISO__MISO,
  61        MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
  62        MX31_PIN_CSPI2_SS0__SS0,
  63        MX31_PIN_CSPI2_SS2__SS2, /*CS for MC13783 */
  64        /* MC13783 IRQ */
  65        IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO),
  66        /* USB OTG reset */
  67        IOMUX_MODE(MX31_PIN_USB_PWR, IOMUX_CONFIG_GPIO),
  68        /* USB OTG */
  69        MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
  70        MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
  71        MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
  72        MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
  73        MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
  74        MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
  75        MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
  76        MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
  77        MX31_PIN_USBOTG_CLK__USBOTG_CLK,
  78        MX31_PIN_USBOTG_DIR__USBOTG_DIR,
  79        MX31_PIN_USBOTG_NXT__USBOTG_NXT,
  80        MX31_PIN_USBOTG_STP__USBOTG_STP,
  81        /*Keyboard*/
  82        MX31_PIN_KEY_ROW0_KEY_ROW0,
  83        MX31_PIN_KEY_ROW1_KEY_ROW1,
  84        MX31_PIN_KEY_ROW2_KEY_ROW2,
  85        MX31_PIN_KEY_COL0_KEY_COL0,
  86        MX31_PIN_KEY_COL1_KEY_COL1,
  87        MX31_PIN_KEY_COL2_KEY_COL2,
  88        MX31_PIN_KEY_COL3_KEY_COL3,
  89        /* USB Host 2 */
  90        IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
  91        IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
  92        IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
  93        IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
  94        IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
  95        IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
  96        IOMUX_MODE(MX31_PIN_PC_VS2, IOMUX_CONFIG_ALT1),
  97        IOMUX_MODE(MX31_PIN_PC_BVD1, IOMUX_CONFIG_ALT1),
  98        IOMUX_MODE(MX31_PIN_PC_BVD2, IOMUX_CONFIG_ALT1),
  99        IOMUX_MODE(MX31_PIN_PC_RST, IOMUX_CONFIG_ALT1),
 100        IOMUX_MODE(MX31_PIN_IOIS16, IOMUX_CONFIG_ALT1),
 101        IOMUX_MODE(MX31_PIN_PC_RW_B, IOMUX_CONFIG_ALT1),
 102        /* USB Host2 reset */
 103        IOMUX_MODE(MX31_PIN_USB_BYP, IOMUX_CONFIG_GPIO),
 104        /* I2C1 */
 105        MX31_PIN_I2C_CLK__I2C1_SCL,
 106        MX31_PIN_I2C_DAT__I2C1_SDA,
 107        /* SDHC1 */
 108        MX31_PIN_SD1_DATA3__SD1_DATA3,
 109        MX31_PIN_SD1_DATA2__SD1_DATA2,
 110        MX31_PIN_SD1_DATA1__SD1_DATA1,
 111        MX31_PIN_SD1_DATA0__SD1_DATA0,
 112        MX31_PIN_SD1_CLK__SD1_CLK,
 113        MX31_PIN_SD1_CMD__SD1_CMD,
 114        MX31_PIN_GPIO3_1__GPIO3_1, /* Card detect */
 115        MX31_PIN_GPIO3_0__GPIO3_0, /* OE */
 116        /* Framebuffer */
 117        MX31_PIN_LD0__LD0,
 118        MX31_PIN_LD1__LD1,
 119        MX31_PIN_LD2__LD2,
 120        MX31_PIN_LD3__LD3,
 121        MX31_PIN_LD4__LD4,
 122        MX31_PIN_LD5__LD5,
 123        MX31_PIN_LD6__LD6,
 124        MX31_PIN_LD7__LD7,
 125        MX31_PIN_LD8__LD8,
 126        MX31_PIN_LD9__LD9,
 127        MX31_PIN_LD10__LD10,
 128        MX31_PIN_LD11__LD11,
 129        MX31_PIN_LD12__LD12,
 130        MX31_PIN_LD13__LD13,
 131        MX31_PIN_LD14__LD14,
 132        MX31_PIN_LD15__LD15,
 133        MX31_PIN_LD16__LD16,
 134        MX31_PIN_LD17__LD17,
 135        MX31_PIN_VSYNC3__VSYNC3,
 136        MX31_PIN_HSYNC__HSYNC,
 137        MX31_PIN_FPSHIFT__FPSHIFT,
 138        MX31_PIN_CONTRAST__CONTRAST,
 139        /* CSI */
 140        MX31_PIN_CSI_D6__CSI_D6,
 141        MX31_PIN_CSI_D7__CSI_D7,
 142        MX31_PIN_CSI_D8__CSI_D8,
 143        MX31_PIN_CSI_D9__CSI_D9,
 144        MX31_PIN_CSI_D10__CSI_D10,
 145        MX31_PIN_CSI_D11__CSI_D11,
 146        MX31_PIN_CSI_D12__CSI_D12,
 147        MX31_PIN_CSI_D13__CSI_D13,
 148        MX31_PIN_CSI_D14__CSI_D14,
 149        MX31_PIN_CSI_D15__CSI_D15,
 150        MX31_PIN_CSI_HSYNC__CSI_HSYNC,
 151        MX31_PIN_CSI_MCLK__CSI_MCLK,
 152        MX31_PIN_CSI_PIXCLK__CSI_PIXCLK,
 153        MX31_PIN_CSI_VSYNC__CSI_VSYNC,
 154        MX31_PIN_CSI_D5__GPIO3_5, /* CMOS PWDN */
 155        IOMUX_MODE(MX31_PIN_RI_DTE1, IOMUX_CONFIG_GPIO), /* CMOS reset */
 156        /* SSI */
 157        MX31_PIN_STXD4__STXD4,
 158        MX31_PIN_SRXD4__SRXD4,
 159        MX31_PIN_SCK4__SCK4,
 160        MX31_PIN_SFS4__SFS4,
 161};
 162
 163/*
 164 * Camera support
 165 */
 166static phys_addr_t mx3_camera_base __initdata;
 167#define MX31_3DS_CAMERA_BUF_SIZE SZ_8M
 168
 169#define MX31_3DS_GPIO_CAMERA_PW IOMUX_TO_GPIO(MX31_PIN_CSI_D5)
 170#define MX31_3DS_GPIO_CAMERA_RST IOMUX_TO_GPIO(MX31_PIN_RI_DTE1)
 171
 172static struct gpio mx31_3ds_camera_gpios[] = {
 173        { MX31_3DS_GPIO_CAMERA_PW, GPIOF_OUT_INIT_HIGH, "camera-power" },
 174        { MX31_3DS_GPIO_CAMERA_RST, GPIOF_OUT_INIT_HIGH, "camera-reset" },
 175};
 176
 177static const struct mx3_camera_pdata mx31_3ds_camera_pdata __initconst = {
 178        .flags = MX3_CAMERA_DATAWIDTH_10,
 179        .mclk_10khz = 2600,
 180};
 181
 182static int __init mx31_3ds_init_camera(void)
 183{
 184        int dma, ret = -ENOMEM;
 185        struct platform_device *pdev =
 186                imx31_alloc_mx3_camera(&mx31_3ds_camera_pdata);
 187
 188        if (IS_ERR(pdev))
 189                return PTR_ERR(pdev);
 190
 191        if (!mx3_camera_base)
 192                goto err;
 193
 194        dma = dma_declare_coherent_memory(&pdev->dev,
 195                                        mx3_camera_base, mx3_camera_base,
 196                                        MX31_3DS_CAMERA_BUF_SIZE,
 197                                        DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
 198
 199        if (!(dma & DMA_MEMORY_MAP))
 200                goto err;
 201
 202        ret = platform_device_add(pdev);
 203        if (ret)
 204err:
 205                platform_device_put(pdev);
 206
 207        return ret;
 208}
 209
 210static int mx31_3ds_camera_power(struct device *dev, int on)
 211{
 212        /* enable or disable the camera */
 213        pr_debug("%s: %s the camera\n", __func__, on ? "ENABLE" : "DISABLE");
 214        gpio_set_value(MX31_3DS_GPIO_CAMERA_PW, on ? 0 : 1);
 215
 216        if (!on)
 217                goto out;
 218
 219        /* If enabled, give a reset impulse */
 220        gpio_set_value(MX31_3DS_GPIO_CAMERA_RST, 0);
 221        msleep(20);
 222        gpio_set_value(MX31_3DS_GPIO_CAMERA_RST, 1);
 223        msleep(100);
 224
 225out:
 226        return 0;
 227}
 228
 229static struct i2c_board_info mx31_3ds_i2c_camera = {
 230        I2C_BOARD_INFO("ov2640", 0x30),
 231};
 232
 233static struct regulator_bulk_data mx31_3ds_camera_regs[] = {
 234        { .supply = "cmos_vcore" },
 235        { .supply = "cmos_2v8" },
 236};
 237
 238static struct soc_camera_link iclink_ov2640 = {
 239        .bus_id         = 0,
 240        .board_info     = &mx31_3ds_i2c_camera,
 241        .i2c_adapter_id = 0,
 242        .power          = mx31_3ds_camera_power,
 243        .regulators     = mx31_3ds_camera_regs,
 244        .num_regulators = ARRAY_SIZE(mx31_3ds_camera_regs),
 245};
 246
 247static struct platform_device mx31_3ds_ov2640 = {
 248        .name   = "soc-camera-pdrv",
 249        .id     = 0,
 250        .dev    = {
 251                .platform_data = &iclink_ov2640,
 252        },
 253};
 254
 255/*
 256 * FB support
 257 */
 258static const struct fb_videomode fb_modedb[] = {
 259        {       /* 480x640 @ 60 Hz */
 260                .name           = "Epson-VGA",
 261                .refresh        = 60,
 262                .xres           = 480,
 263                .yres           = 640,
 264                .pixclock       = 41701,
 265                .left_margin    = 20,
 266                .right_margin   = 41,
 267                .upper_margin   = 10,
 268                .lower_margin   = 5,
 269                .hsync_len      = 20,
 270                .vsync_len      = 10,
 271                .sync           = FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
 272                .vmode          = FB_VMODE_NONINTERLACED,
 273                .flag           = 0,
 274        },
 275};
 276
 277static struct mx3fb_platform_data mx3fb_pdata __initdata = {
 278        .name           = "Epson-VGA",
 279        .mode           = fb_modedb,
 280        .num_modes      = ARRAY_SIZE(fb_modedb),
 281};
 282
 283/* LCD */
 284static struct l4f00242t03_pdata mx31_3ds_l4f00242t03_pdata = {
 285        .reset_gpio             = IOMUX_TO_GPIO(MX31_PIN_LCS1),
 286        .data_enable_gpio       = IOMUX_TO_GPIO(MX31_PIN_SER_RS),
 287};
 288
 289/*
 290 * Support for SD card slot in personality board
 291 */
 292#define MX31_3DS_GPIO_SDHC1_CD IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)
 293#define MX31_3DS_GPIO_SDHC1_BE IOMUX_TO_GPIO(MX31_PIN_GPIO3_0)
 294
 295static struct gpio mx31_3ds_sdhc1_gpios[] = {
 296        { MX31_3DS_GPIO_SDHC1_CD, GPIOF_IN, "sdhc1-card-detect" },
 297        { MX31_3DS_GPIO_SDHC1_BE, GPIOF_OUT_INIT_LOW, "sdhc1-bus-en" },
 298};
 299
 300static int mx31_3ds_sdhc1_init(struct device *dev,
 301                               irq_handler_t detect_irq,
 302                               void *data)
 303{
 304        int ret;
 305
 306        ret = gpio_request_array(mx31_3ds_sdhc1_gpios,
 307                                 ARRAY_SIZE(mx31_3ds_sdhc1_gpios));
 308        if (ret) {
 309                pr_warning("Unable to request the SD/MMC GPIOs.\n");
 310                return ret;
 311        }
 312
 313        ret = request_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)),
 314                          detect_irq,
 315                          IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
 316                          "sdhc1-detect", data);
 317        if (ret) {
 318                pr_warning("Unable to request the SD/MMC card-detect IRQ.\n");
 319                goto gpio_free;
 320        }
 321
 322        return 0;
 323
 324gpio_free:
 325        gpio_free_array(mx31_3ds_sdhc1_gpios,
 326                        ARRAY_SIZE(mx31_3ds_sdhc1_gpios));
 327        return ret;
 328}
 329
 330static void mx31_3ds_sdhc1_exit(struct device *dev, void *data)
 331{
 332        free_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)), data);
 333        gpio_free_array(mx31_3ds_sdhc1_gpios,
 334                         ARRAY_SIZE(mx31_3ds_sdhc1_gpios));
 335}
 336
 337static void mx31_3ds_sdhc1_setpower(struct device *dev, unsigned int vdd)
 338{
 339        /*
 340         * While the voltage stuff is done by the driver, activate the
 341         * Buffer Enable Pin only if there is a card in slot to fix the card
 342         * voltage issue caused by bi-directional chip TXB0108 on 3Stack.
 343         * Done here because at this stage we have for sure a debounced value
 344         * of the presence of the card, showed by the value of vdd.
 345         * 7 == ilog2(MMC_VDD_165_195)
 346         */
 347        if (vdd > 7)
 348                gpio_set_value(MX31_3DS_GPIO_SDHC1_BE, 1);
 349        else
 350                gpio_set_value(MX31_3DS_GPIO_SDHC1_BE, 0);
 351}
 352
 353static struct imxmmc_platform_data sdhc1_pdata = {
 354        .init           = mx31_3ds_sdhc1_init,
 355        .exit           = mx31_3ds_sdhc1_exit,
 356        .setpower       = mx31_3ds_sdhc1_setpower,
 357};
 358
 359/*
 360 * Matrix keyboard
 361 */
 362
 363static const uint32_t mx31_3ds_keymap[] = {
 364        KEY(0, 0, KEY_UP),
 365        KEY(0, 1, KEY_DOWN),
 366        KEY(1, 0, KEY_RIGHT),
 367        KEY(1, 1, KEY_LEFT),
 368        KEY(1, 2, KEY_ENTER),
 369        KEY(2, 0, KEY_F6),
 370        KEY(2, 1, KEY_F8),
 371        KEY(2, 2, KEY_F9),
 372        KEY(2, 3, KEY_F10),
 373};
 374
 375static const struct matrix_keymap_data mx31_3ds_keymap_data __initconst = {
 376        .keymap         = mx31_3ds_keymap,
 377        .keymap_size    = ARRAY_SIZE(mx31_3ds_keymap),
 378};
 379
 380/* Regulators */
 381static struct regulator_init_data pwgtx_init = {
 382        .constraints = {
 383                .boot_on        = 1,
 384                .always_on      = 1,
 385        },
 386};
 387
 388static struct regulator_init_data gpo_init = {
 389        .constraints = {
 390                .boot_on = 1,
 391                .always_on = 1,
 392        }
 393};
 394
 395static struct regulator_consumer_supply vmmc2_consumers[] = {
 396        REGULATOR_SUPPLY("vmmc", "imx31-mmc.0"),
 397};
 398
 399static struct regulator_init_data vmmc2_init = {
 400        .constraints = {
 401                .min_uV = 3000000,
 402                .max_uV = 3000000,
 403                .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
 404                                  REGULATOR_CHANGE_STATUS,
 405        },
 406        .num_consumer_supplies = ARRAY_SIZE(vmmc2_consumers),
 407        .consumer_supplies = vmmc2_consumers,
 408};
 409
 410static struct regulator_consumer_supply vmmc1_consumers[] = {
 411        REGULATOR_SUPPLY("vcore", "spi0.0"),
 412        REGULATOR_SUPPLY("cmos_2v8", "soc-camera-pdrv.0"),
 413};
 414
 415static struct regulator_init_data vmmc1_init = {
 416        .constraints = {
 417                .min_uV = 2800000,
 418                .max_uV = 2800000,
 419                .apply_uV = 1,
 420                .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
 421                                  REGULATOR_CHANGE_STATUS,
 422        },
 423        .num_consumer_supplies = ARRAY_SIZE(vmmc1_consumers),
 424        .consumer_supplies = vmmc1_consumers,
 425};
 426
 427static struct regulator_consumer_supply vgen_consumers[] = {
 428        REGULATOR_SUPPLY("vdd", "spi0.0"),
 429};
 430
 431static struct regulator_init_data vgen_init = {
 432        .constraints = {
 433                .min_uV = 1800000,
 434                .max_uV = 1800000,
 435                .apply_uV = 1,
 436                .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
 437                                  REGULATOR_CHANGE_STATUS,
 438        },
 439        .num_consumer_supplies = ARRAY_SIZE(vgen_consumers),
 440        .consumer_supplies = vgen_consumers,
 441};
 442
 443static struct regulator_consumer_supply vvib_consumers[] = {
 444        REGULATOR_SUPPLY("cmos_vcore", "soc-camera-pdrv.0"),
 445};
 446
 447static struct regulator_init_data vvib_init = {
 448        .constraints = {
 449                .min_uV = 1300000,
 450                .max_uV = 1300000,
 451                .apply_uV = 1,
 452                .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
 453                                  REGULATOR_CHANGE_STATUS,
 454        },
 455        .num_consumer_supplies = ARRAY_SIZE(vvib_consumers),
 456        .consumer_supplies = vvib_consumers,
 457};
 458
 459static struct mc13xxx_regulator_init_data mx31_3ds_regulators[] = {
 460        {
 461                .id = MC13783_REG_PWGT1SPI, /* Power Gate for ARM core. */
 462                .init_data = &pwgtx_init,
 463        }, {
 464                .id = MC13783_REG_PWGT2SPI, /* Power Gate for L2 Cache. */
 465                .init_data = &pwgtx_init,
 466        }, {
 467
 468                .id = MC13783_REG_GPO1, /* Turn on 1.8V */
 469                .init_data = &gpo_init,
 470        }, {
 471                .id = MC13783_REG_GPO3, /* Turn on 3.3V */
 472                .init_data = &gpo_init,
 473        }, {
 474                .id = MC13783_REG_VMMC2, /* Power MMC/SD, WiFi/Bluetooth. */
 475                .init_data = &vmmc2_init,
 476        }, {
 477                .id = MC13783_REG_VMMC1, /* Power LCD, CMOS, FM, GPS, Accel. */
 478                .init_data = &vmmc1_init,
 479        }, {
 480                .id = MC13783_REG_VGEN,  /* Power LCD */
 481                .init_data = &vgen_init,
 482        }, {
 483                .id = MC13783_REG_VVIB,  /* Power CMOS */
 484                .init_data = &vvib_init,
 485        },
 486};
 487
 488/* MC13783 */
 489static struct mc13xxx_codec_platform_data mx31_3ds_codec = {
 490        .dac_ssi_port = MC13783_SSI1_PORT,
 491        .adc_ssi_port = MC13783_SSI1_PORT,
 492};
 493
 494static struct mc13xxx_platform_data mc13783_pdata = {
 495        .regulators = {
 496                .regulators = mx31_3ds_regulators,
 497                .num_regulators = ARRAY_SIZE(mx31_3ds_regulators),
 498        },
 499        .codec = &mx31_3ds_codec,
 500        .flags  = MC13XXX_USE_TOUCHSCREEN | MC13XXX_USE_RTC | MC13XXX_USE_CODEC,
 501
 502};
 503
 504static struct imx_ssi_platform_data mx31_3ds_ssi_pdata = {
 505        .flags = IMX_SSI_DMA | IMX_SSI_NET,
 506};
 507
 508/* SPI */
 509static int spi0_internal_chipselect[] = {
 510        MXC_SPI_CS(2),
 511};
 512
 513static const struct spi_imx_master spi0_pdata __initconst = {
 514        .chipselect     = spi0_internal_chipselect,
 515        .num_chipselect = ARRAY_SIZE(spi0_internal_chipselect),
 516};
 517
 518static int spi1_internal_chipselect[] = {
 519        MXC_SPI_CS(0),
 520        MXC_SPI_CS(2),
 521};
 522
 523static const struct spi_imx_master spi1_pdata __initconst = {
 524        .chipselect     = spi1_internal_chipselect,
 525        .num_chipselect = ARRAY_SIZE(spi1_internal_chipselect),
 526};
 527
 528static struct spi_board_info mx31_3ds_spi_devs[] __initdata = {
 529        {
 530                .modalias       = "mc13783",
 531                .max_speed_hz   = 1000000,
 532                .bus_num        = 1,
 533                .chip_select    = 1, /* SS2 */
 534                .platform_data  = &mc13783_pdata,
 535                /* irq number is run-time assigned */
 536                .mode = SPI_CS_HIGH,
 537        }, {
 538                .modalias       = "l4f00242t03",
 539                .max_speed_hz   = 5000000,
 540                .bus_num        = 0,
 541                .chip_select    = 0, /* SS2 */
 542                .platform_data  = &mx31_3ds_l4f00242t03_pdata,
 543        },
 544};
 545
 546/*
 547 * NAND Flash
 548 */
 549static const struct mxc_nand_platform_data
 550mx31_3ds_nand_board_info __initconst = {
 551        .width          = 1,
 552        .hw_ecc         = 1,
 553#ifdef CONFIG_MACH_MX31_3DS_MXC_NAND_USE_BBT
 554        .flash_bbt      = 1,
 555#endif
 556};
 557
 558/*
 559 * USB OTG
 560 */
 561
 562#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
 563                     PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
 564
 565#define USBOTG_RST_B IOMUX_TO_GPIO(MX31_PIN_USB_PWR)
 566#define USBH2_RST_B IOMUX_TO_GPIO(MX31_PIN_USB_BYP)
 567
 568static int mx31_3ds_usbotg_init(void)
 569{
 570        int err;
 571
 572        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
 573        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
 574        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
 575        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
 576        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
 577        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
 578        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
 579        mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
 580        mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
 581        mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
 582        mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
 583        mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
 584
 585        err = gpio_request(USBOTG_RST_B, "otgusb-reset");
 586        if (err) {
 587                pr_err("Failed to request the USB OTG reset gpio\n");
 588                return err;
 589        }
 590
 591        err = gpio_direction_output(USBOTG_RST_B, 0);
 592        if (err) {
 593                pr_err("Failed to drive the USB OTG reset gpio\n");
 594                goto usbotg_free_reset;
 595        }
 596
 597        mdelay(1);
 598        gpio_set_value(USBOTG_RST_B, 1);
 599        return 0;
 600
 601usbotg_free_reset:
 602        gpio_free(USBOTG_RST_B);
 603        return err;
 604}
 605
 606static int mx31_3ds_otg_init(struct platform_device *pdev)
 607{
 608        return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
 609}
 610
 611static int mx31_3ds_host2_init(struct platform_device *pdev)
 612{
 613        int err;
 614
 615        mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
 616        mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
 617        mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
 618        mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
 619        mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
 620        mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
 621        mxc_iomux_set_pad(MX31_PIN_PC_VS2, USB_PAD_CFG);
 622        mxc_iomux_set_pad(MX31_PIN_PC_BVD1, USB_PAD_CFG);
 623        mxc_iomux_set_pad(MX31_PIN_PC_BVD2, USB_PAD_CFG);
 624        mxc_iomux_set_pad(MX31_PIN_PC_RST, USB_PAD_CFG);
 625        mxc_iomux_set_pad(MX31_PIN_IOIS16, USB_PAD_CFG);
 626        mxc_iomux_set_pad(MX31_PIN_PC_RW_B, USB_PAD_CFG);
 627
 628        err = gpio_request(USBH2_RST_B, "usbh2-reset");
 629        if (err) {
 630                pr_err("Failed to request the USB Host 2 reset gpio\n");
 631                return err;
 632        }
 633
 634        err = gpio_direction_output(USBH2_RST_B, 0);
 635        if (err) {
 636                pr_err("Failed to drive the USB Host 2 reset gpio\n");
 637                goto usbotg_free_reset;
 638        }
 639
 640        mdelay(1);
 641        gpio_set_value(USBH2_RST_B, 1);
 642
 643        mdelay(10);
 644
 645        return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
 646
 647usbotg_free_reset:
 648        gpio_free(USBH2_RST_B);
 649        return err;
 650}
 651
 652static struct mxc_usbh_platform_data otg_pdata __initdata = {
 653        .init   = mx31_3ds_otg_init,
 654        .portsc = MXC_EHCI_MODE_ULPI,
 655};
 656
 657static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
 658        .init = mx31_3ds_host2_init,
 659        .portsc = MXC_EHCI_MODE_ULPI,
 660};
 661
 662static const struct fsl_usb2_platform_data usbotg_pdata __initconst = {
 663        .operating_mode = FSL_USB2_DR_DEVICE,
 664        .phy_mode       = FSL_USB2_PHY_ULPI,
 665};
 666
 667static bool otg_mode_host __initdata;
 668
 669static int __init mx31_3ds_otg_mode(char *options)
 670{
 671        if (!strcmp(options, "host"))
 672                otg_mode_host = true;
 673        else if (!strcmp(options, "device"))
 674                otg_mode_host = false;
 675        else
 676                pr_info("otg_mode neither \"host\" nor \"device\". "
 677                        "Defaulting to device\n");
 678        return 1;
 679}
 680__setup("otg_mode=", mx31_3ds_otg_mode);
 681
 682static const struct imxuart_platform_data uart_pdata __initconst = {
 683        .flags = IMXUART_HAVE_RTSCTS,
 684};
 685
 686static const struct imxi2c_platform_data mx31_3ds_i2c0_data __initconst = {
 687        .bitrate = 100000,
 688};
 689
 690static struct platform_device *devices[] __initdata = {
 691        &mx31_3ds_ov2640,
 692};
 693
 694static void __init mx31_3ds_init(void)
 695{
 696        int ret;
 697
 698        imx31_soc_init();
 699
 700        /* Configure SPI1 IOMUX */
 701        mxc_iomux_set_gpr(MUX_PGP_CSPI_BB, true);
 702
 703        mxc_iomux_setup_multiple_pins(mx31_3ds_pins, ARRAY_SIZE(mx31_3ds_pins),
 704                                      "mx31_3ds");
 705
 706        imx31_add_imx_uart0(&uart_pdata);
 707        imx31_add_mxc_nand(&mx31_3ds_nand_board_info);
 708
 709        imx31_add_spi_imx1(&spi1_pdata);
 710        mx31_3ds_spi_devs[0].irq = gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
 711        spi_register_board_info(mx31_3ds_spi_devs,
 712                                                ARRAY_SIZE(mx31_3ds_spi_devs));
 713
 714        platform_add_devices(devices, ARRAY_SIZE(devices));
 715
 716        imx31_add_imx_keypad(&mx31_3ds_keymap_data);
 717
 718        mx31_3ds_usbotg_init();
 719        if (otg_mode_host) {
 720                otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
 721                                ULPI_OTG_DRVVBUS_EXT);
 722                if (otg_pdata.otg)
 723                        imx31_add_mxc_ehci_otg(&otg_pdata);
 724        }
 725        usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
 726                        ULPI_OTG_DRVVBUS_EXT);
 727        if (usbh2_pdata.otg)
 728                imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
 729
 730        if (!otg_mode_host)
 731                imx31_add_fsl_usb2_udc(&usbotg_pdata);
 732
 733        if (mxc_expio_init(MX31_CS5_BASE_ADDR, IOMUX_TO_GPIO(MX31_PIN_GPIO1_1)))
 734                printk(KERN_WARNING "Init of the debug board failed, all "
 735                                    "devices on the debug board are unusable.\n");
 736        imx31_add_imx2_wdt();
 737        imx31_add_imx_i2c0(&mx31_3ds_i2c0_data);
 738        imx31_add_mxc_mmc(0, &sdhc1_pdata);
 739
 740        imx31_add_spi_imx0(&spi0_pdata);
 741        imx31_add_ipu_core();
 742        imx31_add_mx3_sdc_fb(&mx3fb_pdata);
 743
 744        /* CSI */
 745        /* Camera power: default - off */
 746        ret = gpio_request_array(mx31_3ds_camera_gpios,
 747                                 ARRAY_SIZE(mx31_3ds_camera_gpios));
 748        if (ret) {
 749                pr_err("Failed to request camera gpios");
 750                iclink_ov2640.power = NULL;
 751        }
 752
 753        mx31_3ds_init_camera();
 754
 755        imx31_add_imx_ssi(0, &mx31_3ds_ssi_pdata);
 756
 757        imx_add_platform_device("imx_mc13783", 0, NULL, 0, NULL, 0);
 758}
 759
 760static void __init mx31_3ds_timer_init(void)
 761{
 762        mx31_clocks_init(26000000);
 763}
 764
 765static void __init mx31_3ds_reserve(void)
 766{
 767        /* reserve MX31_3DS_CAMERA_BUF_SIZE bytes for mx3-camera */
 768        mx3_camera_base = arm_memblock_steal(MX31_3DS_CAMERA_BUF_SIZE,
 769                                         MX31_3DS_CAMERA_BUF_SIZE);
 770}
 771
 772MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
 773        /* Maintainer: Freescale Semiconductor, Inc. */
 774        .atag_offset = 0x100,
 775        .map_io = mx31_map_io,
 776        .init_early = imx31_init_early,
 777        .init_irq = mx31_init_irq,
 778        .handle_irq = imx31_handle_irq,
 779        .init_time      = mx31_3ds_timer_init,
 780        .init_machine = mx31_3ds_init,
 781        .reserve = mx31_3ds_reserve,
 782        .restart        = mxc_restart,
 783MACHINE_END
 784