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11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/serial_8250.h>
15#include <linux/ata_platform.h>
16#include <linux/mtd/nand.h>
17#include <linux/dma-mapping.h>
18#include <linux/clk-provider.h>
19#include <linux/spinlock.h>
20#include <linux/mv643xx_i2c.h>
21#include <linux/timex.h>
22#include <linux/kexec.h>
23#include <linux/reboot.h>
24#include <net/dsa.h>
25#include <asm/page.h>
26#include <asm/mach/map.h>
27#include <asm/mach/time.h>
28#include <mach/kirkwood.h>
29#include <mach/bridge-regs.h>
30#include <linux/platform_data/asoc-kirkwood.h>
31#include <plat/cache-feroceon-l2.h>
32#include <linux/platform_data/mmc-mvsdio.h>
33#include <linux/platform_data/mtd-orion_nand.h>
34#include <linux/platform_data/usb-ehci-orion.h>
35#include <plat/common.h>
36#include <plat/time.h>
37#include <linux/platform_data/dma-mv_xor.h>
38#include "common.h"
39
40
41#define KIRKWOOD_MBUS_NAND_TARGET 0x01
42#define KIRKWOOD_MBUS_NAND_ATTR 0x2f
43#define KIRKWOOD_MBUS_SRAM_TARGET 0x03
44#define KIRKWOOD_MBUS_SRAM_ATTR 0x01
45
46
47
48
49static struct map_desc kirkwood_io_desc[] __initdata = {
50 {
51 .virtual = (unsigned long) KIRKWOOD_REGS_VIRT_BASE,
52 .pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
53 .length = KIRKWOOD_REGS_SIZE,
54 .type = MT_DEVICE,
55 },
56};
57
58void __init kirkwood_map_io(void)
59{
60 iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
61}
62
63
64
65
66
67static void enable_sata0(void)
68{
69
70 writel(readl(SATA0_PHY_MODE_2) | 0xf, SATA0_PHY_MODE_2);
71
72 writel(readl(SATA0_IF_CTRL) & ~0x200, SATA0_IF_CTRL);
73}
74
75static void disable_sata0(void)
76{
77
78 writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2);
79
80 writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);
81}
82
83static void enable_sata1(void)
84{
85
86 writel(readl(SATA1_PHY_MODE_2) | 0xf, SATA1_PHY_MODE_2);
87
88 writel(readl(SATA1_IF_CTRL) & ~0x200, SATA1_IF_CTRL);
89}
90
91static void disable_sata1(void)
92{
93
94 writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2);
95
96 writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL);
97}
98
99static void disable_pcie0(void)
100{
101 writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL);
102 while (1)
103 if (readl(PCIE_STATUS) & 0x1)
104 break;
105 writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL);
106}
107
108static void disable_pcie1(void)
109{
110 u32 dev, rev;
111
112 kirkwood_pcie_id(&dev, &rev);
113
114 if (dev == MV88F6282_DEV_ID) {
115 writel(readl(PCIE1_LINK_CTRL) | 0x10, PCIE1_LINK_CTRL);
116 while (1)
117 if (readl(PCIE1_STATUS) & 0x1)
118 break;
119 writel(readl(PCIE1_LINK_CTRL) & ~0x10, PCIE1_LINK_CTRL);
120 }
121}
122
123
124
125
126struct clk_gate_fn {
127 struct clk_gate gate;
128 void (*fn_en)(void);
129 void (*fn_dis)(void);
130};
131
132#define to_clk_gate_fn(_gate) container_of(_gate, struct clk_gate_fn, gate)
133#define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)
134
135static int clk_gate_fn_enable(struct clk_hw *hw)
136{
137 struct clk_gate *gate = to_clk_gate(hw);
138 struct clk_gate_fn *gate_fn = to_clk_gate_fn(gate);
139 int ret;
140
141 ret = clk_gate_ops.enable(hw);
142 if (!ret && gate_fn->fn_en)
143 gate_fn->fn_en();
144
145 return ret;
146}
147
148static void clk_gate_fn_disable(struct clk_hw *hw)
149{
150 struct clk_gate *gate = to_clk_gate(hw);
151 struct clk_gate_fn *gate_fn = to_clk_gate_fn(gate);
152
153 if (gate_fn->fn_dis)
154 gate_fn->fn_dis();
155
156 clk_gate_ops.disable(hw);
157}
158
159static struct clk_ops clk_gate_fn_ops;
160
161static struct clk __init *clk_register_gate_fn(struct device *dev,
162 const char *name,
163 const char *parent_name, unsigned long flags,
164 void __iomem *reg, u8 bit_idx,
165 u8 clk_gate_flags, spinlock_t *lock,
166 void (*fn_en)(void), void (*fn_dis)(void))
167{
168 struct clk_gate_fn *gate_fn;
169 struct clk *clk;
170 struct clk_init_data init;
171
172 gate_fn = kzalloc(sizeof(struct clk_gate_fn), GFP_KERNEL);
173 if (!gate_fn) {
174 pr_err("%s: could not allocate gated clk\n", __func__);
175 return ERR_PTR(-ENOMEM);
176 }
177
178 init.name = name;
179 init.ops = &clk_gate_fn_ops;
180 init.flags = flags;
181 init.parent_names = (parent_name ? &parent_name : NULL);
182 init.num_parents = (parent_name ? 1 : 0);
183
184
185 gate_fn->gate.reg = reg;
186 gate_fn->gate.bit_idx = bit_idx;
187 gate_fn->gate.flags = clk_gate_flags;
188 gate_fn->gate.lock = lock;
189 gate_fn->gate.hw.init = &init;
190 gate_fn->fn_en = fn_en;
191 gate_fn->fn_dis = fn_dis;
192
193
194 if (clk_gate_fn_ops.enable != clk_gate_fn_enable ||
195 clk_gate_fn_ops.disable != clk_gate_fn_disable) {
196 clk_gate_fn_ops = clk_gate_ops;
197 clk_gate_fn_ops.enable = clk_gate_fn_enable;
198 clk_gate_fn_ops.disable = clk_gate_fn_disable;
199 }
200
201 clk = clk_register(dev, &gate_fn->gate.hw);
202
203 if (IS_ERR(clk))
204 kfree(gate_fn);
205
206 return clk;
207}
208
209static DEFINE_SPINLOCK(gating_lock);
210static struct clk *tclk;
211
212static struct clk __init *kirkwood_register_gate(const char *name, u8 bit_idx)
213{
214 return clk_register_gate(NULL, name, "tclk", 0, CLOCK_GATING_CTRL,
215 bit_idx, 0, &gating_lock);
216}
217
218static struct clk __init *kirkwood_register_gate_fn(const char *name,
219 u8 bit_idx,
220 void (*fn_en)(void),
221 void (*fn_dis)(void))
222{
223 return clk_register_gate_fn(NULL, name, "tclk", 0, CLOCK_GATING_CTRL,
224 bit_idx, 0, &gating_lock, fn_en, fn_dis);
225}
226
227static struct clk *ge0, *ge1;
228
229void __init kirkwood_clk_init(void)
230{
231 struct clk *runit, *sata0, *sata1, *usb0, *sdio;
232 struct clk *crypto, *xor0, *xor1, *pex0, *pex1, *audio;
233
234 tclk = clk_register_fixed_rate(NULL, "tclk", NULL,
235 CLK_IS_ROOT, kirkwood_tclk);
236
237 runit = kirkwood_register_gate("runit", CGC_BIT_RUNIT);
238 ge0 = kirkwood_register_gate("ge0", CGC_BIT_GE0);
239 ge1 = kirkwood_register_gate("ge1", CGC_BIT_GE1);
240 sata0 = kirkwood_register_gate_fn("sata0", CGC_BIT_SATA0,
241 enable_sata0, disable_sata0);
242 sata1 = kirkwood_register_gate_fn("sata1", CGC_BIT_SATA1,
243 enable_sata1, disable_sata1);
244 usb0 = kirkwood_register_gate("usb0", CGC_BIT_USB0);
245 sdio = kirkwood_register_gate("sdio", CGC_BIT_SDIO);
246 crypto = kirkwood_register_gate("crypto", CGC_BIT_CRYPTO);
247 xor0 = kirkwood_register_gate("xor0", CGC_BIT_XOR0);
248 xor1 = kirkwood_register_gate("xor1", CGC_BIT_XOR1);
249 pex0 = kirkwood_register_gate_fn("pex0", CGC_BIT_PEX0,
250 NULL, disable_pcie0);
251 pex1 = kirkwood_register_gate_fn("pex1", CGC_BIT_PEX1,
252 NULL, disable_pcie1);
253 audio = kirkwood_register_gate("audio", CGC_BIT_AUDIO);
254 kirkwood_register_gate("tdm", CGC_BIT_TDM);
255 kirkwood_register_gate("tsu", CGC_BIT_TSU);
256
257
258 orion_clkdev_add(NULL, "orion_spi.0", runit);
259 orion_clkdev_add(NULL, "orion_spi.1", runit);
260 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", ge0);
261 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", ge1);
262 orion_clkdev_add(NULL, "orion_wdt", tclk);
263 orion_clkdev_add("0", "sata_mv.0", sata0);
264 orion_clkdev_add("1", "sata_mv.0", sata1);
265 orion_clkdev_add(NULL, "orion-ehci.0", usb0);
266 orion_clkdev_add(NULL, "orion_nand", runit);
267 orion_clkdev_add(NULL, "mvsdio", sdio);
268 orion_clkdev_add(NULL, "mv_crypto", crypto);
269 orion_clkdev_add(NULL, MV_XOR_NAME ".0", xor0);
270 orion_clkdev_add(NULL, MV_XOR_NAME ".1", xor1);
271 orion_clkdev_add("0", "pcie", pex0);
272 orion_clkdev_add("1", "pcie", pex1);
273 orion_clkdev_add(NULL, "mvebu-audio", audio);
274 orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".0", runit);
275 orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".1", runit);
276
277
278
279
280 clk_prepare_enable(runit);
281}
282
283
284
285
286void __init kirkwood_ehci_init(void)
287{
288 orion_ehci_init(USB_PHYS_BASE, IRQ_KIRKWOOD_USB, EHCI_PHY_NA);
289}
290
291
292
293
294
295void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
296{
297 orion_ge00_init(eth_data,
298 GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,
299 IRQ_KIRKWOOD_GE00_ERR, 1600);
300
301
302 clk_prepare_enable(ge0);
303}
304
305
306
307
308
309void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
310{
311 orion_ge01_init(eth_data,
312 GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,
313 IRQ_KIRKWOOD_GE01_ERR, 1600);
314 clk_prepare_enable(ge1);
315}
316
317
318
319
320
321void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq)
322{
323 orion_ge00_switch_init(d, irq);
324}
325
326
327
328
329
330static struct resource kirkwood_nand_resource = {
331 .flags = IORESOURCE_MEM,
332 .start = KIRKWOOD_NAND_MEM_PHYS_BASE,
333 .end = KIRKWOOD_NAND_MEM_PHYS_BASE +
334 KIRKWOOD_NAND_MEM_SIZE - 1,
335};
336
337static struct orion_nand_data kirkwood_nand_data = {
338 .cle = 0,
339 .ale = 1,
340 .width = 8,
341};
342
343static struct platform_device kirkwood_nand_flash = {
344 .name = "orion_nand",
345 .id = -1,
346 .dev = {
347 .platform_data = &kirkwood_nand_data,
348 },
349 .resource = &kirkwood_nand_resource,
350 .num_resources = 1,
351};
352
353void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts,
354 int chip_delay)
355{
356 kirkwood_nand_data.parts = parts;
357 kirkwood_nand_data.nr_parts = nr_parts;
358 kirkwood_nand_data.chip_delay = chip_delay;
359 platform_device_register(&kirkwood_nand_flash);
360}
361
362void __init kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts,
363 int (*dev_ready)(struct mtd_info *))
364{
365 kirkwood_nand_data.parts = parts;
366 kirkwood_nand_data.nr_parts = nr_parts;
367 kirkwood_nand_data.dev_ready = dev_ready;
368 platform_device_register(&kirkwood_nand_flash);
369}
370
371
372
373
374static void __init kirkwood_rtc_init(void)
375{
376 orion_rtc_init(RTC_PHYS_BASE, IRQ_KIRKWOOD_RTC);
377}
378
379
380
381
382
383void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
384{
385 orion_sata_init(sata_data, SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA);
386}
387
388
389
390
391
392static struct resource mvsdio_resources[] = {
393 [0] = {
394 .start = SDIO_PHYS_BASE,
395 .end = SDIO_PHYS_BASE + SZ_1K - 1,
396 .flags = IORESOURCE_MEM,
397 },
398 [1] = {
399 .start = IRQ_KIRKWOOD_SDIO,
400 .end = IRQ_KIRKWOOD_SDIO,
401 .flags = IORESOURCE_IRQ,
402 },
403};
404
405static u64 mvsdio_dmamask = DMA_BIT_MASK(32);
406
407static struct platform_device kirkwood_sdio = {
408 .name = "mvsdio",
409 .id = -1,
410 .dev = {
411 .dma_mask = &mvsdio_dmamask,
412 .coherent_dma_mask = DMA_BIT_MASK(32),
413 },
414 .num_resources = ARRAY_SIZE(mvsdio_resources),
415 .resource = mvsdio_resources,
416};
417
418void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
419{
420 u32 dev, rev;
421
422 kirkwood_pcie_id(&dev, &rev);
423 if (rev == 0 && dev != MV88F6282_DEV_ID)
424 mvsdio_data->clock = 100000000;
425 else
426 mvsdio_data->clock = 200000000;
427 kirkwood_sdio.dev.platform_data = mvsdio_data;
428 platform_device_register(&kirkwood_sdio);
429}
430
431
432
433
434
435void __init kirkwood_spi_init(void)
436{
437 orion_spi_init(SPI_PHYS_BASE);
438}
439
440
441
442
443
444void __init kirkwood_i2c_init(void)
445{
446 orion_i2c_init(I2C_PHYS_BASE, IRQ_KIRKWOOD_TWSI, 8);
447}
448
449
450
451
452
453
454void __init kirkwood_uart0_init(void)
455{
456 orion_uart0_init(UART0_VIRT_BASE, UART0_PHYS_BASE,
457 IRQ_KIRKWOOD_UART_0, tclk);
458}
459
460
461
462
463
464void __init kirkwood_uart1_init(void)
465{
466 orion_uart1_init(UART1_VIRT_BASE, UART1_PHYS_BASE,
467 IRQ_KIRKWOOD_UART_1, tclk);
468}
469
470
471
472
473void __init kirkwood_crypto_init(void)
474{
475 orion_crypto_init(CRYPTO_PHYS_BASE, KIRKWOOD_SRAM_PHYS_BASE,
476 KIRKWOOD_SRAM_SIZE, IRQ_KIRKWOOD_CRYPTO);
477}
478
479
480
481
482
483void __init kirkwood_xor0_init(void)
484{
485 orion_xor0_init(XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE,
486 IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01);
487}
488
489
490
491
492
493void __init kirkwood_xor1_init(void)
494{
495 orion_xor1_init(XOR1_PHYS_BASE, XOR1_HIGH_PHYS_BASE,
496 IRQ_KIRKWOOD_XOR_10, IRQ_KIRKWOOD_XOR_11);
497}
498
499
500
501
502
503void __init kirkwood_wdt_init(void)
504{
505 orion_wdt_init();
506}
507
508
509
510
511static struct resource kirkwood_cpuidle_resource[] = {
512 {
513 .flags = IORESOURCE_MEM,
514 .start = DDR_OPERATION_BASE,
515 .end = DDR_OPERATION_BASE + 3,
516 },
517};
518
519static struct platform_device kirkwood_cpuidle = {
520 .name = "kirkwood_cpuidle",
521 .id = -1,
522 .resource = kirkwood_cpuidle_resource,
523 .num_resources = 1,
524};
525
526void __init kirkwood_cpuidle_init(void)
527{
528 platform_device_register(&kirkwood_cpuidle);
529}
530
531
532
533
534void __init kirkwood_init_early(void)
535{
536 orion_time_set_base(TIMER_VIRT_BASE);
537}
538
539int kirkwood_tclk;
540
541static int __init kirkwood_find_tclk(void)
542{
543 u32 dev, rev;
544
545 kirkwood_pcie_id(&dev, &rev);
546
547 if (dev == MV88F6281_DEV_ID || dev == MV88F6282_DEV_ID)
548 if (((readl(SAMPLE_AT_RESET) >> 21) & 1) == 0)
549 return 200000000;
550
551 return 166666667;
552}
553
554void __init kirkwood_timer_init(void)
555{
556 kirkwood_tclk = kirkwood_find_tclk();
557
558 orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
559 IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
560}
561
562
563
564
565static struct resource kirkwood_audio_resources[] = {
566 [0] = {
567 .start = AUDIO_PHYS_BASE,
568 .end = AUDIO_PHYS_BASE + SZ_16K - 1,
569 .flags = IORESOURCE_MEM,
570 },
571 [1] = {
572 .start = IRQ_KIRKWOOD_I2S,
573 .end = IRQ_KIRKWOOD_I2S,
574 .flags = IORESOURCE_IRQ,
575 },
576};
577
578static struct kirkwood_asoc_platform_data kirkwood_audio_data = {
579 .burst = 128,
580};
581
582static struct platform_device kirkwood_audio_device = {
583 .name = "mvebu-audio",
584 .id = -1,
585 .num_resources = ARRAY_SIZE(kirkwood_audio_resources),
586 .resource = kirkwood_audio_resources,
587 .dev = {
588 .platform_data = &kirkwood_audio_data,
589 },
590};
591
592void __init kirkwood_audio_init(void)
593{
594 platform_device_register(&kirkwood_audio_device);
595}
596
597
598
599
600static struct resource kirkwood_cpufreq_resources[] = {
601 [0] = {
602 .start = CPU_CONTROL_PHYS,
603 .end = CPU_CONTROL_PHYS + 3,
604 .flags = IORESOURCE_MEM,
605 },
606};
607
608static struct platform_device kirkwood_cpufreq_device = {
609 .name = "kirkwood-cpufreq",
610 .id = -1,
611 .num_resources = ARRAY_SIZE(kirkwood_cpufreq_resources),
612 .resource = kirkwood_cpufreq_resources,
613};
614
615void __init kirkwood_cpufreq_init(void)
616{
617 platform_device_register(&kirkwood_cpufreq_device);
618}
619
620
621
622
623
624
625
626char * __init kirkwood_id(void)
627{
628 u32 dev, rev;
629
630 kirkwood_pcie_id(&dev, &rev);
631
632 if (dev == MV88F6281_DEV_ID) {
633 if (rev == MV88F6281_REV_Z0)
634 return "MV88F6281-Z0";
635 else if (rev == MV88F6281_REV_A0)
636 return "MV88F6281-A0";
637 else if (rev == MV88F6281_REV_A1)
638 return "MV88F6281-A1";
639 else
640 return "MV88F6281-Rev-Unsupported";
641 } else if (dev == MV88F6192_DEV_ID) {
642 if (rev == MV88F6192_REV_Z0)
643 return "MV88F6192-Z0";
644 else if (rev == MV88F6192_REV_A0)
645 return "MV88F6192-A0";
646 else if (rev == MV88F6192_REV_A1)
647 return "MV88F6192-A1";
648 else
649 return "MV88F6192-Rev-Unsupported";
650 } else if (dev == MV88F6180_DEV_ID) {
651 if (rev == MV88F6180_REV_A0)
652 return "MV88F6180-Rev-A0";
653 else if (rev == MV88F6180_REV_A1)
654 return "MV88F6180-Rev-A1";
655 else
656 return "MV88F6180-Rev-Unsupported";
657 } else if (dev == MV88F6282_DEV_ID) {
658 if (rev == MV88F6282_REV_A0)
659 return "MV88F6282-Rev-A0";
660 else if (rev == MV88F6282_REV_A1)
661 return "MV88F6282-Rev-A1";
662 else
663 return "MV88F6282-Rev-Unsupported";
664 } else {
665 return "Device-Unknown";
666 }
667}
668
669void __init kirkwood_setup_wins(void)
670{
671 mvebu_mbus_add_window_by_id(KIRKWOOD_MBUS_NAND_TARGET,
672 KIRKWOOD_MBUS_NAND_ATTR,
673 KIRKWOOD_NAND_MEM_PHYS_BASE,
674 KIRKWOOD_NAND_MEM_SIZE);
675 mvebu_mbus_add_window_by_id(KIRKWOOD_MBUS_SRAM_TARGET,
676 KIRKWOOD_MBUS_SRAM_ATTR,
677 KIRKWOOD_SRAM_PHYS_BASE,
678 KIRKWOOD_SRAM_SIZE);
679}
680
681void __init kirkwood_l2_init(void)
682{
683#ifdef CONFIG_CACHE_FEROCEON_L2
684#ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
685 writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
686 feroceon_l2_init(1);
687#else
688 writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
689 feroceon_l2_init(0);
690#endif
691#endif
692}
693
694void __init kirkwood_init(void)
695{
696 pr_info("Kirkwood: %s, TCLK=%d.\n", kirkwood_id(), kirkwood_tclk);
697
698
699
700
701
702
703
704 writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG);
705
706 BUG_ON(mvebu_mbus_init("marvell,kirkwood-mbus",
707 BRIDGE_WINS_BASE, BRIDGE_WINS_SZ,
708 DDR_WINDOW_CPU_BASE, DDR_WINDOW_CPU_SZ));
709
710 kirkwood_setup_wins();
711
712 kirkwood_l2_init();
713
714
715 kirkwood_clk_init();
716
717
718 kirkwood_rtc_init();
719 kirkwood_wdt_init();
720 kirkwood_xor0_init();
721 kirkwood_xor1_init();
722 kirkwood_crypto_init();
723
724 kirkwood_pm_init();
725 kirkwood_cpuidle_init();
726#ifdef CONFIG_KEXEC
727 kexec_reinit = kirkwood_enable_pcie;
728#endif
729}
730
731void kirkwood_restart(enum reboot_mode mode, const char *cmd)
732{
733
734
735
736 writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
737
738
739
740
741 writel(SOFT_RESET, SYSTEM_SOFT_RESET);
742
743 while (1)
744 ;
745}
746
