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11#ifndef __ARCH_ARM_MACH_OMAP2_PM_H
12#define __ARCH_ARM_MACH_OMAP2_PM_H
13
14#include <linux/err.h>
15
16#include "powerdomain.h"
17
18#ifdef CONFIG_CPU_IDLE
19extern int __init omap3_idle_init(void);
20extern int __init omap4_idle_init(void);
21#else
22static inline int omap3_idle_init(void)
23{
24 return 0;
25}
26
27static inline int omap4_idle_init(void)
28{
29 return 0;
30}
31#endif
32
33extern void *omap3_secure_ram_storage;
34extern void omap3_pm_off_mode_enable(int);
35extern void omap_sram_idle(void);
36extern int omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused);
37extern int (*omap_pm_suspend)(void);
38
39#if defined(CONFIG_PM_OPP)
40extern int omap3_opp_init(void);
41extern int omap4_opp_init(void);
42#else
43static inline int omap3_opp_init(void)
44{
45 return -EINVAL;
46}
47static inline int omap4_opp_init(void)
48{
49 return -EINVAL;
50}
51#endif
52
53extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
54extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
55
56#ifdef CONFIG_PM_DEBUG
57extern u32 enable_off_mode;
58#else
59#define enable_off_mode 0
60#endif
61
62#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
63extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
64#else
65#define pm_dbg_update_time(pwrdm, prev) do {} while (0);
66#endif
67
68
69extern void omap24xx_idle_loop_suspend(void);
70extern unsigned int omap24xx_idle_loop_suspend_sz;
71
72extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl,
73 void __iomem *sdrc_power);
74extern unsigned int omap24xx_cpu_suspend_sz;
75
76
77extern void omap34xx_cpu_suspend(int save_state);
78
79
80extern void omap3_do_wfi(void);
81extern unsigned int omap3_do_wfi_sz;
82
83extern void (*omap3_do_wfi_sram)(void);
84
85
86extern int save_secure_ram_context(u32 *addr);
87extern unsigned int save_secure_ram_context_sz;
88
89extern void omap3_save_scratchpad_contents(void);
90
91#define PM_RTA_ERRATUM_i608 (1 << 0)
92#define PM_SDRC_WAKEUP_ERRATUM_i583 (1 << 1)
93#define PM_PER_MEMORIES_ERRATUM_i582 (1 << 2)
94
95#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
96extern u16 pm34xx_errata;
97#define IS_PM34XX_ERRATUM(id) (pm34xx_errata & (id))
98extern void enable_omap3630_toggle_l2_on_restore(void);
99#else
100#define IS_PM34XX_ERRATUM(id) 0
101static inline void enable_omap3630_toggle_l2_on_restore(void) { }
102#endif
103
104#define PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD (1 << 0)
105
106#if defined(CONFIG_ARCH_OMAP4)
107extern u16 pm44xx_errata;
108#define IS_PM44XX_ERRATUM(id) (pm44xx_errata & (id))
109#else
110#define IS_PM44XX_ERRATUM(id) 0
111#endif
112
113#ifdef CONFIG_POWER_AVS_OMAP
114extern int omap_devinit_smartreflex(void);
115extern void omap_enable_smartreflex_on_init(void);
116#else
117static inline int omap_devinit_smartreflex(void)
118{
119 return -EINVAL;
120}
121
122static inline void omap_enable_smartreflex_on_init(void) {}
123#endif
124
125#ifdef CONFIG_TWL4030_CORE
126extern int omap3_twl_init(void);
127extern int omap4_twl_init(void);
128extern int omap3_twl_set_sr_bit(bool enable);
129#else
130static inline int omap3_twl_init(void)
131{
132 return -EINVAL;
133}
134static inline int omap4_twl_init(void)
135{
136 return -EINVAL;
137}
138#endif
139
140#ifdef CONFIG_PM
141extern void omap_pm_setup_oscillator(u32 tstart, u32 tshut);
142extern void omap_pm_get_oscillator(u32 *tstart, u32 *tshut);
143extern void omap_pm_setup_sr_i2c_pcb_length(u32 mm);
144#else
145static inline void omap_pm_setup_oscillator(u32 tstart, u32 tshut) { }
146static inline void omap_pm_get_oscillator(u32 *tstart, u32 *tshut) { *tstart = *tshut = 0; }
147static inline void omap_pm_setup_sr_i2c_pcb_length(u32 mm) { }
148#endif
149
150#endif
151