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13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/interrupt.h>
16#include <linux/list.h>
17#include <linux/timer.h>
18#include <linux/init.h>
19#include <linux/serial_core.h>
20#include <linux/platform_device.h>
21#include <linux/reboot.h>
22#include <linux/device.h>
23#include <linux/syscore_ops.h>
24#include <linux/clk.h>
25#include <linux/io.h>
26
27#include <asm/system_misc.h>
28#include <asm/mach/arch.h>
29#include <asm/mach/map.h>
30#include <asm/mach/irq.h>
31
32#include <mach/hardware.h>
33#include <asm/irq.h>
34
35#include <plat/cpu-freq.h>
36
37#include <mach/regs-clock.h>
38#include <plat/regs-serial.h>
39#include <mach/regs-gpio.h>
40
41#include <plat/clock.h>
42#include <plat/devs.h>
43#include <plat/cpu.h>
44#include <plat/pm.h>
45#include <plat/pll.h>
46#include <plat/nand-core.h>
47#include <plat/watchdog-reset.h>
48
49#include "regs-dsc.h"
50
51static struct map_desc s3c244x_iodesc[] __initdata = {
52 IODESC_ENT(CLKPWR),
53 IODESC_ENT(TIMER),
54 IODESC_ENT(WATCHDOG),
55};
56
57
58
59void __init s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no)
60{
61 s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no);
62}
63
64void __init s3c244x_map_io(void)
65{
66
67
68 iotable_init(s3c244x_iodesc, ARRAY_SIZE(s3c244x_iodesc));
69
70
71
72 s3c_device_sdi.name = "s3c2440-sdi";
73 s3c_device_i2c0.name = "s3c2440-i2c";
74 s3c_nand_setname("s3c2440-nand");
75 s3c_device_ts.name = "s3c2440-ts";
76 s3c_device_usbgadget.name = "s3c2440-usbgadget";
77}
78
79void __init_or_cpufreq s3c244x_setup_clocks(void)
80{
81 struct clk *xtal_clk;
82 unsigned long clkdiv;
83 unsigned long camdiv;
84 unsigned long xtal;
85 unsigned long hclk, fclk, pclk;
86 int hdiv = 1;
87
88 xtal_clk = clk_get(NULL, "xtal");
89 xtal = clk_get_rate(xtal_clk);
90 clk_put(xtal_clk);
91
92 fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2;
93
94 clkdiv = __raw_readl(S3C2410_CLKDIVN);
95 camdiv = __raw_readl(S3C2440_CAMDIVN);
96
97
98
99 switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) {
100 case S3C2440_CLKDIVN_HDIVN_1:
101 hdiv = 1;
102 break;
103
104 case S3C2440_CLKDIVN_HDIVN_2:
105 hdiv = 2;
106 break;
107
108 case S3C2440_CLKDIVN_HDIVN_4_8:
109 hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4;
110 break;
111
112 case S3C2440_CLKDIVN_HDIVN_3_6:
113 hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3;
114 break;
115 }
116
117 hclk = fclk / hdiv;
118 pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN) ? 2 : 1);
119
120
121
122 printk("S3C244X: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
123 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
124
125 s3c24xx_setup_clocks(fclk, hclk, pclk);
126}
127
128void __init s3c244x_init_clocks(int xtal)
129{
130
131
132
133
134 s3c24xx_register_baseclocks(xtal);
135 s3c244x_setup_clocks();
136 s3c2410_baseclk_add();
137 samsung_wdt_reset_init(S3C24XX_VA_WATCHDOG);
138}
139
140
141
142struct bus_type s3c2440_subsys = {
143 .name = "s3c2440-core",
144 .dev_name = "s3c2440-core",
145};
146
147struct bus_type s3c2442_subsys = {
148 .name = "s3c2442-core",
149 .dev_name = "s3c2442-core",
150};
151
152
153
154
155
156
157
158static int __init s3c2440_core_init(void)
159{
160 return subsys_system_register(&s3c2440_subsys, NULL);
161}
162
163core_initcall(s3c2440_core_init);
164
165static int __init s3c2442_core_init(void)
166{
167 return subsys_system_register(&s3c2442_subsys, NULL);
168}
169
170core_initcall(s3c2442_core_init);
171
172
173#ifdef CONFIG_PM
174static struct sleep_save s3c244x_sleep[] = {
175 SAVE_ITEM(S3C2440_DSC0),
176 SAVE_ITEM(S3C2440_DSC1),
177 SAVE_ITEM(S3C2440_GPJDAT),
178 SAVE_ITEM(S3C2440_GPJCON),
179 SAVE_ITEM(S3C2440_GPJUP)
180};
181
182static int s3c244x_suspend(void)
183{
184 s3c_pm_do_save(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep));
185 return 0;
186}
187
188static void s3c244x_resume(void)
189{
190 s3c_pm_do_restore(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep));
191}
192#else
193#define s3c244x_suspend NULL
194#define s3c244x_resume NULL
195#endif
196
197struct syscore_ops s3c244x_pm_syscore_ops = {
198 .suspend = s3c244x_suspend,
199 .resume = s3c244x_resume,
200};
201
202void s3c244x_restart(enum reboot_mode mode, const char *cmd)
203{
204 if (mode == REBOOT_SOFT)
205 soft_restart(0);
206
207 samsung_wdt_reset();
208
209
210 soft_restart(0);
211}
212