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9#include <linux/device.h>
10#include <linux/export.h>
11#include <linux/platform_device.h>
12#include <linux/mtd/mtd.h>
13#include <linux/mtd/partitions.h>
14#include <linux/mtd/physmap.h>
15#include <linux/spi/spi.h>
16#include <linux/spi/flash.h>
17#include <linux/i2c.h>
18#include <linux/irq.h>
19#include <linux/interrupt.h>
20#include <linux/usb/musb.h>
21#include <linux/leds.h>
22#include <linux/input.h>
23#include <asm/dma.h>
24#include <asm/bfin5xx_spi.h>
25#include <asm/reboot.h>
26#include <asm/nand.h>
27#include <asm/portmux.h>
28#include <asm/dpmc.h>
29#include <linux/spi/ad7877.h>
30#include <asm/bfin_sport.h>
31
32
33
34
35#ifdef CONFIG_BFIN527_EZKIT_V2
36const char bfin_board_name[] = "ADI BF527-EZKIT V2";
37#else
38const char bfin_board_name[] = "ADI BF527-EZKIT";
39#endif
40
41
42
43
44
45#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
46#include <linux/usb/isp1760.h>
47static struct resource bfin_isp1760_resources[] = {
48 [0] = {
49 .start = 0x203C0000,
50 .end = 0x203C0000 + 0x000fffff,
51 .flags = IORESOURCE_MEM,
52 },
53 [1] = {
54 .start = IRQ_PF7,
55 .end = IRQ_PF7,
56 .flags = IORESOURCE_IRQ,
57 },
58};
59
60static struct isp1760_platform_data isp1760_priv = {
61 .is_isp1761 = 0,
62 .bus_width_16 = 1,
63 .port1_otg = 0,
64 .analog_oc = 0,
65 .dack_polarity_high = 0,
66 .dreq_polarity_high = 0,
67};
68
69static struct platform_device bfin_isp1760_device = {
70 .name = "isp1760",
71 .id = 0,
72 .dev = {
73 .platform_data = &isp1760_priv,
74 },
75 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
76 .resource = bfin_isp1760_resources,
77};
78#endif
79
80#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
81static struct resource musb_resources[] = {
82 [0] = {
83 .start = 0xffc03800,
84 .end = 0xffc03cff,
85 .flags = IORESOURCE_MEM,
86 },
87 [1] = {
88 .start = IRQ_USB_INT0,
89 .end = IRQ_USB_INT0,
90 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
91 .name = "mc"
92 },
93 [2] = {
94 .start = IRQ_USB_DMA,
95 .end = IRQ_USB_DMA,
96 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
97 .name = "dma"
98 },
99};
100
101static struct musb_hdrc_config musb_config = {
102 .multipoint = 0,
103 .dyn_fifo = 0,
104 .soft_con = 1,
105 .dma = 1,
106 .num_eps = 8,
107 .dma_channels = 8,
108 .gpio_vrsel = GPIO_PG13,
109
110
111
112 .gpio_vrsel_active = 1,
113 .clkin = 24,
114};
115
116static struct musb_hdrc_platform_data musb_plat = {
117#if defined(CONFIG_USB_MUSB_HDRC) && defined(CONFIG_USB_GADGET_MUSB_HDRC)
118 .mode = MUSB_OTG,
119#elif defined(CONFIG_USB_MUSB_HDRC)
120 .mode = MUSB_HOST,
121#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
122 .mode = MUSB_PERIPHERAL,
123#endif
124 .config = &musb_config,
125};
126
127static u64 musb_dmamask = ~(u32)0;
128
129static struct platform_device musb_device = {
130 .name = "musb-blackfin",
131 .id = 0,
132 .dev = {
133 .dma_mask = &musb_dmamask,
134 .coherent_dma_mask = 0xffffffff,
135 .platform_data = &musb_plat,
136 },
137 .num_resources = ARRAY_SIZE(musb_resources),
138 .resource = musb_resources,
139};
140#endif
141
142#if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
143
144static struct resource bf52x_t350mcqb_resources[] = {
145 {
146 .start = IRQ_PPI_ERROR,
147 .end = IRQ_PPI_ERROR,
148 .flags = IORESOURCE_IRQ,
149 },
150};
151
152static struct platform_device bf52x_t350mcqb_device = {
153 .name = "bfin-t350mcqb",
154 .id = -1,
155 .num_resources = ARRAY_SIZE(bf52x_t350mcqb_resources),
156 .resource = bf52x_t350mcqb_resources,
157};
158#endif
159
160#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
161#include <asm/bfin-lq035q1.h>
162
163static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
164 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
165 .ppi_mode = USE_RGB565_8_BIT_PPI,
166};
167
168static struct resource bfin_lq035q1_resources[] = {
169 {
170 .start = IRQ_PPI_ERROR,
171 .end = IRQ_PPI_ERROR,
172 .flags = IORESOURCE_IRQ,
173 },
174};
175
176static struct platform_device bfin_lq035q1_device = {
177 .name = "bfin-lq035q1",
178 .id = -1,
179 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
180 .resource = bfin_lq035q1_resources,
181 .dev = {
182 .platform_data = &bfin_lq035q1_data,
183 },
184};
185#endif
186
187#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
188static struct mtd_partition ezkit_partitions[] = {
189 {
190 .name = "bootloader(nor)",
191 .size = 0x40000,
192 .offset = 0,
193 }, {
194 .name = "linux kernel(nor)",
195 .size = 0x1C0000,
196 .offset = MTDPART_OFS_APPEND,
197 }, {
198 .name = "file system(nor)",
199 .size = MTDPART_SIZ_FULL,
200 .offset = MTDPART_OFS_APPEND,
201 }
202};
203
204static struct physmap_flash_data ezkit_flash_data = {
205 .width = 2,
206 .parts = ezkit_partitions,
207 .nr_parts = ARRAY_SIZE(ezkit_partitions),
208};
209
210static struct resource ezkit_flash_resource = {
211 .start = 0x20000000,
212 .end = 0x203fffff,
213 .flags = IORESOURCE_MEM,
214};
215
216static struct platform_device ezkit_flash_device = {
217 .name = "physmap-flash",
218 .id = 0,
219 .dev = {
220 .platform_data = &ezkit_flash_data,
221 },
222 .num_resources = 1,
223 .resource = &ezkit_flash_resource,
224};
225#endif
226
227#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
228static struct mtd_partition partition_info[] = {
229 {
230 .name = "bootloader(nand)",
231 .offset = 0,
232 .size = 0x40000,
233 }, {
234 .name = "linux kernel(nand)",
235 .offset = MTDPART_OFS_APPEND,
236 .size = 4 * 1024 * 1024,
237 },
238 {
239 .name = "file system(nand)",
240 .offset = MTDPART_OFS_APPEND,
241 .size = MTDPART_SIZ_FULL,
242 },
243};
244
245static struct bf5xx_nand_platform bf5xx_nand_platform = {
246 .data_width = NFC_NWIDTH_8,
247 .partitions = partition_info,
248 .nr_partitions = ARRAY_SIZE(partition_info),
249 .rd_dly = 3,
250 .wr_dly = 3,
251};
252
253static struct resource bf5xx_nand_resources[] = {
254 {
255 .start = NFC_CTL,
256 .end = NFC_DATA_RD + 2,
257 .flags = IORESOURCE_MEM,
258 },
259 {
260 .start = CH_NFC,
261 .end = CH_NFC,
262 .flags = IORESOURCE_IRQ,
263 },
264};
265
266static struct platform_device bf5xx_nand_device = {
267 .name = "bf5xx-nand",
268 .id = 0,
269 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
270 .resource = bf5xx_nand_resources,
271 .dev = {
272 .platform_data = &bf5xx_nand_platform,
273 },
274};
275#endif
276
277#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
278static struct resource bfin_pcmcia_cf_resources[] = {
279 {
280 .start = 0x20310000,
281 .end = 0x20312000,
282 .flags = IORESOURCE_MEM,
283 }, {
284 .start = 0x20311000,
285 .end = 0x20311FFF,
286 .flags = IORESOURCE_MEM,
287 }, {
288 .start = IRQ_PF4,
289 .end = IRQ_PF4,
290 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
291 }, {
292 .start = 6,
293 .end = 6,
294 .flags = IORESOURCE_IRQ,
295 },
296};
297
298static struct platform_device bfin_pcmcia_cf_device = {
299 .name = "bfin_cf_pcmcia",
300 .id = -1,
301 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
302 .resource = bfin_pcmcia_cf_resources,
303};
304#endif
305
306#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
307static struct platform_device rtc_device = {
308 .name = "rtc-bfin",
309 .id = -1,
310};
311#endif
312
313#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
314#include <linux/smc91x.h>
315
316static struct smc91x_platdata smc91x_info = {
317 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
318 .leda = RPC_LED_100_10,
319 .ledb = RPC_LED_TX_RX,
320};
321
322static struct resource smc91x_resources[] = {
323 {
324 .name = "smc91x-regs",
325 .start = 0x20300300,
326 .end = 0x20300300 + 16,
327 .flags = IORESOURCE_MEM,
328 }, {
329
330 .start = IRQ_PF7,
331 .end = IRQ_PF7,
332 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
333 },
334};
335static struct platform_device smc91x_device = {
336 .name = "smc91x",
337 .id = 0,
338 .num_resources = ARRAY_SIZE(smc91x_resources),
339 .resource = smc91x_resources,
340 .dev = {
341 .platform_data = &smc91x_info,
342 },
343};
344#endif
345
346#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
347static struct resource dm9000_resources[] = {
348 [0] = {
349 .start = 0x203FB800,
350 .end = 0x203FB800 + 1,
351 .flags = IORESOURCE_MEM,
352 },
353 [1] = {
354 .start = 0x203FB800 + 4,
355 .end = 0x203FB800 + 5,
356 .flags = IORESOURCE_MEM,
357 },
358 [2] = {
359 .start = IRQ_PF9,
360 .end = IRQ_PF9,
361 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
362 },
363};
364
365static struct platform_device dm9000_device = {
366 .name = "dm9000",
367 .id = -1,
368 .num_resources = ARRAY_SIZE(dm9000_resources),
369 .resource = dm9000_resources,
370};
371#endif
372
373#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
374#include <linux/bfin_mac.h>
375static const unsigned short bfin_mac_peripherals[] = P_RMII0;
376
377static struct bfin_phydev_platform_data bfin_phydev_data[] = {
378 {
379 .addr = 1,
380 .irq = IRQ_MAC_PHYINT,
381 },
382};
383
384static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
385 .phydev_number = 1,
386 .phydev_data = bfin_phydev_data,
387 .phy_mode = PHY_INTERFACE_MODE_RMII,
388 .mac_peripherals = bfin_mac_peripherals,
389};
390
391static struct platform_device bfin_mii_bus = {
392 .name = "bfin_mii_bus",
393 .dev = {
394 .platform_data = &bfin_mii_bus_data,
395 }
396};
397
398static struct platform_device bfin_mac_device = {
399 .name = "bfin_mac",
400 .dev = {
401 .platform_data = &bfin_mii_bus,
402 }
403};
404#endif
405
406#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
407static struct resource net2272_bfin_resources[] = {
408 {
409 .start = 0x20300000,
410 .end = 0x20300000 + 0x100,
411 .flags = IORESOURCE_MEM,
412 }, {
413 .start = 1,
414 .flags = IORESOURCE_BUS,
415 }, {
416 .start = IRQ_PF7,
417 .end = IRQ_PF7,
418 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
419 },
420};
421
422static struct platform_device net2272_bfin_device = {
423 .name = "net2272",
424 .id = -1,
425 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
426 .resource = net2272_bfin_resources,
427};
428#endif
429
430#if defined(CONFIG_MTD_M25P80) \
431 || defined(CONFIG_MTD_M25P80_MODULE)
432static struct mtd_partition bfin_spi_flash_partitions[] = {
433 {
434 .name = "bootloader(spi)",
435 .size = 0x00040000,
436 .offset = 0,
437 .mask_flags = MTD_CAP_ROM
438 }, {
439 .name = "linux kernel(spi)",
440 .size = MTDPART_SIZ_FULL,
441 .offset = MTDPART_OFS_APPEND,
442 }
443};
444
445static struct flash_platform_data bfin_spi_flash_data = {
446 .name = "m25p80",
447 .parts = bfin_spi_flash_partitions,
448 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
449 .type = "m25p16",
450};
451
452
453static struct bfin5xx_spi_chip spi_flash_chip_info = {
454 .enable_dma = 0,
455};
456#endif
457
458#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
459static struct bfin5xx_spi_chip mmc_spi_chip_info = {
460 .enable_dma = 0,
461};
462#endif
463
464#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
465static const struct ad7877_platform_data bfin_ad7877_ts_info = {
466 .model = 7877,
467 .vref_delay_usecs = 50,
468 .x_plate_ohms = 419,
469 .y_plate_ohms = 486,
470 .pressure_max = 1000,
471 .pressure_min = 0,
472 .stopacq_polarity = 1,
473 .first_conversion_delay = 3,
474 .acquisition_time = 1,
475 .averaging = 1,
476 .pen_down_acc_interval = 1,
477};
478#endif
479
480#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
481#include <linux/spi/ad7879.h>
482static const struct ad7879_platform_data bfin_ad7879_ts_info = {
483 .model = 7879,
484 .x_plate_ohms = 620,
485 .pressure_max = 10000,
486 .pressure_min = 0,
487 .first_conversion_delay = 3,
488 .acquisition_time = 1,
489 .median = 2,
490 .averaging = 1,
491 .pen_down_acc_interval = 255,
492 .gpio_export = 0,
493};
494#endif
495
496#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
497
498static const u16 bfin_snd_pin[][7] = {
499 {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
500 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0, 0},
501 {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
502 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_TFS, 0},
503};
504
505static struct bfin_snd_platform_data bfin_snd_data[] = {
506 {
507 .pin_req = &bfin_snd_pin[0][0],
508 },
509 {
510 .pin_req = &bfin_snd_pin[1][0],
511 },
512};
513
514#define BFIN_SND_RES(x) \
515 [x] = { \
516 { \
517 .start = SPORT##x##_TCR1, \
518 .end = SPORT##x##_TCR1, \
519 .flags = IORESOURCE_MEM \
520 }, \
521 { \
522 .start = CH_SPORT##x##_RX, \
523 .end = CH_SPORT##x##_RX, \
524 .flags = IORESOURCE_DMA, \
525 }, \
526 { \
527 .start = CH_SPORT##x##_TX, \
528 .end = CH_SPORT##x##_TX, \
529 .flags = IORESOURCE_DMA, \
530 }, \
531 { \
532 .start = IRQ_SPORT##x##_ERROR, \
533 .end = IRQ_SPORT##x##_ERROR, \
534 .flags = IORESOURCE_IRQ, \
535 } \
536 }
537
538static struct resource bfin_snd_resources[][4] = {
539 BFIN_SND_RES(0),
540 BFIN_SND_RES(1),
541};
542#endif
543
544#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
545static struct platform_device bfin_i2s_pcm = {
546 .name = "bfin-i2s-pcm-audio",
547 .id = -1,
548};
549#endif
550
551#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
552static struct platform_device bfin_ac97_pcm = {
553 .name = "bfin-ac97-pcm-audio",
554 .id = -1,
555};
556#endif
557
558#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
559static struct platform_device bfin_i2s = {
560 .name = "bfin-i2s",
561 .id = CONFIG_SND_BF5XX_SPORT_NUM,
562 .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
563 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
564 .dev = {
565 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
566 },
567};
568#endif
569
570#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
571 || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
572static const char * const ad1836_link[] = {
573 "bfin-i2s.0",
574 "spi0.4",
575};
576static struct platform_device bfin_ad1836_machine = {
577 .name = "bfin-snd-ad1836",
578 .id = -1,
579 .dev = {
580 .platform_data = (void *)ad1836_link,
581 },
582};
583#endif
584
585static struct spi_board_info bfin_spi_board_info[] __initdata = {
586#if defined(CONFIG_MTD_M25P80) \
587 || defined(CONFIG_MTD_M25P80_MODULE)
588 {
589
590 .modalias = "m25p80",
591 .max_speed_hz = 25000000,
592 .bus_num = 0,
593 .chip_select = 1,
594 .platform_data = &bfin_spi_flash_data,
595 .controller_data = &spi_flash_chip_info,
596 .mode = SPI_MODE_3,
597 },
598#endif
599
600#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
601 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
602 {
603 .modalias = "ad183x",
604 .max_speed_hz = 3125000,
605 .bus_num = 0,
606 .chip_select = 4,
607 .platform_data = "ad1836",
608 .mode = SPI_MODE_3,
609 },
610#endif
611#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
612 {
613 .modalias = "mmc_spi",
614 .max_speed_hz = 20000000,
615 .bus_num = 0,
616 .chip_select = 3,
617 .controller_data = &mmc_spi_chip_info,
618 .mode = SPI_MODE_0,
619 },
620#endif
621
622#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
623 {
624 .modalias = "ad7877",
625 .platform_data = &bfin_ad7877_ts_info,
626 .irq = IRQ_PF8,
627 .max_speed_hz = 12500000,
628 .bus_num = 0,
629 .chip_select = 2,
630 },
631#endif
632#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
633 {
634 .modalias = "ad7879",
635 .platform_data = &bfin_ad7879_ts_info,
636 .irq = IRQ_PF8,
637 .max_speed_hz = 5000000,
638 .bus_num = 0,
639 .chip_select = 3,
640 .mode = SPI_CPHA | SPI_CPOL,
641 },
642#endif
643#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
644 {
645 .modalias = "spidev",
646 .max_speed_hz = 3125000,
647 .bus_num = 0,
648 .chip_select = 1,
649 },
650#endif
651#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
652 {
653 .modalias = "bfin-lq035q1-spi",
654 .max_speed_hz = 20000000,
655 .bus_num = 0,
656 .chip_select = 7,
657 .mode = SPI_CPHA | SPI_CPOL,
658 },
659#endif
660};
661
662#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
663
664static struct bfin5xx_spi_master bfin_spi0_info = {
665 .num_chipselect = 8,
666 .enable_dma = 1,
667 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
668};
669
670
671static struct resource bfin_spi0_resource[] = {
672 [0] = {
673 .start = SPI0_REGBASE,
674 .end = SPI0_REGBASE + 0xFF,
675 .flags = IORESOURCE_MEM,
676 },
677 [1] = {
678 .start = CH_SPI,
679 .end = CH_SPI,
680 .flags = IORESOURCE_DMA,
681 },
682 [2] = {
683 .start = IRQ_SPI,
684 .end = IRQ_SPI,
685 .flags = IORESOURCE_IRQ,
686 },
687};
688
689static struct platform_device bfin_spi0_device = {
690 .name = "bfin-spi",
691 .id = 0,
692 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
693 .resource = bfin_spi0_resource,
694 .dev = {
695 .platform_data = &bfin_spi0_info,
696 },
697};
698#endif
699
700#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
701#ifdef CONFIG_SERIAL_BFIN_UART0
702static struct resource bfin_uart0_resources[] = {
703 {
704 .start = UART0_THR,
705 .end = UART0_GCTL+2,
706 .flags = IORESOURCE_MEM,
707 },
708 {
709 .start = IRQ_UART0_TX,
710 .end = IRQ_UART0_TX,
711 .flags = IORESOURCE_IRQ,
712 },
713 {
714 .start = IRQ_UART0_RX,
715 .end = IRQ_UART0_RX,
716 .flags = IORESOURCE_IRQ,
717 },
718 {
719 .start = IRQ_UART0_ERROR,
720 .end = IRQ_UART0_ERROR,
721 .flags = IORESOURCE_IRQ,
722 },
723 {
724 .start = CH_UART0_TX,
725 .end = CH_UART0_TX,
726 .flags = IORESOURCE_DMA,
727 },
728 {
729 .start = CH_UART0_RX,
730 .end = CH_UART0_RX,
731 .flags = IORESOURCE_DMA,
732 },
733};
734
735static unsigned short bfin_uart0_peripherals[] = {
736 P_UART0_TX, P_UART0_RX, 0
737};
738
739static struct platform_device bfin_uart0_device = {
740 .name = "bfin-uart",
741 .id = 0,
742 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
743 .resource = bfin_uart0_resources,
744 .dev = {
745 .platform_data = &bfin_uart0_peripherals,
746 },
747};
748#endif
749#ifdef CONFIG_SERIAL_BFIN_UART1
750static struct resource bfin_uart1_resources[] = {
751 {
752 .start = UART1_THR,
753 .end = UART1_GCTL+2,
754 .flags = IORESOURCE_MEM,
755 },
756 {
757 .start = IRQ_UART1_TX,
758 .end = IRQ_UART1_TX,
759 .flags = IORESOURCE_IRQ,
760 },
761 {
762 .start = IRQ_UART1_RX,
763 .end = IRQ_UART1_RX,
764 .flags = IORESOURCE_IRQ,
765 },
766 {
767 .start = IRQ_UART1_ERROR,
768 .end = IRQ_UART1_ERROR,
769 .flags = IORESOURCE_IRQ,
770 },
771 {
772 .start = CH_UART1_TX,
773 .end = CH_UART1_TX,
774 .flags = IORESOURCE_DMA,
775 },
776 {
777 .start = CH_UART1_RX,
778 .end = CH_UART1_RX,
779 .flags = IORESOURCE_DMA,
780 },
781#ifdef CONFIG_BFIN_UART1_CTSRTS
782 {
783 .start = GPIO_PF9,
784 .end = GPIO_PF9,
785 .flags = IORESOURCE_IO,
786 },
787 {
788 .start = GPIO_PF10,
789 .end = GPIO_PF10,
790 .flags = IORESOURCE_IO,
791 },
792#endif
793};
794
795static unsigned short bfin_uart1_peripherals[] = {
796 P_UART1_TX, P_UART1_RX, 0
797};
798
799static struct platform_device bfin_uart1_device = {
800 .name = "bfin-uart",
801 .id = 1,
802 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
803 .resource = bfin_uart1_resources,
804 .dev = {
805 .platform_data = &bfin_uart1_peripherals,
806 },
807};
808#endif
809#endif
810
811#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
812#ifdef CONFIG_BFIN_SIR0
813static struct resource bfin_sir0_resources[] = {
814 {
815 .start = 0xFFC00400,
816 .end = 0xFFC004FF,
817 .flags = IORESOURCE_MEM,
818 },
819 {
820 .start = IRQ_UART0_RX,
821 .end = IRQ_UART0_RX+1,
822 .flags = IORESOURCE_IRQ,
823 },
824 {
825 .start = CH_UART0_RX,
826 .end = CH_UART0_RX+1,
827 .flags = IORESOURCE_DMA,
828 },
829};
830
831static struct platform_device bfin_sir0_device = {
832 .name = "bfin_sir",
833 .id = 0,
834 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
835 .resource = bfin_sir0_resources,
836};
837#endif
838#ifdef CONFIG_BFIN_SIR1
839static struct resource bfin_sir1_resources[] = {
840 {
841 .start = 0xFFC02000,
842 .end = 0xFFC020FF,
843 .flags = IORESOURCE_MEM,
844 },
845 {
846 .start = IRQ_UART1_RX,
847 .end = IRQ_UART1_RX+1,
848 .flags = IORESOURCE_IRQ,
849 },
850 {
851 .start = CH_UART1_RX,
852 .end = CH_UART1_RX+1,
853 .flags = IORESOURCE_DMA,
854 },
855};
856
857static struct platform_device bfin_sir1_device = {
858 .name = "bfin_sir",
859 .id = 1,
860 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
861 .resource = bfin_sir1_resources,
862};
863#endif
864#endif
865
866#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
867static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
868
869static struct resource bfin_twi0_resource[] = {
870 [0] = {
871 .start = TWI0_REGBASE,
872 .end = TWI0_REGBASE,
873 .flags = IORESOURCE_MEM,
874 },
875 [1] = {
876 .start = IRQ_TWI,
877 .end = IRQ_TWI,
878 .flags = IORESOURCE_IRQ,
879 },
880};
881
882static struct platform_device i2c_bfin_twi_device = {
883 .name = "i2c-bfin-twi",
884 .id = 0,
885 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
886 .resource = bfin_twi0_resource,
887 .dev = {
888 .platform_data = &bfin_twi0_pins,
889 },
890};
891#endif
892
893#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
894#include <linux/mfd/adp5520.h>
895
896
897
898
899
900static struct led_info adp5520_leds[] = {
901 {
902 .name = "adp5520-led1",
903 .default_trigger = "none",
904 .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
905 },
906};
907
908static struct adp5520_leds_platform_data adp5520_leds_data = {
909 .num_leds = ARRAY_SIZE(adp5520_leds),
910 .leds = adp5520_leds,
911 .fade_in = ADP5520_FADE_T_600ms,
912 .fade_out = ADP5520_FADE_T_600ms,
913 .led_on_time = ADP5520_LED_ONT_600ms,
914};
915
916
917
918
919
920static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
921 [ADP5520_KEY(3, 3)] = KEY_1,
922 [ADP5520_KEY(2, 3)] = KEY_2,
923 [ADP5520_KEY(1, 3)] = KEY_3,
924 [ADP5520_KEY(0, 3)] = KEY_UP,
925 [ADP5520_KEY(3, 2)] = KEY_4,
926 [ADP5520_KEY(2, 2)] = KEY_5,
927 [ADP5520_KEY(1, 2)] = KEY_6,
928 [ADP5520_KEY(0, 2)] = KEY_DOWN,
929 [ADP5520_KEY(3, 1)] = KEY_7,
930 [ADP5520_KEY(2, 1)] = KEY_8,
931 [ADP5520_KEY(1, 1)] = KEY_9,
932 [ADP5520_KEY(0, 1)] = KEY_DOT,
933 [ADP5520_KEY(3, 0)] = KEY_BACKSPACE,
934 [ADP5520_KEY(2, 0)] = KEY_0,
935 [ADP5520_KEY(1, 0)] = KEY_HELP,
936 [ADP5520_KEY(0, 0)] = KEY_ENTER,
937};
938
939static struct adp5520_keys_platform_data adp5520_keys_data = {
940 .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
941 .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
942 .keymap = adp5520_keymap,
943 .keymapsize = ARRAY_SIZE(adp5520_keymap),
944 .repeat = 0,
945};
946
947
948
949
950
951static struct adp5520_platform_data adp5520_pdev_data = {
952 .leds = &adp5520_leds_data,
953 .keys = &adp5520_keys_data,
954};
955
956#endif
957
958static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
959#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
960 {
961 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
962 },
963#endif
964#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
965 {
966 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
967 .irq = IRQ_PF8,
968 },
969#endif
970#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
971 {
972 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
973 },
974#endif
975#if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
976 {
977 I2C_BOARD_INFO("ad7879", 0x2C),
978 .irq = IRQ_PF8,
979 .platform_data = (void *)&bfin_ad7879_ts_info,
980 },
981#endif
982#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
983 {
984 I2C_BOARD_INFO("pmic-adp5520", 0x32),
985 .irq = IRQ_PF9,
986 .platform_data = (void *)&adp5520_pdev_data,
987 },
988#endif
989#if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
990 {
991 I2C_BOARD_INFO("ssm2602", 0x1b),
992 },
993#endif
994#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
995 {
996 I2C_BOARD_INFO("ad5252", 0x2f),
997 },
998#endif
999#if defined(CONFIG_SND_SOC_ADAU1373) || defined(CONFIG_SND_SOC_ADAU1373_MODULE)
1000 {
1001 I2C_BOARD_INFO("adau1373", 0x1A),
1002 },
1003#endif
1004};
1005
1006#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1007#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1008static struct resource bfin_sport0_uart_resources[] = {
1009 {
1010 .start = SPORT0_TCR1,
1011 .end = SPORT0_MRCS3+4,
1012 .flags = IORESOURCE_MEM,
1013 },
1014 {
1015 .start = IRQ_SPORT0_RX,
1016 .end = IRQ_SPORT0_RX+1,
1017 .flags = IORESOURCE_IRQ,
1018 },
1019 {
1020 .start = IRQ_SPORT0_ERROR,
1021 .end = IRQ_SPORT0_ERROR,
1022 .flags = IORESOURCE_IRQ,
1023 },
1024};
1025
1026static unsigned short bfin_sport0_peripherals[] = {
1027 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
1028 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
1029};
1030
1031static struct platform_device bfin_sport0_uart_device = {
1032 .name = "bfin-sport-uart",
1033 .id = 0,
1034 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
1035 .resource = bfin_sport0_uart_resources,
1036 .dev = {
1037 .platform_data = &bfin_sport0_peripherals,
1038 },
1039};
1040#endif
1041#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1042static struct resource bfin_sport1_uart_resources[] = {
1043 {
1044 .start = SPORT1_TCR1,
1045 .end = SPORT1_MRCS3+4,
1046 .flags = IORESOURCE_MEM,
1047 },
1048 {
1049 .start = IRQ_SPORT1_RX,
1050 .end = IRQ_SPORT1_RX+1,
1051 .flags = IORESOURCE_IRQ,
1052 },
1053 {
1054 .start = IRQ_SPORT1_ERROR,
1055 .end = IRQ_SPORT1_ERROR,
1056 .flags = IORESOURCE_IRQ,
1057 },
1058};
1059
1060static unsigned short bfin_sport1_peripherals[] = {
1061 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
1062 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
1063};
1064
1065static struct platform_device bfin_sport1_uart_device = {
1066 .name = "bfin-sport-uart",
1067 .id = 1,
1068 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
1069 .resource = bfin_sport1_uart_resources,
1070 .dev = {
1071 .platform_data = &bfin_sport1_peripherals,
1072 },
1073};
1074#endif
1075#endif
1076
1077#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1078#include <linux/gpio_keys.h>
1079
1080static struct gpio_keys_button bfin_gpio_keys_table[] = {
1081 {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
1082 {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
1083};
1084
1085static struct gpio_keys_platform_data bfin_gpio_keys_data = {
1086 .buttons = bfin_gpio_keys_table,
1087 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
1088};
1089
1090static struct platform_device bfin_device_gpiokeys = {
1091 .name = "gpio-keys",
1092 .dev = {
1093 .platform_data = &bfin_gpio_keys_data,
1094 },
1095};
1096#endif
1097
1098#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
1099#include <asm/bfin_rotary.h>
1100
1101static struct bfin_rotary_platform_data bfin_rotary_data = {
1102
1103
1104 .rotary_rel_code = REL_WHEEL,
1105 .rotary_button_key = KEY_ENTER,
1106 .debounce = 10,
1107 .mode = ROT_QUAD_ENC | ROT_DEBE,
1108 .pm_wakeup = 1,
1109};
1110
1111static struct resource bfin_rotary_resources[] = {
1112 {
1113 .start = IRQ_CNT,
1114 .end = IRQ_CNT,
1115 .flags = IORESOURCE_IRQ,
1116 },
1117};
1118
1119static struct platform_device bfin_rotary_device = {
1120 .name = "bfin-rotary",
1121 .id = -1,
1122 .num_resources = ARRAY_SIZE(bfin_rotary_resources),
1123 .resource = bfin_rotary_resources,
1124 .dev = {
1125 .platform_data = &bfin_rotary_data,
1126 },
1127};
1128#endif
1129
1130static const unsigned int cclk_vlev_datasheet[] =
1131{
1132 VRPAIR(VLEV_100, 400000000),
1133 VRPAIR(VLEV_105, 426000000),
1134 VRPAIR(VLEV_110, 500000000),
1135 VRPAIR(VLEV_115, 533000000),
1136 VRPAIR(VLEV_120, 600000000),
1137};
1138
1139static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1140 .tuple_tab = cclk_vlev_datasheet,
1141 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1142 .vr_settling_time = 25 ,
1143};
1144
1145static struct platform_device bfin_dpmc = {
1146 .name = "bfin dpmc",
1147 .dev = {
1148 .platform_data = &bfin_dmpc_vreg_data,
1149 },
1150};
1151
1152static struct platform_device *stamp_devices[] __initdata = {
1153
1154 &bfin_dpmc,
1155
1156#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
1157 &bf5xx_nand_device,
1158#endif
1159
1160#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
1161 &bfin_pcmcia_cf_device,
1162#endif
1163
1164#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1165 &rtc_device,
1166#endif
1167
1168#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
1169 &bfin_isp1760_device,
1170#endif
1171
1172#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
1173 &musb_device,
1174#endif
1175
1176#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
1177 &smc91x_device,
1178#endif
1179
1180#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
1181 &dm9000_device,
1182#endif
1183
1184#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
1185 &bfin_mii_bus,
1186 &bfin_mac_device,
1187#endif
1188
1189#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
1190 &net2272_bfin_device,
1191#endif
1192
1193#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
1194 &bfin_spi0_device,
1195#endif
1196
1197#if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
1198 &bf52x_t350mcqb_device,
1199#endif
1200
1201#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1202 &bfin_lq035q1_device,
1203#endif
1204
1205#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
1206#ifdef CONFIG_SERIAL_BFIN_UART0
1207 &bfin_uart0_device,
1208#endif
1209#ifdef CONFIG_SERIAL_BFIN_UART1
1210 &bfin_uart1_device,
1211#endif
1212#endif
1213
1214#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
1215#ifdef CONFIG_BFIN_SIR0
1216 &bfin_sir0_device,
1217#endif
1218#ifdef CONFIG_BFIN_SIR1
1219 &bfin_sir1_device,
1220#endif
1221#endif
1222
1223#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1224 &i2c_bfin_twi_device,
1225#endif
1226
1227#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1228#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1229 &bfin_sport0_uart_device,
1230#endif
1231#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1232 &bfin_sport1_uart_device,
1233#endif
1234#endif
1235
1236#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1237 &bfin_device_gpiokeys,
1238#endif
1239
1240#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
1241 &bfin_rotary_device,
1242#endif
1243
1244#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
1245 &ezkit_flash_device,
1246#endif
1247
1248#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
1249 &bfin_i2s_pcm,
1250#endif
1251
1252#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
1253 &bfin_ac97_pcm,
1254#endif
1255
1256#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
1257 &bfin_i2s,
1258#endif
1259
1260#if defined(CONFIG_SND_BF5XX_SOC_AD1836) || \
1261 defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
1262 &bfin_ad1836_machine,
1263#endif
1264};
1265
1266static int __init ezkit_init(void)
1267{
1268 printk(KERN_INFO "%s(): registering device resources\n", __func__);
1269 i2c_register_board_info(0, bfin_i2c_board_info,
1270 ARRAY_SIZE(bfin_i2c_board_info));
1271 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
1272 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
1273 return 0;
1274}
1275
1276arch_initcall(ezkit_init);
1277
1278static struct platform_device *ezkit_early_devices[] __initdata = {
1279#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1280#ifdef CONFIG_SERIAL_BFIN_UART0
1281 &bfin_uart0_device,
1282#endif
1283#ifdef CONFIG_SERIAL_BFIN_UART1
1284 &bfin_uart1_device,
1285#endif
1286#endif
1287
1288#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
1289#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1290 &bfin_sport0_uart_device,
1291#endif
1292#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1293 &bfin_sport1_uart_device,
1294#endif
1295#endif
1296};
1297
1298void __init native_machine_early_platform_add_devices(void)
1299{
1300 printk(KERN_INFO "register early platform devices\n");
1301 early_platform_add_devices(ezkit_early_devices,
1302 ARRAY_SIZE(ezkit_early_devices));
1303}
1304
1305void native_machine_restart(char *cmd)
1306{
1307
1308 if ((bfin_read_SYSCR() & 0x7) == 0x3)
1309 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
1310}
1311
1312int bfin_get_ether_addr(char *addr)
1313{
1314
1315 u32 ret;
1316 u64 otp_mac;
1317 u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
1318
1319 ret = otp_read(0xDF, 0x00, &otp_mac);
1320 if (!(ret & 0x1)) {
1321 char *otp_mac_p = (char *)&otp_mac;
1322 for (ret = 0; ret < 6; ++ret)
1323 addr[ret] = otp_mac_p[5 - ret];
1324 }
1325 return 0;
1326}
1327EXPORT_SYMBOL(bfin_get_ether_addr);
1328