LXR linux/drivers/gpu/drm/nouveau/core/subdev/bios/volt.c

   1/*
   2 * Copyright 2012 Nouveau Community
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: Martin Peres
  23 */
  24
  25#include <subdev/bios.h>
  26#include <subdev/bios/bit.h>
  27#include <subdev/bios/volt.h>
  28
  29u16
  30nvbios_volt_table(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
  31{
  32        struct bit_entry bit_P;
  33        u16 volt = 0x0000;
  34
  35        if (!bit_entry(bios, 'P', &bit_P)) {
  36                if (bit_P.version == 2)
  37                        volt = nv_ro16(bios, bit_P.offset + 0x0c);
  38                else
  39                if (bit_P.version == 1)
  40                        volt = nv_ro16(bios, bit_P.offset + 0x10);
  41
  42                if (volt) {
  43                        *ver = nv_ro08(bios, volt + 0);
  44                        switch (*ver) {
  45                        case 0x12:
  46                                *hdr = 5;
  47                                *cnt = nv_ro08(bios, volt + 2);
  48                                *len = nv_ro08(bios, volt + 1);
  49                                return volt;
  50                        case 0x20:
  51                                *hdr = nv_ro08(bios, volt + 1);
  52                                *cnt = nv_ro08(bios, volt + 2);
  53                                *len = nv_ro08(bios, volt + 3);
  54                                return volt;
  55                        case 0x30:
  56                        case 0x40:
  57                        case 0x50:
  58                                *hdr = nv_ro08(bios, volt + 1);
  59                                *cnt = nv_ro08(bios, volt + 3);
  60                                *len = nv_ro08(bios, volt + 2);
  61                                return volt;
  62                        }
  63                }
  64        }
  65
  66        return 0x0000;
  67}
  68
  69u16
  70nvbios_volt_parse(struct nouveau_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
  71                  struct nvbios_volt *info)
  72{
  73        u16 volt = nvbios_volt_table(bios, ver, hdr, cnt, len);
  74        memset(info, 0x00, sizeof(*info));
  75        switch (!!volt * *ver) {
  76        case 0x12:
  77                info->vidmask = nv_ro08(bios, volt + 0x04);
  78                break;
  79        case 0x20:
  80                info->vidmask = nv_ro08(bios, volt + 0x05);
  81                break;
  82        case 0x30:
  83                info->vidmask = nv_ro08(bios, volt + 0x04);
  84                break;
  85        case 0x40:
  86                info->base    = nv_ro32(bios, volt + 0x04);
  87                info->step    = nv_ro16(bios, volt + 0x08);
  88                info->vidmask = nv_ro08(bios, volt + 0x0b);
  89                /*XXX*/
  90                info->min     = 0;
  91                info->max     = info->base;
  92                break;
  93        case 0x50:
  94                info->vidmask = nv_ro08(bios, volt + 0x06);
  95                info->min     = nv_ro32(bios, volt + 0x0a);
  96                info->max     = nv_ro32(bios, volt + 0x0e);
  97                info->base    = nv_ro32(bios, volt + 0x12) & 0x00ffffff;
  98                info->step    = nv_ro16(bios, volt + 0x16);
  99                break;
 100        }
 101        return volt;
 102}
 103
 104u16
 105nvbios_volt_entry(struct nouveau_bios *bios, int idx, u8 *ver, u8 *len)
 106{
 107        u8  hdr, cnt;
 108        u16 volt = nvbios_volt_table(bios, ver, &hdr, &cnt, len);
 109        if (volt && idx < cnt) {
 110                volt = volt + hdr + (idx * *len);
 111                return volt;
 112        }
 113        return 0x0000;
 114}
 115
 116u16
 117nvbios_volt_entry_parse(struct nouveau_bios *bios, int idx, u8 *ver, u8 *len,
 118                        struct nvbios_volt_entry *info)
 119{
 120        u16 volt = nvbios_volt_entry(bios, idx, ver, len);
 121        memset(info, 0x00, sizeof(*info));
 122        switch (!!volt * *ver) {
 123        case 0x12:
 124        case 0x20:
 125                info->voltage = nv_ro08(bios, volt + 0x00) * 10000;
 126                info->vid     = nv_ro08(bios, volt + 0x01);
 127                break;
 128        case 0x30:
 129                info->voltage = nv_ro08(bios, volt + 0x00) * 10000;
 130                info->vid     = nv_ro08(bios, volt + 0x01) >> 2;
 131                break;
 132        case 0x40:
 133        case 0x50:
 134                break;
 135        }
 136        return volt;
 137}
 138