linux/drivers/net/ethernet/intel/igb/igb_ptp.c
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   1/* PTP Hardware Clock (PHC) driver for the Intel 82576 and 82580
   2 *
   3 * Copyright (C) 2011 Richard Cochran <richardcochran@gmail.com>
   4 *
   5 * This program is free software; you can redistribute it and/or modify
   6 * it under the terms of the GNU General Public License as published by
   7 * the Free Software Foundation; either version 2 of the License, or
   8 * (at your option) any later version.
   9 *
  10 * This program is distributed in the hope that it will be useful,
  11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13 * GNU General Public License for more details.
  14 *
  15 * You should have received a copy of the GNU General Public License along
  16 * with this program; if not, write to the Free Software Foundation, Inc.,
  17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  18 */
  19#include <linux/module.h>
  20#include <linux/device.h>
  21#include <linux/pci.h>
  22#include <linux/ptp_classify.h>
  23
  24#include "igb.h"
  25
  26#define INCVALUE_MASK           0x7fffffff
  27#define ISGN                    0x80000000
  28
  29/* The 82580 timesync updates the system timer every 8ns by 8ns,
  30 * and this update value cannot be reprogrammed.
  31 *
  32 * Neither the 82576 nor the 82580 offer registers wide enough to hold
  33 * nanoseconds time values for very long. For the 82580, SYSTIM always
  34 * counts nanoseconds, but the upper 24 bits are not availible. The
  35 * frequency is adjusted by changing the 32 bit fractional nanoseconds
  36 * register, TIMINCA.
  37 *
  38 * For the 82576, the SYSTIM register time unit is affect by the
  39 * choice of the 24 bit TININCA:IV (incvalue) field. Five bits of this
  40 * field are needed to provide the nominal 16 nanosecond period,
  41 * leaving 19 bits for fractional nanoseconds.
  42 *
  43 * We scale the NIC clock cycle by a large factor so that relatively
  44 * small clock corrections can be added or subtracted at each clock
  45 * tick. The drawbacks of a large factor are a) that the clock
  46 * register overflows more quickly (not such a big deal) and b) that
  47 * the increment per tick has to fit into 24 bits.  As a result we
  48 * need to use a shift of 19 so we can fit a value of 16 into the
  49 * TIMINCA register.
  50 *
  51 *
  52 *             SYSTIMH            SYSTIML
  53 *        +--------------+   +---+---+------+
  54 *  82576 |      32      |   | 8 | 5 |  19  |
  55 *        +--------------+   +---+---+------+
  56 *         \________ 45 bits _______/  fract
  57 *
  58 *        +----------+---+   +--------------+
  59 *  82580 |    24    | 8 |   |      32      |
  60 *        +----------+---+   +--------------+
  61 *          reserved  \______ 40 bits _____/
  62 *
  63 *
  64 * The 45 bit 82576 SYSTIM overflows every
  65 *   2^45 * 10^-9 / 3600 = 9.77 hours.
  66 *
  67 * The 40 bit 82580 SYSTIM overflows every
  68 *   2^40 * 10^-9 /  60  = 18.3 minutes.
  69 */
  70
  71#define IGB_SYSTIM_OVERFLOW_PERIOD      (HZ * 60 * 9)
  72#define IGB_PTP_TX_TIMEOUT              (HZ * 15)
  73#define INCPERIOD_82576                 (1 << E1000_TIMINCA_16NS_SHIFT)
  74#define INCVALUE_82576_MASK             ((1 << E1000_TIMINCA_16NS_SHIFT) - 1)
  75#define INCVALUE_82576                  (16 << IGB_82576_TSYNC_SHIFT)
  76#define IGB_NBITS_82580                 40
  77
  78/* SYSTIM read access for the 82576 */
  79static cycle_t igb_ptp_read_82576(const struct cyclecounter *cc)
  80{
  81        struct igb_adapter *igb = container_of(cc, struct igb_adapter, cc);
  82        struct e1000_hw *hw = &igb->hw;
  83        u64 val;
  84        u32 lo, hi;
  85
  86        lo = rd32(E1000_SYSTIML);
  87        hi = rd32(E1000_SYSTIMH);
  88
  89        val = ((u64) hi) << 32;
  90        val |= lo;
  91
  92        return val;
  93}
  94
  95/* SYSTIM read access for the 82580 */
  96static cycle_t igb_ptp_read_82580(const struct cyclecounter *cc)
  97{
  98        struct igb_adapter *igb = container_of(cc, struct igb_adapter, cc);
  99        struct e1000_hw *hw = &igb->hw;
 100        u32 lo, hi;
 101        u64 val;
 102
 103        /* The timestamp latches on lowest register read. For the 82580
 104         * the lowest register is SYSTIMR instead of SYSTIML.  However we only
 105         * need to provide nanosecond resolution, so we just ignore it.
 106         */
 107        rd32(E1000_SYSTIMR);
 108        lo = rd32(E1000_SYSTIML);
 109        hi = rd32(E1000_SYSTIMH);
 110
 111        val = ((u64) hi) << 32;
 112        val |= lo;
 113
 114        return val;
 115}
 116
 117/* SYSTIM read access for I210/I211 */
 118static void igb_ptp_read_i210(struct igb_adapter *adapter, struct timespec *ts)
 119{
 120        struct e1000_hw *hw = &adapter->hw;
 121        u32 sec, nsec;
 122
 123        /* The timestamp latches on lowest register read. For I210/I211, the
 124         * lowest register is SYSTIMR. Since we only need to provide nanosecond
 125         * resolution, we can ignore it.
 126         */
 127        rd32(E1000_SYSTIMR);
 128        nsec = rd32(E1000_SYSTIML);
 129        sec = rd32(E1000_SYSTIMH);
 130
 131        ts->tv_sec = sec;
 132        ts->tv_nsec = nsec;
 133}
 134
 135static void igb_ptp_write_i210(struct igb_adapter *adapter,
 136                               const struct timespec *ts)
 137{
 138        struct e1000_hw *hw = &adapter->hw;
 139
 140        /* Writing the SYSTIMR register is not necessary as it only provides
 141         * sub-nanosecond resolution.
 142         */
 143        wr32(E1000_SYSTIML, ts->tv_nsec);
 144        wr32(E1000_SYSTIMH, ts->tv_sec);
 145}
 146
 147/**
 148 * igb_ptp_systim_to_hwtstamp - convert system time value to hw timestamp
 149 * @adapter: board private structure
 150 * @hwtstamps: timestamp structure to update
 151 * @systim: unsigned 64bit system time value.
 152 *
 153 * We need to convert the system time value stored in the RX/TXSTMP registers
 154 * into a hwtstamp which can be used by the upper level timestamping functions.
 155 *
 156 * The 'tmreg_lock' spinlock is used to protect the consistency of the
 157 * system time value. This is needed because reading the 64 bit time
 158 * value involves reading two (or three) 32 bit registers. The first
 159 * read latches the value. Ditto for writing.
 160 *
 161 * In addition, here have extended the system time with an overflow
 162 * counter in software.
 163 **/
 164static void igb_ptp_systim_to_hwtstamp(struct igb_adapter *adapter,
 165                                       struct skb_shared_hwtstamps *hwtstamps,
 166                                       u64 systim)
 167{
 168        unsigned long flags;
 169        u64 ns;
 170
 171        switch (adapter->hw.mac.type) {
 172        case e1000_82576:
 173        case e1000_82580:
 174        case e1000_i354:
 175        case e1000_i350:
 176                spin_lock_irqsave(&adapter->tmreg_lock, flags);
 177
 178                ns = timecounter_cyc2time(&adapter->tc, systim);
 179
 180                spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
 181
 182                memset(hwtstamps, 0, sizeof(*hwtstamps));
 183                hwtstamps->hwtstamp = ns_to_ktime(ns);
 184                break;
 185        case e1000_i210:
 186        case e1000_i211:
 187                memset(hwtstamps, 0, sizeof(*hwtstamps));
 188                /* Upper 32 bits contain s, lower 32 bits contain ns. */
 189                hwtstamps->hwtstamp = ktime_set(systim >> 32,
 190                                                systim & 0xFFFFFFFF);
 191                break;
 192        default:
 193                break;
 194        }
 195}
 196
 197/* PTP clock operations */
 198static int igb_ptp_adjfreq_82576(struct ptp_clock_info *ptp, s32 ppb)
 199{
 200        struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 201                                               ptp_caps);
 202        struct e1000_hw *hw = &igb->hw;
 203        int neg_adj = 0;
 204        u64 rate;
 205        u32 incvalue;
 206
 207        if (ppb < 0) {
 208                neg_adj = 1;
 209                ppb = -ppb;
 210        }
 211        rate = ppb;
 212        rate <<= 14;
 213        rate = div_u64(rate, 1953125);
 214
 215        incvalue = 16 << IGB_82576_TSYNC_SHIFT;
 216
 217        if (neg_adj)
 218                incvalue -= rate;
 219        else
 220                incvalue += rate;
 221
 222        wr32(E1000_TIMINCA, INCPERIOD_82576 | (incvalue & INCVALUE_82576_MASK));
 223
 224        return 0;
 225}
 226
 227static int igb_ptp_adjfreq_82580(struct ptp_clock_info *ptp, s32 ppb)
 228{
 229        struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 230                                               ptp_caps);
 231        struct e1000_hw *hw = &igb->hw;
 232        int neg_adj = 0;
 233        u64 rate;
 234        u32 inca;
 235
 236        if (ppb < 0) {
 237                neg_adj = 1;
 238                ppb = -ppb;
 239        }
 240        rate = ppb;
 241        rate <<= 26;
 242        rate = div_u64(rate, 1953125);
 243
 244        inca = rate & INCVALUE_MASK;
 245        if (neg_adj)
 246                inca |= ISGN;
 247
 248        wr32(E1000_TIMINCA, inca);
 249
 250        return 0;
 251}
 252
 253static int igb_ptp_adjtime_82576(struct ptp_clock_info *ptp, s64 delta)
 254{
 255        struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 256                                               ptp_caps);
 257        unsigned long flags;
 258        s64 now;
 259
 260        spin_lock_irqsave(&igb->tmreg_lock, flags);
 261
 262        now = timecounter_read(&igb->tc);
 263        now += delta;
 264        timecounter_init(&igb->tc, &igb->cc, now);
 265
 266        spin_unlock_irqrestore(&igb->tmreg_lock, flags);
 267
 268        return 0;
 269}
 270
 271static int igb_ptp_adjtime_i210(struct ptp_clock_info *ptp, s64 delta)
 272{
 273        struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 274                                               ptp_caps);
 275        unsigned long flags;
 276        struct timespec now, then = ns_to_timespec(delta);
 277
 278        spin_lock_irqsave(&igb->tmreg_lock, flags);
 279
 280        igb_ptp_read_i210(igb, &now);
 281        now = timespec_add(now, then);
 282        igb_ptp_write_i210(igb, (const struct timespec *)&now);
 283
 284        spin_unlock_irqrestore(&igb->tmreg_lock, flags);
 285
 286        return 0;
 287}
 288
 289static int igb_ptp_gettime_82576(struct ptp_clock_info *ptp,
 290                                 struct timespec *ts)
 291{
 292        struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 293                                               ptp_caps);
 294        unsigned long flags;
 295        u64 ns;
 296        u32 remainder;
 297
 298        spin_lock_irqsave(&igb->tmreg_lock, flags);
 299
 300        ns = timecounter_read(&igb->tc);
 301
 302        spin_unlock_irqrestore(&igb->tmreg_lock, flags);
 303
 304        ts->tv_sec = div_u64_rem(ns, 1000000000, &remainder);
 305        ts->tv_nsec = remainder;
 306
 307        return 0;
 308}
 309
 310static int igb_ptp_gettime_i210(struct ptp_clock_info *ptp,
 311                                struct timespec *ts)
 312{
 313        struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 314                                               ptp_caps);
 315        unsigned long flags;
 316
 317        spin_lock_irqsave(&igb->tmreg_lock, flags);
 318
 319        igb_ptp_read_i210(igb, ts);
 320
 321        spin_unlock_irqrestore(&igb->tmreg_lock, flags);
 322
 323        return 0;
 324}
 325
 326static int igb_ptp_settime_82576(struct ptp_clock_info *ptp,
 327                                 const struct timespec *ts)
 328{
 329        struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 330                                               ptp_caps);
 331        unsigned long flags;
 332        u64 ns;
 333
 334        ns = ts->tv_sec * 1000000000ULL;
 335        ns += ts->tv_nsec;
 336
 337        spin_lock_irqsave(&igb->tmreg_lock, flags);
 338
 339        timecounter_init(&igb->tc, &igb->cc, ns);
 340
 341        spin_unlock_irqrestore(&igb->tmreg_lock, flags);
 342
 343        return 0;
 344}
 345
 346static int igb_ptp_settime_i210(struct ptp_clock_info *ptp,
 347                                const struct timespec *ts)
 348{
 349        struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 350                                               ptp_caps);
 351        unsigned long flags;
 352
 353        spin_lock_irqsave(&igb->tmreg_lock, flags);
 354
 355        igb_ptp_write_i210(igb, ts);
 356
 357        spin_unlock_irqrestore(&igb->tmreg_lock, flags);
 358
 359        return 0;
 360}
 361
 362static int igb_ptp_enable(struct ptp_clock_info *ptp,
 363                          struct ptp_clock_request *rq, int on)
 364{
 365        return -EOPNOTSUPP;
 366}
 367
 368/**
 369 * igb_ptp_tx_work
 370 * @work: pointer to work struct
 371 *
 372 * This work function polls the TSYNCTXCTL valid bit to determine when a
 373 * timestamp has been taken for the current stored skb.
 374 **/
 375void igb_ptp_tx_work(struct work_struct *work)
 376{
 377        struct igb_adapter *adapter = container_of(work, struct igb_adapter,
 378                                                   ptp_tx_work);
 379        struct e1000_hw *hw = &adapter->hw;
 380        u32 tsynctxctl;
 381
 382        if (!adapter->ptp_tx_skb)
 383                return;
 384
 385        if (time_is_before_jiffies(adapter->ptp_tx_start +
 386                                   IGB_PTP_TX_TIMEOUT)) {
 387                dev_kfree_skb_any(adapter->ptp_tx_skb);
 388                adapter->ptp_tx_skb = NULL;
 389                adapter->tx_hwtstamp_timeouts++;
 390                dev_warn(&adapter->pdev->dev, "clearing Tx timestamp hang");
 391                return;
 392        }
 393
 394        tsynctxctl = rd32(E1000_TSYNCTXCTL);
 395        if (tsynctxctl & E1000_TSYNCTXCTL_VALID)
 396                igb_ptp_tx_hwtstamp(adapter);
 397        else
 398                /* reschedule to check later */
 399                schedule_work(&adapter->ptp_tx_work);
 400}
 401
 402static void igb_ptp_overflow_check(struct work_struct *work)
 403{
 404        struct igb_adapter *igb =
 405                container_of(work, struct igb_adapter, ptp_overflow_work.work);
 406        struct timespec ts;
 407
 408        igb->ptp_caps.gettime(&igb->ptp_caps, &ts);
 409
 410        pr_debug("igb overflow check at %ld.%09lu\n", ts.tv_sec, ts.tv_nsec);
 411
 412        schedule_delayed_work(&igb->ptp_overflow_work,
 413                              IGB_SYSTIM_OVERFLOW_PERIOD);
 414}
 415
 416/**
 417 * igb_ptp_rx_hang - detect error case when Rx timestamp registers latched
 418 * @adapter: private network adapter structure
 419 *
 420 * This watchdog task is scheduled to detect error case where hardware has
 421 * dropped an Rx packet that was timestamped when the ring is full. The
 422 * particular error is rare but leaves the device in a state unable to timestamp
 423 * any future packets.
 424 **/
 425void igb_ptp_rx_hang(struct igb_adapter *adapter)
 426{
 427        struct e1000_hw *hw = &adapter->hw;
 428        struct igb_ring *rx_ring;
 429        u32 tsyncrxctl = rd32(E1000_TSYNCRXCTL);
 430        unsigned long rx_event;
 431        int n;
 432
 433        if (hw->mac.type != e1000_82576)
 434                return;
 435
 436        /* If we don't have a valid timestamp in the registers, just update the
 437         * timeout counter and exit
 438         */
 439        if (!(tsyncrxctl & E1000_TSYNCRXCTL_VALID)) {
 440                adapter->last_rx_ptp_check = jiffies;
 441                return;
 442        }
 443
 444        /* Determine the most recent watchdog or rx_timestamp event */
 445        rx_event = adapter->last_rx_ptp_check;
 446        for (n = 0; n < adapter->num_rx_queues; n++) {
 447                rx_ring = adapter->rx_ring[n];
 448                if (time_after(rx_ring->last_rx_timestamp, rx_event))
 449                        rx_event = rx_ring->last_rx_timestamp;
 450        }
 451
 452        /* Only need to read the high RXSTMP register to clear the lock */
 453        if (time_is_before_jiffies(rx_event + 5 * HZ)) {
 454                rd32(E1000_RXSTMPH);
 455                adapter->last_rx_ptp_check = jiffies;
 456                adapter->rx_hwtstamp_cleared++;
 457                dev_warn(&adapter->pdev->dev, "clearing Rx timestamp hang");
 458        }
 459}
 460
 461/**
 462 * igb_ptp_tx_hwtstamp - utility function which checks for TX time stamp
 463 * @adapter: Board private structure.
 464 *
 465 * If we were asked to do hardware stamping and such a time stamp is
 466 * available, then it must have been for this skb here because we only
 467 * allow only one such packet into the queue.
 468 **/
 469void igb_ptp_tx_hwtstamp(struct igb_adapter *adapter)
 470{
 471        struct e1000_hw *hw = &adapter->hw;
 472        struct skb_shared_hwtstamps shhwtstamps;
 473        u64 regval;
 474
 475        regval = rd32(E1000_TXSTMPL);
 476        regval |= (u64)rd32(E1000_TXSTMPH) << 32;
 477
 478        igb_ptp_systim_to_hwtstamp(adapter, &shhwtstamps, regval);
 479        skb_tstamp_tx(adapter->ptp_tx_skb, &shhwtstamps);
 480        dev_kfree_skb_any(adapter->ptp_tx_skb);
 481        adapter->ptp_tx_skb = NULL;
 482}
 483
 484/**
 485 * igb_ptp_rx_pktstamp - retrieve Rx per packet timestamp
 486 * @q_vector: Pointer to interrupt specific structure
 487 * @va: Pointer to address containing Rx buffer
 488 * @skb: Buffer containing timestamp and packet
 489 *
 490 * This function is meant to retrieve a timestamp from the first buffer of an
 491 * incoming frame.  The value is stored in little endian format starting on
 492 * byte 8.
 493 **/
 494void igb_ptp_rx_pktstamp(struct igb_q_vector *q_vector,
 495                         unsigned char *va,
 496                         struct sk_buff *skb)
 497{
 498        __le64 *regval = (__le64 *)va;
 499
 500        /* The timestamp is recorded in little endian format.
 501         * DWORD: 0        1        2        3
 502         * Field: Reserved Reserved SYSTIML  SYSTIMH
 503         */
 504        igb_ptp_systim_to_hwtstamp(q_vector->adapter, skb_hwtstamps(skb),
 505                                   le64_to_cpu(regval[1]));
 506}
 507
 508/**
 509 * igb_ptp_rx_rgtstamp - retrieve Rx timestamp stored in register
 510 * @q_vector: Pointer to interrupt specific structure
 511 * @skb: Buffer containing timestamp and packet
 512 *
 513 * This function is meant to retrieve a timestamp from the internal registers
 514 * of the adapter and store it in the skb.
 515 **/
 516void igb_ptp_rx_rgtstamp(struct igb_q_vector *q_vector,
 517                         struct sk_buff *skb)
 518{
 519        struct igb_adapter *adapter = q_vector->adapter;
 520        struct e1000_hw *hw = &adapter->hw;
 521        u64 regval;
 522
 523        /* If this bit is set, then the RX registers contain the time stamp. No
 524         * other packet will be time stamped until we read these registers, so
 525         * read the registers to make them available again. Because only one
 526         * packet can be time stamped at a time, we know that the register
 527         * values must belong to this one here and therefore we don't need to
 528         * compare any of the additional attributes stored for it.
 529         *
 530         * If nothing went wrong, then it should have a shared tx_flags that we
 531         * can turn into a skb_shared_hwtstamps.
 532         */
 533        if (!(rd32(E1000_TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
 534                return;
 535
 536        regval = rd32(E1000_RXSTMPL);
 537        regval |= (u64)rd32(E1000_RXSTMPH) << 32;
 538
 539        igb_ptp_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), regval);
 540}
 541
 542/**
 543 * igb_ptp_hwtstamp_ioctl - control hardware time stamping
 544 * @netdev:
 545 * @ifreq:
 546 * @cmd:
 547 *
 548 * Outgoing time stamping can be enabled and disabled. Play nice and
 549 * disable it when requested, although it shouldn't case any overhead
 550 * when no packet needs it. At most one packet in the queue may be
 551 * marked for time stamping, otherwise it would be impossible to tell
 552 * for sure to which packet the hardware time stamp belongs.
 553 *
 554 * Incoming time stamping has to be configured via the hardware
 555 * filters. Not all combinations are supported, in particular event
 556 * type has to be specified. Matching the kind of event packet is
 557 * not supported, with the exception of "all V2 events regardless of
 558 * level 2 or 4".
 559 **/
 560int igb_ptp_hwtstamp_ioctl(struct net_device *netdev,
 561                           struct ifreq *ifr, int cmd)
 562{
 563        struct igb_adapter *adapter = netdev_priv(netdev);
 564        struct e1000_hw *hw = &adapter->hw;
 565        struct hwtstamp_config config;
 566        u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
 567        u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
 568        u32 tsync_rx_cfg = 0;
 569        bool is_l4 = false;
 570        bool is_l2 = false;
 571        u32 regval;
 572
 573        if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
 574                return -EFAULT;
 575
 576        /* reserved for future extensions */
 577        if (config.flags)
 578                return -EINVAL;
 579
 580        switch (config.tx_type) {
 581        case HWTSTAMP_TX_OFF:
 582                tsync_tx_ctl = 0;
 583        case HWTSTAMP_TX_ON:
 584                break;
 585        default:
 586                return -ERANGE;
 587        }
 588
 589        switch (config.rx_filter) {
 590        case HWTSTAMP_FILTER_NONE:
 591                tsync_rx_ctl = 0;
 592                break;
 593        case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
 594                tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
 595                tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V1_SYNC_MESSAGE;
 596                is_l4 = true;
 597                break;
 598        case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
 599                tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
 600                tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V1_DELAY_REQ_MESSAGE;
 601                is_l4 = true;
 602                break;
 603        case HWTSTAMP_FILTER_PTP_V2_EVENT:
 604        case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
 605        case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
 606        case HWTSTAMP_FILTER_PTP_V2_SYNC:
 607        case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
 608        case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
 609        case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
 610        case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
 611        case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
 612                tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
 613                config.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
 614                is_l2 = true;
 615                is_l4 = true;
 616                break;
 617        case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
 618        case HWTSTAMP_FILTER_ALL:
 619                /* 82576 cannot timestamp all packets, which it needs to do to
 620                 * support both V1 Sync and Delay_Req messages
 621                 */
 622                if (hw->mac.type != e1000_82576) {
 623                        tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
 624                        config.rx_filter = HWTSTAMP_FILTER_ALL;
 625                        break;
 626                }
 627                /* fall through */
 628        default:
 629                config.rx_filter = HWTSTAMP_FILTER_NONE;
 630                return -ERANGE;
 631        }
 632
 633        if (hw->mac.type == e1000_82575) {
 634                if (tsync_rx_ctl | tsync_tx_ctl)
 635                        return -EINVAL;
 636                return 0;
 637        }
 638
 639        /* Per-packet timestamping only works if all packets are
 640         * timestamped, so enable timestamping in all packets as
 641         * long as one Rx filter was configured.
 642         */
 643        if ((hw->mac.type >= e1000_82580) && tsync_rx_ctl) {
 644                tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
 645                tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
 646                config.rx_filter = HWTSTAMP_FILTER_ALL;
 647                is_l2 = true;
 648                is_l4 = true;
 649
 650                if ((hw->mac.type == e1000_i210) ||
 651                    (hw->mac.type == e1000_i211)) {
 652                        regval = rd32(E1000_RXPBS);
 653                        regval |= E1000_RXPBS_CFG_TS_EN;
 654                        wr32(E1000_RXPBS, regval);
 655                }
 656        }
 657
 658        /* enable/disable TX */
 659        regval = rd32(E1000_TSYNCTXCTL);
 660        regval &= ~E1000_TSYNCTXCTL_ENABLED;
 661        regval |= tsync_tx_ctl;
 662        wr32(E1000_TSYNCTXCTL, regval);
 663
 664        /* enable/disable RX */
 665        regval = rd32(E1000_TSYNCRXCTL);
 666        regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
 667        regval |= tsync_rx_ctl;
 668        wr32(E1000_TSYNCRXCTL, regval);
 669
 670        /* define which PTP packets are time stamped */
 671        wr32(E1000_TSYNCRXCFG, tsync_rx_cfg);
 672
 673        /* define ethertype filter for timestamped packets */
 674        if (is_l2)
 675                wr32(E1000_ETQF(3),
 676                     (E1000_ETQF_FILTER_ENABLE | /* enable filter */
 677                      E1000_ETQF_1588 | /* enable timestamping */
 678                      ETH_P_1588));     /* 1588 eth protocol type */
 679        else
 680                wr32(E1000_ETQF(3), 0);
 681
 682        /* L4 Queue Filter[3]: filter by destination port and protocol */
 683        if (is_l4) {
 684                u32 ftqf = (IPPROTO_UDP /* UDP */
 685                        | E1000_FTQF_VF_BP /* VF not compared */
 686                        | E1000_FTQF_1588_TIME_STAMP /* Enable Timestamping */
 687                        | E1000_FTQF_MASK); /* mask all inputs */
 688                ftqf &= ~E1000_FTQF_MASK_PROTO_BP; /* enable protocol check */
 689
 690                wr32(E1000_IMIR(3), htons(PTP_EV_PORT));
 691                wr32(E1000_IMIREXT(3),
 692                     (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_BP));
 693                if (hw->mac.type == e1000_82576) {
 694                        /* enable source port check */
 695                        wr32(E1000_SPQF(3), htons(PTP_EV_PORT));
 696                        ftqf &= ~E1000_FTQF_MASK_SOURCE_PORT_BP;
 697                }
 698                wr32(E1000_FTQF(3), ftqf);
 699        } else {
 700                wr32(E1000_FTQF(3), E1000_FTQF_MASK);
 701        }
 702        wrfl();
 703
 704        /* clear TX/RX time stamp registers, just to be sure */
 705        regval = rd32(E1000_TXSTMPL);
 706        regval = rd32(E1000_TXSTMPH);
 707        regval = rd32(E1000_RXSTMPL);
 708        regval = rd32(E1000_RXSTMPH);
 709
 710        return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
 711                -EFAULT : 0;
 712}
 713
 714void igb_ptp_init(struct igb_adapter *adapter)
 715{
 716        struct e1000_hw *hw = &adapter->hw;
 717        struct net_device *netdev = adapter->netdev;
 718
 719        switch (hw->mac.type) {
 720        case e1000_82576:
 721                snprintf(adapter->ptp_caps.name, 16, "%pm", netdev->dev_addr);
 722                adapter->ptp_caps.owner = THIS_MODULE;
 723                adapter->ptp_caps.max_adj = 999999881;
 724                adapter->ptp_caps.n_ext_ts = 0;
 725                adapter->ptp_caps.pps = 0;
 726                adapter->ptp_caps.adjfreq = igb_ptp_adjfreq_82576;
 727                adapter->ptp_caps.adjtime = igb_ptp_adjtime_82576;
 728                adapter->ptp_caps.gettime = igb_ptp_gettime_82576;
 729                adapter->ptp_caps.settime = igb_ptp_settime_82576;
 730                adapter->ptp_caps.enable = igb_ptp_enable;
 731                adapter->cc.read = igb_ptp_read_82576;
 732                adapter->cc.mask = CLOCKSOURCE_MASK(64);
 733                adapter->cc.mult = 1;
 734                adapter->cc.shift = IGB_82576_TSYNC_SHIFT;
 735                /* Dial the nominal frequency. */
 736                wr32(E1000_TIMINCA, INCPERIOD_82576 | INCVALUE_82576);
 737                break;
 738        case e1000_82580:
 739        case e1000_i354:
 740        case e1000_i350:
 741                snprintf(adapter->ptp_caps.name, 16, "%pm", netdev->dev_addr);
 742                adapter->ptp_caps.owner = THIS_MODULE;
 743                adapter->ptp_caps.max_adj = 62499999;
 744                adapter->ptp_caps.n_ext_ts = 0;
 745                adapter->ptp_caps.pps = 0;
 746                adapter->ptp_caps.adjfreq = igb_ptp_adjfreq_82580;
 747                adapter->ptp_caps.adjtime = igb_ptp_adjtime_82576;
 748                adapter->ptp_caps.gettime = igb_ptp_gettime_82576;
 749                adapter->ptp_caps.settime = igb_ptp_settime_82576;
 750                adapter->ptp_caps.enable = igb_ptp_enable;
 751                adapter->cc.read = igb_ptp_read_82580;
 752                adapter->cc.mask = CLOCKSOURCE_MASK(IGB_NBITS_82580);
 753                adapter->cc.mult = 1;
 754                adapter->cc.shift = 0;
 755                /* Enable the timer functions by clearing bit 31. */
 756                wr32(E1000_TSAUXC, 0x0);
 757                break;
 758        case e1000_i210:
 759        case e1000_i211:
 760                snprintf(adapter->ptp_caps.name, 16, "%pm", netdev->dev_addr);
 761                adapter->ptp_caps.owner = THIS_MODULE;
 762                adapter->ptp_caps.max_adj = 62499999;
 763                adapter->ptp_caps.n_ext_ts = 0;
 764                adapter->ptp_caps.pps = 0;
 765                adapter->ptp_caps.adjfreq = igb_ptp_adjfreq_82580;
 766                adapter->ptp_caps.adjtime = igb_ptp_adjtime_i210;
 767                adapter->ptp_caps.gettime = igb_ptp_gettime_i210;
 768                adapter->ptp_caps.settime = igb_ptp_settime_i210;
 769                adapter->ptp_caps.enable = igb_ptp_enable;
 770                /* Enable the timer functions by clearing bit 31. */
 771                wr32(E1000_TSAUXC, 0x0);
 772                break;
 773        default:
 774                adapter->ptp_clock = NULL;
 775                return;
 776        }
 777
 778        wrfl();
 779
 780        spin_lock_init(&adapter->tmreg_lock);
 781        INIT_WORK(&adapter->ptp_tx_work, igb_ptp_tx_work);
 782
 783        /* Initialize the clock and overflow work for devices that need it. */
 784        if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211)) {
 785                struct timespec ts = ktime_to_timespec(ktime_get_real());
 786
 787                igb_ptp_settime_i210(&adapter->ptp_caps, &ts);
 788        } else {
 789                timecounter_init(&adapter->tc, &adapter->cc,
 790                                 ktime_to_ns(ktime_get_real()));
 791
 792                INIT_DELAYED_WORK(&adapter->ptp_overflow_work,
 793                                  igb_ptp_overflow_check);
 794
 795                schedule_delayed_work(&adapter->ptp_overflow_work,
 796                                      IGB_SYSTIM_OVERFLOW_PERIOD);
 797        }
 798
 799        /* Initialize the time sync interrupts for devices that support it. */
 800        if (hw->mac.type >= e1000_82580) {
 801                wr32(E1000_TSIM, E1000_TSIM_TXTS);
 802                wr32(E1000_IMS, E1000_IMS_TS);
 803        }
 804
 805        adapter->ptp_clock = ptp_clock_register(&adapter->ptp_caps,
 806                                                &adapter->pdev->dev);
 807        if (IS_ERR(adapter->ptp_clock)) {
 808                adapter->ptp_clock = NULL;
 809                dev_err(&adapter->pdev->dev, "ptp_clock_register failed\n");
 810        } else {
 811                dev_info(&adapter->pdev->dev, "added PHC on %s\n",
 812                         adapter->netdev->name);
 813                adapter->flags |= IGB_FLAG_PTP;
 814        }
 815}
 816
 817/**
 818 * igb_ptp_stop - Disable PTP device and stop the overflow check.
 819 * @adapter: Board private structure.
 820 *
 821 * This function stops the PTP support and cancels the delayed work.
 822 **/
 823void igb_ptp_stop(struct igb_adapter *adapter)
 824{
 825        switch (adapter->hw.mac.type) {
 826        case e1000_82576:
 827        case e1000_82580:
 828        case e1000_i354:
 829        case e1000_i350:
 830                cancel_delayed_work_sync(&adapter->ptp_overflow_work);
 831                break;
 832        case e1000_i210:
 833        case e1000_i211:
 834                /* No delayed work to cancel. */
 835                break;
 836        default:
 837                return;
 838        }
 839
 840        cancel_work_sync(&adapter->ptp_tx_work);
 841        if (adapter->ptp_tx_skb) {
 842                dev_kfree_skb_any(adapter->ptp_tx_skb);
 843                adapter->ptp_tx_skb = NULL;
 844        }
 845
 846        if (adapter->ptp_clock) {
 847                ptp_clock_unregister(adapter->ptp_clock);
 848                dev_info(&adapter->pdev->dev, "removed PHC on %s\n",
 849                         adapter->netdev->name);
 850                adapter->flags &= ~IGB_FLAG_PTP;
 851        }
 852}
 853
 854/**
 855 * igb_ptp_reset - Re-enable the adapter for PTP following a reset.
 856 * @adapter: Board private structure.
 857 *
 858 * This function handles the reset work required to re-enable the PTP device.
 859 **/
 860void igb_ptp_reset(struct igb_adapter *adapter)
 861{
 862        struct e1000_hw *hw = &adapter->hw;
 863
 864        if (!(adapter->flags & IGB_FLAG_PTP))
 865                return;
 866
 867        switch (adapter->hw.mac.type) {
 868        case e1000_82576:
 869                /* Dial the nominal frequency. */
 870                wr32(E1000_TIMINCA, INCPERIOD_82576 | INCVALUE_82576);
 871                break;
 872        case e1000_82580:
 873        case e1000_i354:
 874        case e1000_i350:
 875        case e1000_i210:
 876        case e1000_i211:
 877                /* Enable the timer functions and interrupts. */
 878                wr32(E1000_TSAUXC, 0x0);
 879                wr32(E1000_TSIM, E1000_TSIM_TXTS);
 880                wr32(E1000_IMS, E1000_IMS_TS);
 881                break;
 882        default:
 883                /* No work to do. */
 884                return;
 885        }
 886
 887        /* Re-initialize the timer. */
 888        if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211)) {
 889                struct timespec ts = ktime_to_timespec(ktime_get_real());
 890
 891                igb_ptp_settime_i210(&adapter->ptp_caps, &ts);
 892        } else {
 893                timecounter_init(&adapter->tc, &adapter->cc,
 894                                 ktime_to_ns(ktime_get_real()));
 895        }
 896}
 897