1#ifndef _ASM_CRIS_SVINTO_H
2#define _ASM_CRIS_SVINTO_H
3
4#include <arch/sv_addr_ag.h>
5
6extern unsigned int genconfig_shadow;
7
8
9
10enum {
11 d_eol = (1 << 0),
12 d_eop = (1 << 1),
13 d_wait = (1 << 2),
14 d_int = (1 << 3),
15 d_txerr = (1 << 4),
16 d_stop = (1 << 4),
17 d_ecp = (1 << 4),
18 d_pri = (1 << 5),
19 d_alignerr = (1 << 6),
20 d_crcerr = (1 << 7)
21};
22
23
24
25
26
27
28
29
30typedef struct etrax_dma_descr {
31 unsigned short sw_len;
32 unsigned short ctrl;
33 unsigned long next;
34 unsigned long buf;
35 unsigned short hw_len;
36 unsigned char status;
37 unsigned char fifo_len;
38} etrax_dma_descr;
39
40
41
42#define RESET_DMA_NUM( n ) \
43 *R_DMA_CH##n##_CMD = IO_STATE( R_DMA_CH0_CMD, cmd, reset )
44
45
46
47
48#define RESET_DMA( n ) RESET_DMA_NUM( n )
49
50
51
52#define WAIT_DMA_NUM( n ) \
53 while( (*R_DMA_CH##n##_CMD & IO_MASK( R_DMA_CH0_CMD, cmd )) != \
54 IO_STATE( R_DMA_CH0_CMD, cmd, hold ) )
55
56
57
58
59#define WAIT_DMA( n ) WAIT_DMA_NUM( n )
60
61extern void prepare_rx_descriptor(struct etrax_dma_descr *desc);
62extern void flush_etrax_cache(void);
63
64#endif
65