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10#ifndef __ASM_MICROBLAZE_PCI_H
11#define __ASM_MICROBLAZE_PCI_H
12#ifdef __KERNEL__
13
14#include <linux/types.h>
15#include <linux/slab.h>
16#include <linux/string.h>
17#include <linux/dma-mapping.h>
18#include <linux/pci.h>
19
20#include <asm/scatterlist.h>
21#include <asm/io.h>
22#include <asm/prom.h>
23#include <asm/pci-bridge.h>
24
25#include <asm-generic/pci-dma-compat.h>
26
27#define PCIBIOS_MIN_IO 0x1000
28#define PCIBIOS_MIN_MEM 0x10000000
29
30struct pci_dev;
31
32
33#define IOBASE_BRIDGE_NUMBER 0
34#define IOBASE_MEMORY 1
35#define IOBASE_IO 2
36#define IOBASE_ISA_IO 3
37#define IOBASE_ISA_MEM 4
38
39#define pcibios_scan_all_fns(a, b) 0
40
41
42
43
44
45#define pcibios_assign_all_busses() 0
46
47static inline void pcibios_penalize_isa_irq(int irq, int active)
48{
49
50}
51
52#ifdef CONFIG_PCI
53extern void set_pci_dma_ops(struct dma_map_ops *dma_ops);
54extern struct dma_map_ops *get_pci_dma_ops(void);
55#else
56#define set_pci_dma_ops(d)
57#define get_pci_dma_ops() NULL
58#endif
59
60#ifdef CONFIG_PCI
61static inline void pci_dma_burst_advice(struct pci_dev *pdev,
62 enum pci_dma_burst_strategy *strat,
63 unsigned long *strategy_parameter)
64{
65 *strat = PCI_DMA_BURST_INFINITY;
66 *strategy_parameter = ~0UL;
67}
68#endif
69
70extern int pci_domain_nr(struct pci_bus *bus);
71
72
73extern int pci_proc_domain(struct pci_bus *bus);
74
75struct vm_area_struct;
76
77int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
78 enum pci_mmap_state mmap_state, int write_combine);
79
80
81#define HAVE_PCI_MMAP 1
82
83extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val,
84 size_t count);
85extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val,
86 size_t count);
87extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
88 struct vm_area_struct *vma,
89 enum pci_mmap_state mmap_state);
90
91#define HAVE_PCI_LEGACY 1
92
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95
96
97#define PCI_DMA_BUS_IS_PHYS (1)
98
99static inline struct resource *pcibios_select_root(struct pci_dev *pdev,
100 struct resource *res)
101{
102 struct resource *root = NULL;
103
104 if (res->flags & IORESOURCE_IO)
105 root = &ioport_resource;
106 if (res->flags & IORESOURCE_MEM)
107 root = &iomem_resource;
108
109 return root;
110}
111
112extern void pcibios_claim_one_bus(struct pci_bus *b);
113
114extern void pcibios_finish_adding_to_bus(struct pci_bus *bus);
115
116extern void pcibios_resource_survey(void);
117
118extern struct pci_controller *init_phb_dynamic(struct device_node *dn);
119extern int remove_phb_dynamic(struct pci_controller *phb);
120
121extern struct pci_dev *of_create_pci_dev(struct device_node *node,
122 struct pci_bus *bus, int devfn);
123
124extern void of_scan_pci_bridge(struct device_node *node,
125 struct pci_dev *dev);
126
127extern void of_scan_bus(struct device_node *node, struct pci_bus *bus);
128extern void of_rescan_bus(struct device_node *node, struct pci_bus *bus);
129
130extern int pci_bus_find_capability(struct pci_bus *bus,
131 unsigned int devfn, int cap);
132
133struct file;
134extern pgprot_t pci_phys_mem_access_prot(struct file *file,
135 unsigned long pfn,
136 unsigned long size,
137 pgprot_t prot);
138
139#define HAVE_ARCH_PCI_RESOURCE_TO_USER
140extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
141 const struct resource *rsrc,
142 resource_size_t *start, resource_size_t *end);
143
144extern void pcibios_setup_bus_devices(struct pci_bus *bus);
145extern void pcibios_setup_bus_self(struct pci_bus *bus);
146
147
148#ifdef CONFIG_PCI_XILINX
149extern void __init xilinx_pci_init(void);
150#else
151static inline void __init xilinx_pci_init(void) { return; }
152#endif
153
154#endif
155#endif
156