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10#include <linux/kernel.h>
11
12typedef void __iomem *virt_addr_t;
13
14#define CYCLE_DELAY 5
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19
20
21#define osp_MicroDelay(microsec) {unsigned long useconds = (microsec); \
22 udelay((useconds));}
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31
32
33
34#define CS_HIGH 0x0002
35#define CS_LOW 0x0000
36#define CLK_HIGH 0x0004
37#define CLK_LOW 0x0000
38#define SI_HIGH 0x0001
39#define SI_LOW 0x0000
40
41
42#if 0
43static u_int32_t rdsrtab[] = {
44 CS_HIGH | CLK_HIGH,
45 CS_LOW | CLK_LOW,
46 CLK_HIGH,
47 CLK_LOW,
48 CLK_HIGH,
49 CLK_LOW,
50 CLK_HIGH,
51 CLK_LOW,
52 CLK_HIGH,
53 CLK_LOW,
54 CLK_HIGH,
55 CLK_LOW | SI_HIGH,
56 CLK_HIGH | SI_HIGH,
57 CLK_LOW | SI_LOW,
58 CLK_HIGH,
59 CLK_LOW | SI_HIGH,
60 CLK_HIGH | SI_HIGH
61};
62#endif
63
64
65static u_int32_t readtab[] = {
66
67
68
69 CS_LOW | CLK_LOW,
70 CLK_HIGH,
71 CLK_LOW,
72 CLK_HIGH,
73 CLK_LOW,
74 CLK_HIGH,
75 CLK_LOW,
76 CLK_HIGH,
77 CLK_LOW,
78 CLK_HIGH,
79 CLK_LOW,
80 CLK_HIGH,
81 CLK_LOW | SI_HIGH,
82 CLK_HIGH | SI_HIGH,
83 CLK_LOW | SI_HIGH,
84 CLK_HIGH | SI_HIGH
85};
86
87
88static u_int32_t clocktab[] = {
89 CLK_LOW,
90 CLK_HIGH,
91 CLK_LOW,
92 CLK_HIGH,
93 CLK_LOW,
94 CLK_HIGH,
95 CLK_LOW,
96 CLK_HIGH,
97 CLK_LOW,
98 CLK_HIGH,
99 CLK_LOW,
100 CLK_HIGH,
101 CLK_LOW,
102 CLK_HIGH,
103 CLK_LOW,
104 CLK_HIGH,
105 CLK_LOW
106};
107
108#define NICSTAR_REG_WRITE(bs, reg, val) \
109 while ( readl(bs + STAT) & 0x0200 ) ; \
110 writel((val),(base)+(reg))
111#define NICSTAR_REG_READ(bs, reg) \
112 readl((base)+(reg))
113#define NICSTAR_REG_GENERAL_PURPOSE GP
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115
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117
118
119
120#if 0
121u_int32_t nicstar_read_eprom_status(virt_addr_t base)
122{
123 u_int32_t val;
124 u_int32_t rbyte;
125 int32_t i, j;
126
127
128 val = NICSTAR_REG_READ(base, NICSTAR_REG_GENERAL_PURPOSE) & 0xFFFFFFF0;
129
130 for (i = 0; i < ARRAY_SIZE(rdsrtab); i++) {
131 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
132 (val | rdsrtab[i]));
133 osp_MicroDelay(CYCLE_DELAY);
134 }
135
136
137
138
139 rbyte = 0;
140 for (i = 7, j = 0; i >= 0; i--) {
141 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
142 (val | clocktab[j++]));
143 rbyte |= (((NICSTAR_REG_READ(base, NICSTAR_REG_GENERAL_PURPOSE)
144 & 0x00010000) >> 16) << i);
145 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
146 (val | clocktab[j++]));
147 osp_MicroDelay(CYCLE_DELAY);
148 }
149 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE, 2);
150 osp_MicroDelay(CYCLE_DELAY);
151 return rbyte;
152}
153#endif
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159
160
161static u_int8_t read_eprom_byte(virt_addr_t base, u_int8_t offset)
162{
163 u_int32_t val = 0;
164 int i, j = 0;
165 u_int8_t tempread = 0;
166
167 val = NICSTAR_REG_READ(base, NICSTAR_REG_GENERAL_PURPOSE) & 0xFFFFFFF0;
168
169
170 for (i = 0; i < ARRAY_SIZE(readtab); i++) {
171 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
172 (val | readtab[i]));
173 osp_MicroDelay(CYCLE_DELAY);
174 }
175
176
177 for (i = 7; i >= 0; i--) {
178 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
179 (val | clocktab[j++] | ((offset >> i) & 1)));
180 osp_MicroDelay(CYCLE_DELAY);
181 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
182 (val | clocktab[j++] | ((offset >> i) & 1)));
183 osp_MicroDelay(CYCLE_DELAY);
184 }
185
186 j = 0;
187
188
189 for (i = 7; i >= 0; i--) {
190 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
191 (val | clocktab[j++]));
192 osp_MicroDelay(CYCLE_DELAY);
193 tempread |=
194 (((NICSTAR_REG_READ(base, NICSTAR_REG_GENERAL_PURPOSE)
195 & 0x00010000) >> 16) << i);
196 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
197 (val | clocktab[j++]));
198 osp_MicroDelay(CYCLE_DELAY);
199 }
200
201 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE, 2);
202 osp_MicroDelay(CYCLE_DELAY);
203 return tempread;
204}
205
206static void nicstar_init_eprom(virt_addr_t base)
207{
208 u_int32_t val;
209
210
211
212
213 val = NICSTAR_REG_READ(base, NICSTAR_REG_GENERAL_PURPOSE) & 0xFFFFFFF0;
214
215 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
216 (val | CS_HIGH | CLK_HIGH));
217 osp_MicroDelay(CYCLE_DELAY);
218
219 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
220 (val | CS_HIGH | CLK_LOW));
221 osp_MicroDelay(CYCLE_DELAY);
222
223 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
224 (val | CS_HIGH | CLK_HIGH));
225 osp_MicroDelay(CYCLE_DELAY);
226
227 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
228 (val | CS_HIGH | CLK_LOW));
229 osp_MicroDelay(CYCLE_DELAY);
230}
231
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234
235
236
237static void
238nicstar_read_eprom(virt_addr_t base,
239 u_int8_t prom_offset, u_int8_t * buffer, u_int32_t nbytes)
240{
241 u_int i;
242
243 for (i = 0; i < nbytes; i++) {
244 buffer[i] = read_eprom_byte(base, prom_offset);
245 ++prom_offset;
246 osp_MicroDelay(CYCLE_DELAY);
247 }
248}
249