LXR linux/drivers/gpu/drm/nouveau/core/subdev/bus/nv04.c

   1/*
   2 * Copyright 2012 Nouveau Community
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: Martin Peres <martin.peres@labri.fr>
  23 *          Ben Skeggs
  24 */
  25
  26#include "nv04.h"
  27
  28static void
  29nv04_bus_intr(struct nouveau_subdev *subdev)
  30{
  31        struct nouveau_bus *pbus = nouveau_bus(subdev);
  32        u32 stat = nv_rd32(pbus, 0x001100) & nv_rd32(pbus, 0x001140);
  33
  34        if (stat & 0x00000001) {
  35                nv_error(pbus, "BUS ERROR\n");
  36                stat &= ~0x00000001;
  37                nv_wr32(pbus, 0x001100, 0x00000001);
  38        }
  39
  40        if (stat & 0x00000110) {
  41                subdev = nouveau_subdev(subdev, NVDEV_SUBDEV_GPIO);
  42                if (subdev && subdev->intr)
  43                        subdev->intr(subdev);
  44                stat &= ~0x00000110;
  45                nv_wr32(pbus, 0x001100, 0x00000110);
  46        }
  47
  48        if (stat) {
  49                nv_error(pbus, "unknown intr 0x%08x\n", stat);
  50                nv_mask(pbus, 0x001140, stat, 0x00000000);
  51        }
  52}
  53
  54static int
  55nv04_bus_init(struct nouveau_object *object)
  56{
  57        struct nv04_bus_priv *priv = (void *)object;
  58
  59        nv_wr32(priv, 0x001100, 0xffffffff);
  60        nv_wr32(priv, 0x001140, 0x00000111);
  61
  62        return nouveau_bus_init(&priv->base);
  63}
  64
  65int
  66nv04_bus_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
  67              struct nouveau_oclass *oclass, void *data, u32 size,
  68              struct nouveau_object **pobject)
  69{
  70        struct nv04_bus_impl *impl = (void *)oclass;
  71        struct nv04_bus_priv *priv;
  72        int ret;
  73
  74        ret = nouveau_bus_create(parent, engine, oclass, &priv);
  75        *pobject = nv_object(priv);
  76        if (ret)
  77                return ret;
  78
  79        nv_subdev(priv)->intr = impl->intr;
  80        priv->base.hwsq_exec = impl->hwsq_exec;
  81        priv->base.hwsq_size = impl->hwsq_size;
  82        return 0;
  83}
  84
  85struct nouveau_oclass *
  86nv04_bus_oclass = &(struct nv04_bus_impl) {
  87        .base.handle = NV_SUBDEV(BUS, 0x04),
  88        .base.ofuncs = &(struct nouveau_ofuncs) {
  89                .ctor = nv04_bus_ctor,
  90                .dtor = _nouveau_bus_dtor,
  91                .init = nv04_bus_init,
  92                .fini = _nouveau_bus_fini,
  93        },
  94        .intr = nv04_bus_intr,
  95}.base;
  96