1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22#include <linux/i2c.h>
23#include <linux/i2c-algo-bit.h>
24#include <linux/init.h>
25#include <linux/interrupt.h>
26#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/proc_fs.h>
29#include <linux/pci.h>
30#include <linux/dma-mapping.h>
31#include <linux/slab.h>
32#include <media/rc-core.h>
33
34#include "demux.h"
35#include "dmxdev.h"
36#include "dvb_demux.h"
37#include "dvb_frontend.h"
38#include "dvb_net.h"
39#include "dvbdev.h"
40#include "dvb-pll.h"
41
42#include "stv0299.h"
43#include "stv0288.h"
44#include "stb6000.h"
45#include "si21xx.h"
46#include "cx24116.h"
47#include "z0194a.h"
48#include "ts2020.h"
49#include "ds3000.h"
50
51#define MODULE_NAME "dm1105"
52
53#define UNSET (-1U)
54
55#define DM1105_BOARD_NOAUTO UNSET
56#define DM1105_BOARD_UNKNOWN 0
57#define DM1105_BOARD_DVBWORLD_2002 1
58#define DM1105_BOARD_DVBWORLD_2004 2
59#define DM1105_BOARD_AXESS_DM05 3
60#define DM1105_BOARD_UNBRANDED_I2C_ON_GPIO 4
61
62
63
64
65
66#ifndef PCI_VENDOR_ID_TRIGEM
67#define PCI_VENDOR_ID_TRIGEM 0x109f
68#endif
69#ifndef PCI_VENDOR_ID_AXESS
70#define PCI_VENDOR_ID_AXESS 0x195d
71#endif
72#ifndef PCI_DEVICE_ID_DM1105
73#define PCI_DEVICE_ID_DM1105 0x036f
74#endif
75#ifndef PCI_DEVICE_ID_DW2002
76#define PCI_DEVICE_ID_DW2002 0x2002
77#endif
78#ifndef PCI_DEVICE_ID_DW2004
79#define PCI_DEVICE_ID_DW2004 0x2004
80#endif
81#ifndef PCI_DEVICE_ID_DM05
82#define PCI_DEVICE_ID_DM05 0x1105
83#endif
84
85
86
87
88#define DM1105_TSCTR 0x00
89#define DM1105_DTALENTH 0x04
90
91
92#define DM1105_GPIOVAL 0x08
93#define DM1105_GPIOCTR 0x0c
94
95
96#define DM1105_PIDN 0x10
97
98
99#define DM1105_CWSEL 0x14
100
101
102#define DM1105_HOST_CTR 0x18
103#define DM1105_HOST_AD 0x1c
104
105
106#define DM1105_CR 0x30
107#define DM1105_RST 0x34
108#define DM1105_STADR 0x38
109#define DM1105_RLEN 0x3c
110#define DM1105_WRP 0x40
111#define DM1105_INTCNT 0x44
112#define DM1105_INTMAK 0x48
113#define DM1105_INTSTS 0x4c
114
115
116#define DM1105_ODD 0x50
117#define DM1105_EVEN 0x58
118
119
120#define DM1105_PID 0x60
121
122
123#define DM1105_IRCTR 0x64
124#define DM1105_IRMODE 0x68
125#define DM1105_SYSTEMCODE 0x6c
126#define DM1105_IRCODE 0x70
127
128
129#define DM1105_ENCRYPT 0x74
130#define DM1105_VER 0x7c
131
132
133#define DM1105_I2CCTR 0x80
134#define DM1105_I2CSTS 0x81
135#define DM1105_I2CDAT 0x82
136#define DM1105_I2C_RA 0x83
137
138
139
140#define INTMAK_TSIRQM 0x01
141#define INTMAK_HIRQM 0x04
142#define INTMAK_IRM 0x08
143#define INTMAK_ALLMASK (INTMAK_TSIRQM | \
144 INTMAK_HIRQM | \
145 INTMAK_IRM)
146#define INTMAK_NONEMASK 0x00
147
148
149#define INTSTS_TSIRQ 0x01
150#define INTSTS_HIRQ 0x04
151#define INTSTS_IR 0x08
152
153
154#define DM1105_IR_EN 0x01
155#define DM1105_SYS_CHK 0x02
156#define DM1105_REP_FLG 0x08
157
158
159#define IIC_24C01_addr 0xa0
160
161#define DM1105_MAX 0x04
162
163#define DRIVER_NAME "dm1105"
164#define DM1105_I2C_GPIO_NAME "dm1105-gpio"
165
166#define DM1105_DMA_PACKETS 47
167#define DM1105_DMA_PACKET_LENGTH (128*4)
168#define DM1105_DMA_BYTES (128 * 4 * DM1105_DMA_PACKETS)
169
170
171#define GPIO08 (1 << 8)
172#define GPIO13 (1 << 13)
173#define GPIO14 (1 << 14)
174#define GPIO15 (1 << 15)
175#define GPIO16 (1 << 16)
176#define GPIO17 (1 << 17)
177#define GPIO_ALL 0x03ffff
178
179
180#define DM1105_LNB_MASK (GPIO_ALL & ~(GPIO14 | GPIO13))
181#define DM1105_LNB_OFF GPIO17
182#define DM1105_LNB_13V (GPIO16 | GPIO08)
183#define DM1105_LNB_18V GPIO08
184
185
186#define DM05_LNB_MASK (GPIO_ALL & ~(GPIO14 | GPIO13))
187#define DM05_LNB_OFF GPIO17
188#define DM05_LNB_13V GPIO17
189#define DM05_LNB_18V (GPIO17 | GPIO16)
190
191
192#define UNBR_LNB_MASK (GPIO17 | GPIO16)
193#define UNBR_LNB_OFF 0
194#define UNBR_LNB_13V GPIO17
195#define UNBR_LNB_18V (GPIO17 | GPIO16)
196
197static unsigned int card[] = {[0 ... 3] = UNSET };
198module_param_array(card, int, NULL, 0444);
199MODULE_PARM_DESC(card, "card type");
200
201static int ir_debug;
202module_param(ir_debug, int, 0644);
203MODULE_PARM_DESC(ir_debug, "enable debugging information for IR decoding");
204
205static unsigned int dm1105_devcount;
206
207DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
208
209struct dm1105_board {
210 char *name;
211 struct {
212 u32 mask, off, v13, v18;
213 } lnb;
214 u32 gpio_scl, gpio_sda;
215};
216
217struct dm1105_subid {
218 u16 subvendor;
219 u16 subdevice;
220 u32 card;
221};
222
223static const struct dm1105_board dm1105_boards[] = {
224 [DM1105_BOARD_UNKNOWN] = {
225 .name = "UNKNOWN/GENERIC",
226 .lnb = {
227 .mask = DM1105_LNB_MASK,
228 .off = DM1105_LNB_OFF,
229 .v13 = DM1105_LNB_13V,
230 .v18 = DM1105_LNB_18V,
231 },
232 },
233 [DM1105_BOARD_DVBWORLD_2002] = {
234 .name = "DVBWorld PCI 2002",
235 .lnb = {
236 .mask = DM1105_LNB_MASK,
237 .off = DM1105_LNB_OFF,
238 .v13 = DM1105_LNB_13V,
239 .v18 = DM1105_LNB_18V,
240 },
241 },
242 [DM1105_BOARD_DVBWORLD_2004] = {
243 .name = "DVBWorld PCI 2004",
244 .lnb = {
245 .mask = DM1105_LNB_MASK,
246 .off = DM1105_LNB_OFF,
247 .v13 = DM1105_LNB_13V,
248 .v18 = DM1105_LNB_18V,
249 },
250 },
251 [DM1105_BOARD_AXESS_DM05] = {
252 .name = "Axess/EasyTv DM05",
253 .lnb = {
254 .mask = DM05_LNB_MASK,
255 .off = DM05_LNB_OFF,
256 .v13 = DM05_LNB_13V,
257 .v18 = DM05_LNB_18V,
258 },
259 },
260 [DM1105_BOARD_UNBRANDED_I2C_ON_GPIO] = {
261 .name = "Unbranded DM1105 with i2c on GPIOs",
262 .lnb = {
263 .mask = UNBR_LNB_MASK,
264 .off = UNBR_LNB_OFF,
265 .v13 = UNBR_LNB_13V,
266 .v18 = UNBR_LNB_18V,
267 },
268 .gpio_scl = GPIO14,
269 .gpio_sda = GPIO13,
270 },
271};
272
273static const struct dm1105_subid dm1105_subids[] = {
274 {
275 .subvendor = 0x0000,
276 .subdevice = 0x2002,
277 .card = DM1105_BOARD_DVBWORLD_2002,
278 }, {
279 .subvendor = 0x0001,
280 .subdevice = 0x2002,
281 .card = DM1105_BOARD_DVBWORLD_2002,
282 }, {
283 .subvendor = 0x0000,
284 .subdevice = 0x2004,
285 .card = DM1105_BOARD_DVBWORLD_2004,
286 }, {
287 .subvendor = 0x0001,
288 .subdevice = 0x2004,
289 .card = DM1105_BOARD_DVBWORLD_2004,
290 }, {
291 .subvendor = 0x195d,
292 .subdevice = 0x1105,
293 .card = DM1105_BOARD_AXESS_DM05,
294 },
295};
296
297static void dm1105_card_list(struct pci_dev *pci)
298{
299 int i;
300
301 if (0 == pci->subsystem_vendor &&
302 0 == pci->subsystem_device) {
303 printk(KERN_ERR
304 "dm1105: Your board has no valid PCI Subsystem ID\n"
305 "dm1105: and thus can't be autodetected\n"
306 "dm1105: Please pass card=<n> insmod option to\n"
307 "dm1105: workaround that. Redirect complaints to\n"
308 "dm1105: the vendor of the TV card. Best regards,\n"
309 "dm1105: -- tux\n");
310 } else {
311 printk(KERN_ERR
312 "dm1105: Your board isn't known (yet) to the driver.\n"
313 "dm1105: You can try to pick one of the existing\n"
314 "dm1105: card configs via card=<n> insmod option.\n"
315 "dm1105: Updating to the latest version might help\n"
316 "dm1105: as well.\n");
317 }
318 printk(KERN_ERR "Here is a list of valid choices for the card=<n> "
319 "insmod option:\n");
320 for (i = 0; i < ARRAY_SIZE(dm1105_boards); i++)
321 printk(KERN_ERR "dm1105: card=%d -> %s\n",
322 i, dm1105_boards[i].name);
323}
324
325
326struct infrared {
327 struct rc_dev *dev;
328 char input_phys[32];
329 struct work_struct work;
330 u32 ir_command;
331};
332
333struct dm1105_dev {
334
335 struct pci_dev *pdev;
336 u8 __iomem *io_mem;
337
338
339 struct infrared ir;
340
341
342 struct dmx_frontend hw_frontend;
343 struct dmx_frontend mem_frontend;
344 struct dmxdev dmxdev;
345 struct dvb_adapter dvb_adapter;
346 struct dvb_demux demux;
347 struct dvb_frontend *fe;
348 struct dvb_net dvbnet;
349 unsigned int full_ts_users;
350 unsigned int boardnr;
351 int nr;
352
353
354 struct i2c_adapter i2c_adap;
355 struct i2c_adapter i2c_bb_adap;
356 struct i2c_algo_bit_data i2c_bit;
357
358
359 struct work_struct work;
360 struct workqueue_struct *wq;
361 char wqn[16];
362
363
364 dma_addr_t dma_addr;
365 unsigned char *ts_buf;
366 u32 wrp;
367 u32 nextwrp;
368 u32 buffer_size;
369 unsigned int PacketErrorCount;
370 unsigned int dmarst;
371 spinlock_t lock;
372};
373
374#define dm_io_mem(reg) ((unsigned long)(&dev->io_mem[reg]))
375
376#define dm_readb(reg) inb(dm_io_mem(reg))
377#define dm_writeb(reg, value) outb((value), (dm_io_mem(reg)))
378
379#define dm_readw(reg) inw(dm_io_mem(reg))
380#define dm_writew(reg, value) outw((value), (dm_io_mem(reg)))
381
382#define dm_readl(reg) inl(dm_io_mem(reg))
383#define dm_writel(reg, value) outl((value), (dm_io_mem(reg)))
384
385#define dm_andorl(reg, mask, value) \
386 outl((inl(dm_io_mem(reg)) & ~(mask)) |\
387 ((value) & (mask)), (dm_io_mem(reg)))
388
389#define dm_setl(reg, bit) dm_andorl((reg), (bit), (bit))
390#define dm_clearl(reg, bit) dm_andorl((reg), (bit), 0)
391
392
393
394
395
396static void dm1105_gpio_set(struct dm1105_dev *dev, u32 mask)
397{
398 if (mask & 0xfffc0000)
399 printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
400
401 if (mask & 0x0003ffff)
402 dm_setl(DM1105_GPIOVAL, mask & 0x0003ffff);
403
404}
405
406static void dm1105_gpio_clear(struct dm1105_dev *dev, u32 mask)
407{
408 if (mask & 0xfffc0000)
409 printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
410
411 if (mask & 0x0003ffff)
412 dm_clearl(DM1105_GPIOVAL, mask & 0x0003ffff);
413
414}
415
416static void dm1105_gpio_andor(struct dm1105_dev *dev, u32 mask, u32 val)
417{
418 if (mask & 0xfffc0000)
419 printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
420
421 if (mask & 0x0003ffff)
422 dm_andorl(DM1105_GPIOVAL, mask & 0x0003ffff, val);
423
424}
425
426static u32 dm1105_gpio_get(struct dm1105_dev *dev, u32 mask)
427{
428 if (mask & 0xfffc0000)
429 printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
430
431 if (mask & 0x0003ffff)
432 return dm_readl(DM1105_GPIOVAL) & mask & 0x0003ffff;
433
434 return 0;
435}
436
437static void dm1105_gpio_enable(struct dm1105_dev *dev, u32 mask, int asoutput)
438{
439 if (mask & 0xfffc0000)
440 printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
441
442 if ((mask & 0x0003ffff) && asoutput)
443 dm_clearl(DM1105_GPIOCTR, mask & 0x0003ffff);
444 else if ((mask & 0x0003ffff) && !asoutput)
445 dm_setl(DM1105_GPIOCTR, mask & 0x0003ffff);
446
447}
448
449static void dm1105_setline(struct dm1105_dev *dev, u32 line, int state)
450{
451 if (state)
452 dm1105_gpio_enable(dev, line, 0);
453 else {
454 dm1105_gpio_enable(dev, line, 1);
455 dm1105_gpio_clear(dev, line);
456 }
457}
458
459static void dm1105_setsda(void *data, int state)
460{
461 struct dm1105_dev *dev = data;
462
463 dm1105_setline(dev, dm1105_boards[dev->boardnr].gpio_sda, state);
464}
465
466static void dm1105_setscl(void *data, int state)
467{
468 struct dm1105_dev *dev = data;
469
470 dm1105_setline(dev, dm1105_boards[dev->boardnr].gpio_scl, state);
471}
472
473static int dm1105_getsda(void *data)
474{
475 struct dm1105_dev *dev = data;
476
477 return dm1105_gpio_get(dev, dm1105_boards[dev->boardnr].gpio_sda)
478 ? 1 : 0;
479}
480
481static int dm1105_getscl(void *data)
482{
483 struct dm1105_dev *dev = data;
484
485 return dm1105_gpio_get(dev, dm1105_boards[dev->boardnr].gpio_scl)
486 ? 1 : 0;
487}
488
489static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap,
490 struct i2c_msg *msgs, int num)
491{
492 struct dm1105_dev *dev ;
493
494 int addr, rc, i, j, k, len, byte, data;
495 u8 status;
496
497 dev = i2c_adap->algo_data;
498 for (i = 0; i < num; i++) {
499 dm_writeb(DM1105_I2CCTR, 0x00);
500 if (msgs[i].flags & I2C_M_RD) {
501
502 addr = msgs[i].addr << 1;
503 addr |= 1;
504 dm_writeb(DM1105_I2CDAT, addr);
505 for (byte = 0; byte < msgs[i].len; byte++)
506 dm_writeb(DM1105_I2CDAT + byte + 1, 0);
507
508 dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
509 for (j = 0; j < 55; j++) {
510 mdelay(10);
511 status = dm_readb(DM1105_I2CSTS);
512 if ((status & 0xc0) == 0x40)
513 break;
514 }
515 if (j >= 55)
516 return -1;
517
518 for (byte = 0; byte < msgs[i].len; byte++) {
519 rc = dm_readb(DM1105_I2CDAT + byte + 1);
520 if (rc < 0)
521 goto err;
522 msgs[i].buf[byte] = rc;
523 }
524 } else if ((msgs[i].buf[0] == 0xf7) && (msgs[i].addr == 0x55)) {
525
526
527 len = msgs[i].len - 1;
528 k = 1;
529 do {
530 dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
531 dm_writeb(DM1105_I2CDAT + 1, 0xf7);
532 for (byte = 0; byte < (len > 48 ? 48 : len); byte++) {
533 data = msgs[i].buf[k + byte];
534 dm_writeb(DM1105_I2CDAT + byte + 2, data);
535 }
536 dm_writeb(DM1105_I2CCTR, 0x82 + (len > 48 ? 48 : len));
537 for (j = 0; j < 25; j++) {
538 mdelay(10);
539 status = dm_readb(DM1105_I2CSTS);
540 if ((status & 0xc0) == 0x40)
541 break;
542 }
543
544 if (j >= 25)
545 return -1;
546
547 k += 48;
548 len -= 48;
549 } while (len > 0);
550 } else {
551
552 dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
553 for (byte = 0; byte < msgs[i].len; byte++) {
554 data = msgs[i].buf[byte];
555 dm_writeb(DM1105_I2CDAT + byte + 1, data);
556 }
557 dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
558 for (j = 0; j < 25; j++) {
559 mdelay(10);
560 status = dm_readb(DM1105_I2CSTS);
561 if ((status & 0xc0) == 0x40)
562 break;
563 }
564
565 if (j >= 25)
566 return -1;
567 }
568 }
569 return num;
570 err:
571 return rc;
572}
573
574static u32 functionality(struct i2c_adapter *adap)
575{
576 return I2C_FUNC_I2C;
577}
578
579static struct i2c_algorithm dm1105_algo = {
580 .master_xfer = dm1105_i2c_xfer,
581 .functionality = functionality,
582};
583
584static inline struct dm1105_dev *feed_to_dm1105_dev(struct dvb_demux_feed *feed)
585{
586 return container_of(feed->demux, struct dm1105_dev, demux);
587}
588
589static inline struct dm1105_dev *frontend_to_dm1105_dev(struct dvb_frontend *fe)
590{
591 return container_of(fe->dvb, struct dm1105_dev, dvb_adapter);
592}
593
594static int dm1105_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
595{
596 struct dm1105_dev *dev = frontend_to_dm1105_dev(fe);
597
598 dm1105_gpio_enable(dev, dm1105_boards[dev->boardnr].lnb.mask, 1);
599 if (voltage == SEC_VOLTAGE_18)
600 dm1105_gpio_andor(dev,
601 dm1105_boards[dev->boardnr].lnb.mask,
602 dm1105_boards[dev->boardnr].lnb.v18);
603 else if (voltage == SEC_VOLTAGE_13)
604 dm1105_gpio_andor(dev,
605 dm1105_boards[dev->boardnr].lnb.mask,
606 dm1105_boards[dev->boardnr].lnb.v13);
607 else
608 dm1105_gpio_andor(dev,
609 dm1105_boards[dev->boardnr].lnb.mask,
610 dm1105_boards[dev->boardnr].lnb.off);
611
612 return 0;
613}
614
615static void dm1105_set_dma_addr(struct dm1105_dev *dev)
616{
617 dm_writel(DM1105_STADR, cpu_to_le32(dev->dma_addr));
618}
619
620static int dm1105_dma_map(struct dm1105_dev *dev)
621{
622 dev->ts_buf = pci_alloc_consistent(dev->pdev,
623 6 * DM1105_DMA_BYTES,
624 &dev->dma_addr);
625
626 return !dev->ts_buf;
627}
628
629static void dm1105_dma_unmap(struct dm1105_dev *dev)
630{
631 pci_free_consistent(dev->pdev,
632 6 * DM1105_DMA_BYTES,
633 dev->ts_buf,
634 dev->dma_addr);
635}
636
637static void dm1105_enable_irqs(struct dm1105_dev *dev)
638{
639 dm_writeb(DM1105_INTMAK, INTMAK_ALLMASK);
640 dm_writeb(DM1105_CR, 1);
641}
642
643static void dm1105_disable_irqs(struct dm1105_dev *dev)
644{
645 dm_writeb(DM1105_INTMAK, INTMAK_IRM);
646 dm_writeb(DM1105_CR, 0);
647}
648
649static int dm1105_start_feed(struct dvb_demux_feed *f)
650{
651 struct dm1105_dev *dev = feed_to_dm1105_dev(f);
652
653 if (dev->full_ts_users++ == 0)
654 dm1105_enable_irqs(dev);
655
656 return 0;
657}
658
659static int dm1105_stop_feed(struct dvb_demux_feed *f)
660{
661 struct dm1105_dev *dev = feed_to_dm1105_dev(f);
662
663 if (--dev->full_ts_users == 0)
664 dm1105_disable_irqs(dev);
665
666 return 0;
667}
668
669
670static void dm1105_emit_key(struct work_struct *work)
671{
672 struct infrared *ir = container_of(work, struct infrared, work);
673 u32 ircom = ir->ir_command;
674 u8 data;
675
676 if (ir_debug)
677 printk(KERN_INFO "%s: received byte 0x%04x\n", __func__, ircom);
678
679 data = (ircom >> 8) & 0x7f;
680
681 rc_keydown(ir->dev, data, 0);
682}
683
684
685static void dm1105_dmx_buffer(struct work_struct *work)
686{
687 struct dm1105_dev *dev = container_of(work, struct dm1105_dev, work);
688 unsigned int nbpackets;
689 u32 oldwrp = dev->wrp;
690 u32 nextwrp = dev->nextwrp;
691
692 if (!((dev->ts_buf[oldwrp] == 0x47) &&
693 (dev->ts_buf[oldwrp + 188] == 0x47) &&
694 (dev->ts_buf[oldwrp + 188 * 2] == 0x47))) {
695 dev->PacketErrorCount++;
696
697 if ((dev->PacketErrorCount >= 2) &&
698 (dev->dmarst == 0)) {
699 dm_writeb(DM1105_RST, 1);
700 dev->wrp = 0;
701 dev->PacketErrorCount = 0;
702 dev->dmarst = 0;
703 return;
704 }
705 }
706
707 if (nextwrp < oldwrp) {
708 memcpy(dev->ts_buf + dev->buffer_size, dev->ts_buf, nextwrp);
709 nbpackets = ((dev->buffer_size - oldwrp) + nextwrp) / 188;
710 } else
711 nbpackets = (nextwrp - oldwrp) / 188;
712
713 dev->wrp = nextwrp;
714 dvb_dmx_swfilter_packets(&dev->demux, &dev->ts_buf[oldwrp], nbpackets);
715}
716
717static irqreturn_t dm1105_irq(int irq, void *dev_id)
718{
719 struct dm1105_dev *dev = dev_id;
720
721
722 unsigned int intsts = dm_readb(DM1105_INTSTS);
723 dm_writeb(DM1105_INTSTS, intsts);
724
725 switch (intsts) {
726 case INTSTS_TSIRQ:
727 case (INTSTS_TSIRQ | INTSTS_IR):
728 dev->nextwrp = dm_readl(DM1105_WRP) - dm_readl(DM1105_STADR);
729 queue_work(dev->wq, &dev->work);
730 break;
731 case INTSTS_IR:
732 dev->ir.ir_command = dm_readl(DM1105_IRCODE);
733 schedule_work(&dev->ir.work);
734 break;
735 }
736
737 return IRQ_HANDLED;
738}
739
740static int dm1105_ir_init(struct dm1105_dev *dm1105)
741{
742 struct rc_dev *dev;
743 int err = -ENOMEM;
744
745 dev = rc_allocate_device();
746 if (!dev)
747 return -ENOMEM;
748
749 snprintf(dm1105->ir.input_phys, sizeof(dm1105->ir.input_phys),
750 "pci-%s/ir0", pci_name(dm1105->pdev));
751
752 dev->driver_name = MODULE_NAME;
753 dev->map_name = RC_MAP_DM1105_NEC;
754 dev->driver_type = RC_DRIVER_SCANCODE;
755 dev->input_name = "DVB on-card IR receiver";
756 dev->input_phys = dm1105->ir.input_phys;
757 dev->input_id.bustype = BUS_PCI;
758 dev->input_id.version = 1;
759 if (dm1105->pdev->subsystem_vendor) {
760 dev->input_id.vendor = dm1105->pdev->subsystem_vendor;
761 dev->input_id.product = dm1105->pdev->subsystem_device;
762 } else {
763 dev->input_id.vendor = dm1105->pdev->vendor;
764 dev->input_id.product = dm1105->pdev->device;
765 }
766 dev->dev.parent = &dm1105->pdev->dev;
767
768 INIT_WORK(&dm1105->ir.work, dm1105_emit_key);
769
770 err = rc_register_device(dev);
771 if (err < 0) {
772 rc_free_device(dev);
773 return err;
774 }
775
776 dm1105->ir.dev = dev;
777 return 0;
778}
779
780static void dm1105_ir_exit(struct dm1105_dev *dm1105)
781{
782 rc_unregister_device(dm1105->ir.dev);
783}
784
785static int dm1105_hw_init(struct dm1105_dev *dev)
786{
787 dm1105_disable_irqs(dev);
788
789 dm_writeb(DM1105_HOST_CTR, 0);
790
791
792 dm_writeb(DM1105_DTALENTH, 188);
793
794 dm_writew(DM1105_TSCTR, 0xc10a);
795
796
797 dm1105_dma_map(dev);
798 dm1105_set_dma_addr(dev);
799
800 dm_writel(DM1105_RLEN, 5 * DM1105_DMA_BYTES);
801 dm_writeb(DM1105_INTCNT, 47);
802
803
804 dm_writeb(DM1105_IRCTR, (DM1105_IR_EN | DM1105_SYS_CHK));
805 dm_writeb(DM1105_IRMODE, 0);
806 dm_writew(DM1105_SYSTEMCODE, 0);
807
808 return 0;
809}
810
811static void dm1105_hw_exit(struct dm1105_dev *dev)
812{
813 dm1105_disable_irqs(dev);
814
815
816 dm_writeb(DM1105_IRCTR, 0);
817 dm_writeb(DM1105_INTMAK, INTMAK_NONEMASK);
818
819 dm1105_dma_unmap(dev);
820}
821
822static struct stv0299_config sharp_z0194a_config = {
823 .demod_address = 0x68,
824 .inittab = sharp_z0194a_inittab,
825 .mclk = 88000000UL,
826 .invert = 1,
827 .skip_reinit = 0,
828 .lock_output = STV0299_LOCKOUTPUT_1,
829 .volt13_op0_op1 = STV0299_VOLT13_OP1,
830 .min_delay_ms = 100,
831 .set_symbol_rate = sharp_z0194a_set_symbol_rate,
832};
833
834static struct stv0288_config earda_config = {
835 .demod_address = 0x68,
836 .min_delay_ms = 100,
837};
838
839static struct si21xx_config serit_config = {
840 .demod_address = 0x68,
841 .min_delay_ms = 100,
842
843};
844
845static struct cx24116_config serit_sp2633_config = {
846 .demod_address = 0x55,
847};
848
849static struct ds3000_config dvbworld_ds3000_config = {
850 .demod_address = 0x68,
851};
852
853static struct ts2020_config dvbworld_ts2020_config = {
854 .tuner_address = 0x60,
855 .clk_out_div = 1,
856};
857
858static int frontend_init(struct dm1105_dev *dev)
859{
860 int ret;
861
862 switch (dev->boardnr) {
863 case DM1105_BOARD_UNBRANDED_I2C_ON_GPIO:
864 dm1105_gpio_enable(dev, GPIO15, 1);
865 dm1105_gpio_clear(dev, GPIO15);
866 msleep(100);
867 dm1105_gpio_set(dev, GPIO15);
868 msleep(200);
869 dev->fe = dvb_attach(
870 stv0299_attach, &sharp_z0194a_config,
871 &dev->i2c_bb_adap);
872 if (dev->fe) {
873 dev->fe->ops.set_voltage = dm1105_set_voltage;
874 dvb_attach(dvb_pll_attach, dev->fe, 0x60,
875 &dev->i2c_bb_adap, DVB_PLL_OPERA1);
876 break;
877 }
878
879 dev->fe = dvb_attach(
880 stv0288_attach, &earda_config,
881 &dev->i2c_bb_adap);
882 if (dev->fe) {
883 dev->fe->ops.set_voltage = dm1105_set_voltage;
884 dvb_attach(stb6000_attach, dev->fe, 0x61,
885 &dev->i2c_bb_adap);
886 break;
887 }
888
889 dev->fe = dvb_attach(
890 si21xx_attach, &serit_config,
891 &dev->i2c_bb_adap);
892 if (dev->fe)
893 dev->fe->ops.set_voltage = dm1105_set_voltage;
894 break;
895 case DM1105_BOARD_DVBWORLD_2004:
896 dev->fe = dvb_attach(
897 cx24116_attach, &serit_sp2633_config,
898 &dev->i2c_adap);
899 if (dev->fe) {
900 dev->fe->ops.set_voltage = dm1105_set_voltage;
901 break;
902 }
903
904 dev->fe = dvb_attach(
905 ds3000_attach, &dvbworld_ds3000_config,
906 &dev->i2c_adap);
907 if (dev->fe) {
908 dvb_attach(ts2020_attach, dev->fe,
909 &dvbworld_ts2020_config, &dev->i2c_adap);
910 dev->fe->ops.set_voltage = dm1105_set_voltage;
911 }
912
913 break;
914 case DM1105_BOARD_DVBWORLD_2002:
915 case DM1105_BOARD_AXESS_DM05:
916 default:
917 dev->fe = dvb_attach(
918 stv0299_attach, &sharp_z0194a_config,
919 &dev->i2c_adap);
920 if (dev->fe) {
921 dev->fe->ops.set_voltage = dm1105_set_voltage;
922 dvb_attach(dvb_pll_attach, dev->fe, 0x60,
923 &dev->i2c_adap, DVB_PLL_OPERA1);
924 break;
925 }
926
927 dev->fe = dvb_attach(
928 stv0288_attach, &earda_config,
929 &dev->i2c_adap);
930 if (dev->fe) {
931 dev->fe->ops.set_voltage = dm1105_set_voltage;
932 dvb_attach(stb6000_attach, dev->fe, 0x61,
933 &dev->i2c_adap);
934 break;
935 }
936
937 dev->fe = dvb_attach(
938 si21xx_attach, &serit_config,
939 &dev->i2c_adap);
940 if (dev->fe)
941 dev->fe->ops.set_voltage = dm1105_set_voltage;
942
943 }
944
945 if (!dev->fe) {
946 dev_err(&dev->pdev->dev, "could not attach frontend\n");
947 return -ENODEV;
948 }
949
950 ret = dvb_register_frontend(&dev->dvb_adapter, dev->fe);
951 if (ret < 0) {
952 if (dev->fe->ops.release)
953 dev->fe->ops.release(dev->fe);
954 dev->fe = NULL;
955 return ret;
956 }
957
958 return 0;
959}
960
961static void dm1105_read_mac(struct dm1105_dev *dev, u8 *mac)
962{
963 static u8 command[1] = { 0x28 };
964
965 struct i2c_msg msg[] = {
966 {
967 .addr = IIC_24C01_addr >> 1,
968 .flags = 0,
969 .buf = command,
970 .len = 1
971 }, {
972 .addr = IIC_24C01_addr >> 1,
973 .flags = I2C_M_RD,
974 .buf = mac,
975 .len = 6
976 },
977 };
978
979 dm1105_i2c_xfer(&dev->i2c_adap, msg , 2);
980 dev_info(&dev->pdev->dev, "MAC %pM\n", mac);
981}
982
983static int dm1105_probe(struct pci_dev *pdev,
984 const struct pci_device_id *ent)
985{
986 struct dm1105_dev *dev;
987 struct dvb_adapter *dvb_adapter;
988 struct dvb_demux *dvbdemux;
989 struct dmx_demux *dmx;
990 int ret = -ENOMEM;
991 int i;
992
993 dev = kzalloc(sizeof(struct dm1105_dev), GFP_KERNEL);
994 if (!dev)
995 return -ENOMEM;
996
997
998 dev->nr = dm1105_devcount;
999 dev->boardnr = UNSET;
1000 if (card[dev->nr] < ARRAY_SIZE(dm1105_boards))
1001 dev->boardnr = card[dev->nr];
1002 for (i = 0; UNSET == dev->boardnr &&
1003 i < ARRAY_SIZE(dm1105_subids); i++)
1004 if (pdev->subsystem_vendor ==
1005 dm1105_subids[i].subvendor &&
1006 pdev->subsystem_device ==
1007 dm1105_subids[i].subdevice)
1008 dev->boardnr = dm1105_subids[i].card;
1009
1010 if (UNSET == dev->boardnr) {
1011 dev->boardnr = DM1105_BOARD_UNKNOWN;
1012 dm1105_card_list(pdev);
1013 }
1014
1015 dm1105_devcount++;
1016 dev->pdev = pdev;
1017 dev->buffer_size = 5 * DM1105_DMA_BYTES;
1018 dev->PacketErrorCount = 0;
1019 dev->dmarst = 0;
1020
1021 ret = pci_enable_device(pdev);
1022 if (ret < 0)
1023 goto err_kfree;
1024
1025 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1026 if (ret < 0)
1027 goto err_pci_disable_device;
1028
1029 pci_set_master(pdev);
1030
1031 ret = pci_request_regions(pdev, DRIVER_NAME);
1032 if (ret < 0)
1033 goto err_pci_disable_device;
1034
1035 dev->io_mem = pci_iomap(pdev, 0, pci_resource_len(pdev, 0));
1036 if (!dev->io_mem) {
1037 ret = -EIO;
1038 goto err_pci_release_regions;
1039 }
1040
1041 spin_lock_init(&dev->lock);
1042 pci_set_drvdata(pdev, dev);
1043
1044 ret = dm1105_hw_init(dev);
1045 if (ret < 0)
1046 goto err_pci_iounmap;
1047
1048
1049 i2c_set_adapdata(&dev->i2c_adap, dev);
1050 strcpy(dev->i2c_adap.name, DRIVER_NAME);
1051 dev->i2c_adap.owner = THIS_MODULE;
1052 dev->i2c_adap.dev.parent = &pdev->dev;
1053 dev->i2c_adap.algo = &dm1105_algo;
1054 dev->i2c_adap.algo_data = dev;
1055 ret = i2c_add_adapter(&dev->i2c_adap);
1056
1057 if (ret < 0)
1058 goto err_dm1105_hw_exit;
1059
1060 i2c_set_adapdata(&dev->i2c_bb_adap, dev);
1061 strcpy(dev->i2c_bb_adap.name, DM1105_I2C_GPIO_NAME);
1062 dev->i2c_bb_adap.owner = THIS_MODULE;
1063 dev->i2c_bb_adap.dev.parent = &pdev->dev;
1064 dev->i2c_bb_adap.algo_data = &dev->i2c_bit;
1065 dev->i2c_bit.data = dev;
1066 dev->i2c_bit.setsda = dm1105_setsda;
1067 dev->i2c_bit.setscl = dm1105_setscl;
1068 dev->i2c_bit.getsda = dm1105_getsda;
1069 dev->i2c_bit.getscl = dm1105_getscl;
1070 dev->i2c_bit.udelay = 10;
1071 dev->i2c_bit.timeout = 10;
1072
1073
1074 dm1105_setsda(dev, 1);
1075 dm1105_setscl(dev, 1);
1076
1077 ret = i2c_bit_add_bus(&dev->i2c_bb_adap);
1078 if (ret < 0)
1079 goto err_i2c_del_adapter;
1080
1081
1082 ret = dvb_register_adapter(&dev->dvb_adapter, DRIVER_NAME,
1083 THIS_MODULE, &pdev->dev, adapter_nr);
1084 if (ret < 0)
1085 goto err_i2c_del_adapters;
1086
1087 dvb_adapter = &dev->dvb_adapter;
1088
1089 dm1105_read_mac(dev, dvb_adapter->proposed_mac);
1090
1091 dvbdemux = &dev->demux;
1092 dvbdemux->filternum = 256;
1093 dvbdemux->feednum = 256;
1094 dvbdemux->start_feed = dm1105_start_feed;
1095 dvbdemux->stop_feed = dm1105_stop_feed;
1096 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
1097 DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
1098 ret = dvb_dmx_init(dvbdemux);
1099 if (ret < 0)
1100 goto err_dvb_unregister_adapter;
1101
1102 dmx = &dvbdemux->dmx;
1103 dev->dmxdev.filternum = 256;
1104 dev->dmxdev.demux = dmx;
1105 dev->dmxdev.capabilities = 0;
1106
1107 ret = dvb_dmxdev_init(&dev->dmxdev, dvb_adapter);
1108 if (ret < 0)
1109 goto err_dvb_dmx_release;
1110
1111 dev->hw_frontend.source = DMX_FRONTEND_0;
1112
1113 ret = dmx->add_frontend(dmx, &dev->hw_frontend);
1114 if (ret < 0)
1115 goto err_dvb_dmxdev_release;
1116
1117 dev->mem_frontend.source = DMX_MEMORY_FE;
1118
1119 ret = dmx->add_frontend(dmx, &dev->mem_frontend);
1120 if (ret < 0)
1121 goto err_remove_hw_frontend;
1122
1123 ret = dmx->connect_frontend(dmx, &dev->hw_frontend);
1124 if (ret < 0)
1125 goto err_remove_mem_frontend;
1126
1127 ret = dvb_net_init(dvb_adapter, &dev->dvbnet, dmx);
1128 if (ret < 0)
1129 goto err_disconnect_frontend;
1130
1131 ret = frontend_init(dev);
1132 if (ret < 0)
1133 goto err_dvb_net;
1134
1135 dm1105_ir_init(dev);
1136
1137 INIT_WORK(&dev->work, dm1105_dmx_buffer);
1138 sprintf(dev->wqn, "%s/%d", dvb_adapter->name, dvb_adapter->num);
1139 dev->wq = create_singlethread_workqueue(dev->wqn);
1140 if (!dev->wq) {
1141 ret = -ENOMEM;
1142 goto err_dvb_net;
1143 }
1144
1145 ret = request_irq(pdev->irq, dm1105_irq, IRQF_SHARED,
1146 DRIVER_NAME, dev);
1147 if (ret < 0)
1148 goto err_workqueue;
1149
1150 return 0;
1151
1152err_workqueue:
1153 destroy_workqueue(dev->wq);
1154err_dvb_net:
1155 dvb_net_release(&dev->dvbnet);
1156err_disconnect_frontend:
1157 dmx->disconnect_frontend(dmx);
1158err_remove_mem_frontend:
1159 dmx->remove_frontend(dmx, &dev->mem_frontend);
1160err_remove_hw_frontend:
1161 dmx->remove_frontend(dmx, &dev->hw_frontend);
1162err_dvb_dmxdev_release:
1163 dvb_dmxdev_release(&dev->dmxdev);
1164err_dvb_dmx_release:
1165 dvb_dmx_release(dvbdemux);
1166err_dvb_unregister_adapter:
1167 dvb_unregister_adapter(dvb_adapter);
1168err_i2c_del_adapters:
1169 i2c_del_adapter(&dev->i2c_bb_adap);
1170err_i2c_del_adapter:
1171 i2c_del_adapter(&dev->i2c_adap);
1172err_dm1105_hw_exit:
1173 dm1105_hw_exit(dev);
1174err_pci_iounmap:
1175 pci_iounmap(pdev, dev->io_mem);
1176err_pci_release_regions:
1177 pci_release_regions(pdev);
1178err_pci_disable_device:
1179 pci_disable_device(pdev);
1180err_kfree:
1181 kfree(dev);
1182 return ret;
1183}
1184
1185static void dm1105_remove(struct pci_dev *pdev)
1186{
1187 struct dm1105_dev *dev = pci_get_drvdata(pdev);
1188 struct dvb_adapter *dvb_adapter = &dev->dvb_adapter;
1189 struct dvb_demux *dvbdemux = &dev->demux;
1190 struct dmx_demux *dmx = &dvbdemux->dmx;
1191
1192 dm1105_ir_exit(dev);
1193 dmx->close(dmx);
1194 dvb_net_release(&dev->dvbnet);
1195 if (dev->fe)
1196 dvb_unregister_frontend(dev->fe);
1197
1198 dmx->disconnect_frontend(dmx);
1199 dmx->remove_frontend(dmx, &dev->mem_frontend);
1200 dmx->remove_frontend(dmx, &dev->hw_frontend);
1201 dvb_dmxdev_release(&dev->dmxdev);
1202 dvb_dmx_release(dvbdemux);
1203 dvb_unregister_adapter(dvb_adapter);
1204 i2c_del_adapter(&dev->i2c_adap);
1205
1206 dm1105_hw_exit(dev);
1207 synchronize_irq(pdev->irq);
1208 free_irq(pdev->irq, dev);
1209 pci_iounmap(pdev, dev->io_mem);
1210 pci_release_regions(pdev);
1211 pci_disable_device(pdev);
1212 dm1105_devcount--;
1213 kfree(dev);
1214}
1215
1216static struct pci_device_id dm1105_id_table[] = {
1217 {
1218 .vendor = PCI_VENDOR_ID_TRIGEM,
1219 .device = PCI_DEVICE_ID_DM1105,
1220 .subvendor = PCI_ANY_ID,
1221 .subdevice = PCI_ANY_ID,
1222 }, {
1223 .vendor = PCI_VENDOR_ID_AXESS,
1224 .device = PCI_DEVICE_ID_DM05,
1225 .subvendor = PCI_ANY_ID,
1226 .subdevice = PCI_ANY_ID,
1227 }, {
1228
1229 },
1230};
1231
1232MODULE_DEVICE_TABLE(pci, dm1105_id_table);
1233
1234static struct pci_driver dm1105_driver = {
1235 .name = DRIVER_NAME,
1236 .id_table = dm1105_id_table,
1237 .probe = dm1105_probe,
1238 .remove = dm1105_remove,
1239};
1240
1241module_pci_driver(dm1105_driver);
1242
1243MODULE_AUTHOR("Igor M. Liplianin <liplianin@me.by>");
1244MODULE_DESCRIPTION("SDMC DM1105 DVB driver");
1245MODULE_LICENSE("GPL");
1246
