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12#include <linux/bitops.h>
13#include <linux/clk.h>
14#include <linux/interrupt.h>
15#include <linux/spinlock.h>
16#include <linux/timer.h>
17#include <media/rc-core.h>
18#include "img-ir.h"
19
20
21static DEFINE_SPINLOCK(img_ir_decoders_lock);
22
23extern struct img_ir_decoder img_ir_nec;
24extern struct img_ir_decoder img_ir_jvc;
25extern struct img_ir_decoder img_ir_sony;
26extern struct img_ir_decoder img_ir_sharp;
27extern struct img_ir_decoder img_ir_sanyo;
28
29static bool img_ir_decoders_preprocessed;
30static struct img_ir_decoder *img_ir_decoders[] = {
31#ifdef CONFIG_IR_IMG_NEC
32 &img_ir_nec,
33#endif
34#ifdef CONFIG_IR_IMG_JVC
35 &img_ir_jvc,
36#endif
37#ifdef CONFIG_IR_IMG_SONY
38 &img_ir_sony,
39#endif
40#ifdef CONFIG_IR_IMG_SHARP
41 &img_ir_sharp,
42#endif
43#ifdef CONFIG_IR_IMG_SANYO
44 &img_ir_sanyo,
45#endif
46 NULL
47};
48
49#define IMG_IR_F_FILTER BIT(RC_FILTER_NORMAL)
50#define IMG_IR_F_WAKE BIT(RC_FILTER_WAKEUP)
51
52
53
54#define IMG_IR_QUIRK_CODE_BROKEN 0x1
55#define IMG_IR_QUIRK_CODE_LEN_INCR 0x2
56
57
58
59static void img_ir_timing_preprocess(struct img_ir_timing_range *range,
60 unsigned int unit)
61{
62 if (range->max < range->min)
63 range->max = range->min;
64 if (unit) {
65
66 range->min = (range->min*unit)/1000;
67 range->max = (range->max*unit + 999)/1000;
68 }
69}
70
71static void img_ir_symbol_timing_preprocess(struct img_ir_symbol_timing *timing,
72 unsigned int unit)
73{
74 img_ir_timing_preprocess(&timing->pulse, unit);
75 img_ir_timing_preprocess(&timing->space, unit);
76}
77
78static void img_ir_timings_preprocess(struct img_ir_timings *timings,
79 unsigned int unit)
80{
81 img_ir_symbol_timing_preprocess(&timings->ldr, unit);
82 img_ir_symbol_timing_preprocess(&timings->s00, unit);
83 img_ir_symbol_timing_preprocess(&timings->s01, unit);
84 img_ir_symbol_timing_preprocess(&timings->s10, unit);
85 img_ir_symbol_timing_preprocess(&timings->s11, unit);
86
87 if (unit)
88
89 timings->ft.ft_min = (timings->ft.ft_min*unit + 999)/1000;
90}
91
92
93
94static void img_ir_timing_defaults(struct img_ir_timing_range *range,
95 struct img_ir_timing_range *defaults)
96{
97 if (!range->min)
98 range->min = defaults->min;
99 if (!range->max)
100 range->max = defaults->max;
101}
102
103static void img_ir_symbol_timing_defaults(struct img_ir_symbol_timing *timing,
104 struct img_ir_symbol_timing *defaults)
105{
106 img_ir_timing_defaults(&timing->pulse, &defaults->pulse);
107 img_ir_timing_defaults(&timing->space, &defaults->space);
108}
109
110static void img_ir_timings_defaults(struct img_ir_timings *timings,
111 struct img_ir_timings *defaults)
112{
113 img_ir_symbol_timing_defaults(&timings->ldr, &defaults->ldr);
114 img_ir_symbol_timing_defaults(&timings->s00, &defaults->s00);
115 img_ir_symbol_timing_defaults(&timings->s01, &defaults->s01);
116 img_ir_symbol_timing_defaults(&timings->s10, &defaults->s10);
117 img_ir_symbol_timing_defaults(&timings->s11, &defaults->s11);
118 if (!timings->ft.ft_min)
119 timings->ft.ft_min = defaults->ft.ft_min;
120}
121
122
123
124
125
126
127
128
129
130static u32 img_ir_control(const struct img_ir_control *control)
131{
132 u32 ctrl = control->code_type << IMG_IR_CODETYPE_SHIFT;
133 if (control->decoden)
134 ctrl |= IMG_IR_DECODEN;
135 if (control->hdrtog)
136 ctrl |= IMG_IR_HDRTOG;
137 if (control->ldrdec)
138 ctrl |= IMG_IR_LDRDEC;
139 if (control->decodinpol)
140 ctrl |= IMG_IR_DECODINPOL;
141 if (control->bitorien)
142 ctrl |= IMG_IR_BITORIEN;
143 if (control->d1validsel)
144 ctrl |= IMG_IR_D1VALIDSEL;
145 if (control->bitinv)
146 ctrl |= IMG_IR_BITINV;
147 if (control->decodend2)
148 ctrl |= IMG_IR_DECODEND2;
149 if (control->bitoriend2)
150 ctrl |= IMG_IR_BITORIEND2;
151 if (control->bitinvd2)
152 ctrl |= IMG_IR_BITINVD2;
153 return ctrl;
154}
155
156
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159
160
161
162
163
164
165
166
167
168static void img_ir_timing_range_convert(struct img_ir_timing_range *out,
169 const struct img_ir_timing_range *in,
170 unsigned int tolerance,
171 unsigned long clock_hz,
172 unsigned int shift)
173{
174 unsigned int min = in->min;
175 unsigned int max = in->max;
176
177 min = min - (min*tolerance >> 7);
178 max = max + (max*tolerance >> 7);
179
180 min = min*clock_hz / 1000000;
181 max = (max*clock_hz + 999999) / 1000000;
182
183 out->min = min >> shift;
184 out->max = (max + ((1 << shift) - 1)) >> shift;
185}
186
187
188
189
190
191
192
193
194
195
196
197static u32 img_ir_symbol_timing(const struct img_ir_symbol_timing *timing,
198 unsigned int tolerance,
199 unsigned long clock_hz,
200 unsigned int pd_shift,
201 unsigned int w_shift)
202{
203 struct img_ir_timing_range hw_pulse, hw_period;
204
205 hw_period.min = timing->pulse.min + timing->space.min;
206 hw_period.max = timing->pulse.max + timing->space.max;
207 img_ir_timing_range_convert(&hw_period, &hw_period,
208 tolerance, clock_hz, pd_shift);
209 img_ir_timing_range_convert(&hw_pulse, &timing->pulse,
210 tolerance, clock_hz, w_shift);
211
212 return (hw_period.max << IMG_IR_PD_MAX_SHIFT) |
213 (hw_period.min << IMG_IR_PD_MIN_SHIFT) |
214 (hw_pulse.max << IMG_IR_W_MAX_SHIFT) |
215 (hw_pulse.min << IMG_IR_W_MIN_SHIFT);
216}
217
218
219
220
221
222
223
224
225static u32 img_ir_free_timing(const struct img_ir_free_timing *timing,
226 unsigned long clock_hz)
227{
228 unsigned int minlen, maxlen, ft_min;
229
230 if (timing->minlen < 30)
231 minlen = timing->minlen & -2;
232 else
233 minlen = 30;
234
235 if (timing->maxlen < 48)
236 maxlen = (timing->maxlen + 1) & -2;
237 else
238 maxlen = 48;
239
240 ft_min = (timing->ft_min*clock_hz + 999999) / 1000000;
241 ft_min = (ft_min + 7) >> 3;
242
243 return (maxlen << IMG_IR_MAXLEN_SHIFT) |
244 (minlen << IMG_IR_MINLEN_SHIFT) |
245 (ft_min << IMG_IR_FT_MIN_SHIFT);
246}
247
248
249
250
251
252
253
254
255static u32 img_ir_free_timing_dynamic(u32 st_ft, struct img_ir_filter *filter)
256{
257 unsigned int minlen, maxlen, newminlen, newmaxlen;
258
259
260 newminlen = filter->minlen & -2;
261 newmaxlen = (filter->maxlen + 1) & -2;
262
263 minlen = (st_ft & IMG_IR_MINLEN) >> IMG_IR_MINLEN_SHIFT;
264 maxlen = (st_ft & IMG_IR_MAXLEN) >> IMG_IR_MAXLEN_SHIFT;
265
266 if (newminlen > minlen) {
267 st_ft &= ~IMG_IR_MINLEN;
268 st_ft |= newminlen << IMG_IR_MINLEN_SHIFT;
269 }
270 if (newmaxlen < maxlen) {
271 st_ft &= ~IMG_IR_MAXLEN;
272 st_ft |= newmaxlen << IMG_IR_MAXLEN_SHIFT;
273 }
274 return st_ft;
275}
276
277
278
279
280
281
282
283
284static void img_ir_timings_convert(struct img_ir_timing_regvals *regs,
285 const struct img_ir_timings *timings,
286 unsigned int tolerance,
287 unsigned int clock_hz)
288{
289
290 regs->ldr = img_ir_symbol_timing(&timings->ldr, tolerance, clock_hz,
291 4, 4);
292
293 regs->s00 = img_ir_symbol_timing(&timings->s00, tolerance, clock_hz,
294 1, 0);
295 regs->s01 = img_ir_symbol_timing(&timings->s01, tolerance, clock_hz,
296 1, 0);
297 regs->s10 = img_ir_symbol_timing(&timings->s10, tolerance, clock_hz,
298 1, 0);
299 regs->s11 = img_ir_symbol_timing(&timings->s11, tolerance, clock_hz,
300 1, 0);
301 regs->ft = img_ir_free_timing(&timings->ft, clock_hz);
302}
303
304
305
306
307
308
309
310
311static void img_ir_decoder_preprocess(struct img_ir_decoder *decoder)
312{
313
314 if (!decoder->tolerance)
315 decoder->tolerance = 10;
316
317 decoder->tolerance = decoder->tolerance * 128 / 100;
318
319
320 img_ir_timings_preprocess(&decoder->timings, decoder->unit);
321
322
323 if (decoder->repeat) {
324 img_ir_timings_preprocess(&decoder->rtimings, decoder->unit);
325 img_ir_timings_defaults(&decoder->rtimings, &decoder->timings);
326 }
327}
328
329
330
331
332
333
334
335
336
337
338static void img_ir_decoder_convert(const struct img_ir_decoder *decoder,
339 struct img_ir_reg_timings *reg_timings,
340 unsigned int clock_hz)
341{
342
343 reg_timings->ctrl = img_ir_control(&decoder->control);
344
345
346 img_ir_timings_convert(®_timings->timings, &decoder->timings,
347 decoder->tolerance, clock_hz);
348
349
350 if (decoder->repeat)
351 img_ir_timings_convert(®_timings->rtimings,
352 &decoder->rtimings, decoder->tolerance,
353 clock_hz);
354}
355
356
357
358
359
360
361
362
363
364
365
366static void img_ir_write_timings(struct img_ir_priv *priv,
367 struct img_ir_timing_regvals *regs,
368 enum rc_filter_type type)
369{
370 struct img_ir_priv_hw *hw = &priv->hw;
371
372
373 u32 ft = regs->ft;
374 if (hw->flags & BIT(type))
375 ft = img_ir_free_timing_dynamic(regs->ft, &hw->filters[type]);
376
377 img_ir_write(priv, IMG_IR_LEAD_SYMB_TIMING, regs->ldr);
378 img_ir_write(priv, IMG_IR_S00_SYMB_TIMING, regs->s00);
379 img_ir_write(priv, IMG_IR_S01_SYMB_TIMING, regs->s01);
380 img_ir_write(priv, IMG_IR_S10_SYMB_TIMING, regs->s10);
381 img_ir_write(priv, IMG_IR_S11_SYMB_TIMING, regs->s11);
382 img_ir_write(priv, IMG_IR_FREE_SYMB_TIMING, ft);
383 dev_dbg(priv->dev, "timings: ldr=%#x, s=[%#x, %#x, %#x, %#x], ft=%#x\n",
384 regs->ldr, regs->s00, regs->s01, regs->s10, regs->s11, ft);
385}
386
387static void img_ir_write_filter(struct img_ir_priv *priv,
388 struct img_ir_filter *filter)
389{
390 if (filter) {
391 dev_dbg(priv->dev, "IR filter=%016llx & %016llx\n",
392 (unsigned long long)filter->data,
393 (unsigned long long)filter->mask);
394 img_ir_write(priv, IMG_IR_IRQ_MSG_DATA_LW, (u32)filter->data);
395 img_ir_write(priv, IMG_IR_IRQ_MSG_DATA_UP, (u32)(filter->data
396 >> 32));
397 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_LW, (u32)filter->mask);
398 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_UP, (u32)(filter->mask
399 >> 32));
400 } else {
401 dev_dbg(priv->dev, "IR clearing filter\n");
402 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_LW, 0);
403 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_UP, 0);
404 }
405}
406
407
408static void _img_ir_set_filter(struct img_ir_priv *priv,
409 struct img_ir_filter *filter)
410{
411 struct img_ir_priv_hw *hw = &priv->hw;
412 u32 irq_en, irq_on;
413
414 irq_en = img_ir_read(priv, IMG_IR_IRQ_ENABLE);
415 if (filter) {
416
417 hw->filters[RC_FILTER_NORMAL] = *filter;
418 hw->flags |= IMG_IR_F_FILTER;
419 irq_on = IMG_IR_IRQ_DATA_MATCH;
420 irq_en &= ~(IMG_IR_IRQ_DATA_VALID | IMG_IR_IRQ_DATA2_VALID);
421 } else {
422
423 hw->flags &= ~IMG_IR_F_FILTER;
424 irq_en &= ~IMG_IR_IRQ_DATA_MATCH;
425 irq_on = IMG_IR_IRQ_DATA_VALID | IMG_IR_IRQ_DATA2_VALID;
426 }
427 irq_en |= irq_on;
428
429 img_ir_write_filter(priv, filter);
430
431 img_ir_write(priv, IMG_IR_IRQ_CLEAR, irq_on);
432 img_ir_write(priv, IMG_IR_IRQ_ENABLE, irq_en);
433}
434
435
436static void _img_ir_set_wake_filter(struct img_ir_priv *priv,
437 struct img_ir_filter *filter)
438{
439 struct img_ir_priv_hw *hw = &priv->hw;
440 if (filter) {
441
442 hw->filters[RC_FILTER_WAKEUP] = *filter;
443 hw->flags |= IMG_IR_F_WAKE;
444 } else {
445
446 hw->flags &= ~IMG_IR_F_WAKE;
447 }
448}
449
450
451static int img_ir_set_filter(struct rc_dev *dev, enum rc_filter_type type,
452 struct rc_scancode_filter *sc_filter)
453{
454 struct img_ir_priv *priv = dev->priv;
455 struct img_ir_priv_hw *hw = &priv->hw;
456 struct img_ir_filter filter, *filter_ptr = &filter;
457 int ret = 0;
458
459 dev_dbg(priv->dev, "IR scancode %sfilter=%08x & %08x\n",
460 type == RC_FILTER_WAKEUP ? "wake " : "",
461 sc_filter->data,
462 sc_filter->mask);
463
464 spin_lock_irq(&priv->lock);
465
466
467 if (!sc_filter->mask) {
468 filter_ptr = NULL;
469 goto set_unlock;
470 }
471
472
473 if (!hw->decoder || !hw->decoder->filter) {
474 ret = -EINVAL;
475 goto unlock;
476 }
477
478
479 filter.minlen = 0;
480 filter.maxlen = ~0;
481 ret = hw->decoder->filter(sc_filter, &filter, hw->enabled_protocols);
482 if (ret)
483 goto unlock;
484 dev_dbg(priv->dev, "IR raw %sfilter=%016llx & %016llx\n",
485 type == RC_FILTER_WAKEUP ? "wake " : "",
486 (unsigned long long)filter.data,
487 (unsigned long long)filter.mask);
488
489set_unlock:
490
491 switch (type) {
492 case RC_FILTER_NORMAL:
493 _img_ir_set_filter(priv, filter_ptr);
494 break;
495 case RC_FILTER_WAKEUP:
496 _img_ir_set_wake_filter(priv, filter_ptr);
497 break;
498 default:
499 ret = -EINVAL;
500 }
501
502unlock:
503 spin_unlock_irq(&priv->lock);
504 return ret;
505}
506
507static int img_ir_set_normal_filter(struct rc_dev *dev,
508 struct rc_scancode_filter *sc_filter)
509{
510 return img_ir_set_filter(dev, RC_FILTER_NORMAL, sc_filter);
511}
512
513static int img_ir_set_wakeup_filter(struct rc_dev *dev,
514 struct rc_scancode_filter *sc_filter)
515{
516 return img_ir_set_filter(dev, RC_FILTER_WAKEUP, sc_filter);
517}
518
519
520
521
522
523
524
525static void img_ir_set_decoder(struct img_ir_priv *priv,
526 const struct img_ir_decoder *decoder,
527 u64 proto)
528{
529 struct img_ir_priv_hw *hw = &priv->hw;
530 struct rc_dev *rdev = hw->rdev;
531 u32 ir_status, irq_en;
532 spin_lock_irq(&priv->lock);
533
534
535 img_ir_write(priv, IMG_IR_CONTROL, 0);
536 irq_en = img_ir_read(priv, IMG_IR_IRQ_ENABLE);
537 img_ir_write(priv, IMG_IR_IRQ_ENABLE, irq_en & IMG_IR_IRQ_EDGE);
538 img_ir_write(priv, IMG_IR_IRQ_CLEAR, IMG_IR_IRQ_ALL & ~IMG_IR_IRQ_EDGE);
539
540
541 ir_status = img_ir_read(priv, IMG_IR_STATUS);
542 if (ir_status & (IMG_IR_RXDVAL | IMG_IR_RXDVALD2)) {
543 ir_status &= ~(IMG_IR_RXDVAL | IMG_IR_RXDVALD2);
544 img_ir_write(priv, IMG_IR_STATUS, ir_status);
545 img_ir_read(priv, IMG_IR_DATA_LW);
546 img_ir_read(priv, IMG_IR_DATA_UP);
547 }
548
549
550 del_timer_sync(&hw->end_timer);
551 hw->mode = IMG_IR_M_NORMAL;
552
553
554 rdev->scancode_filters[RC_FILTER_WAKEUP].data = 0;
555 rdev->scancode_filters[RC_FILTER_WAKEUP].mask = 0;
556
557
558 _img_ir_set_filter(priv, NULL);
559 _img_ir_set_wake_filter(priv, NULL);
560
561
562 hw->enabled_protocols = 0;
563
564
565 hw->decoder = decoder;
566 if (!decoder)
567 goto unlock;
568
569
570 if (!proto)
571 proto = decoder->type;
572 hw->enabled_protocols = proto;
573
574
575 img_ir_decoder_convert(decoder, &hw->reg_timings, hw->clk_hz);
576 img_ir_write_timings(priv, &hw->reg_timings.timings, RC_FILTER_NORMAL);
577
578
579 img_ir_write(priv, IMG_IR_CONTROL, hw->reg_timings.ctrl);
580
581
582unlock:
583 spin_unlock_irq(&priv->lock);
584}
585
586
587
588
589
590
591
592
593static bool img_ir_decoder_compatible(struct img_ir_priv *priv,
594 const struct img_ir_decoder *dec)
595{
596 unsigned int ct;
597
598
599 ct = dec->control.code_type;
600 if (priv->hw.ct_quirks[ct] & IMG_IR_QUIRK_CODE_BROKEN)
601 return false;
602
603 return true;
604}
605
606
607
608
609
610
611
612static u64 img_ir_allowed_protos(struct img_ir_priv *priv)
613{
614 u64 protos = 0;
615 struct img_ir_decoder **decp;
616
617 for (decp = img_ir_decoders; *decp; ++decp) {
618 const struct img_ir_decoder *dec = *decp;
619 if (img_ir_decoder_compatible(priv, dec))
620 protos |= dec->type;
621 }
622 return protos;
623}
624
625
626static int img_ir_change_protocol(struct rc_dev *dev, u64 *ir_type)
627{
628 struct img_ir_priv *priv = dev->priv;
629 struct img_ir_priv_hw *hw = &priv->hw;
630 struct rc_dev *rdev = hw->rdev;
631 struct img_ir_decoder **decp;
632 u64 wakeup_protocols;
633
634 if (!*ir_type) {
635
636 img_ir_set_decoder(priv, NULL, 0);
637 goto success;
638 }
639 for (decp = img_ir_decoders; *decp; ++decp) {
640 const struct img_ir_decoder *dec = *decp;
641 if (!img_ir_decoder_compatible(priv, dec))
642 continue;
643 if (*ir_type & dec->type) {
644 *ir_type &= dec->type;
645 img_ir_set_decoder(priv, dec, *ir_type);
646 goto success;
647 }
648 }
649 return -EINVAL;
650
651success:
652
653
654
655
656 wakeup_protocols = *ir_type;
657 if (!hw->decoder || !hw->decoder->filter)
658 wakeup_protocols = 0;
659 rc_set_allowed_wakeup_protocols(rdev, wakeup_protocols);
660 rc_set_enabled_wakeup_protocols(rdev, wakeup_protocols);
661 return 0;
662}
663
664
665static void img_ir_set_protocol(struct img_ir_priv *priv, u64 proto)
666{
667 struct rc_dev *rdev = priv->hw.rdev;
668
669 spin_lock_irq(&rdev->rc_map.lock);
670 rdev->rc_map.rc_type = __ffs64(proto);
671 spin_unlock_irq(&rdev->rc_map.lock);
672
673 mutex_lock(&rdev->lock);
674 rc_set_enabled_protocols(rdev, proto);
675 rc_set_allowed_wakeup_protocols(rdev, proto);
676 rc_set_enabled_wakeup_protocols(rdev, proto);
677 mutex_unlock(&rdev->lock);
678}
679
680
681static void img_ir_init_decoders(void)
682{
683 struct img_ir_decoder **decp;
684
685 spin_lock(&img_ir_decoders_lock);
686 if (!img_ir_decoders_preprocessed) {
687 for (decp = img_ir_decoders; *decp; ++decp)
688 img_ir_decoder_preprocess(*decp);
689 img_ir_decoders_preprocessed = true;
690 }
691 spin_unlock(&img_ir_decoders_lock);
692}
693
694#ifdef CONFIG_PM_SLEEP
695
696
697
698
699
700
701static int img_ir_enable_wake(struct img_ir_priv *priv)
702{
703 struct img_ir_priv_hw *hw = &priv->hw;
704 int ret = 0;
705
706 spin_lock_irq(&priv->lock);
707 if (hw->flags & IMG_IR_F_WAKE) {
708
709 hw->suspend_irqen = img_ir_read(priv, IMG_IR_IRQ_ENABLE);
710 img_ir_write(priv, IMG_IR_IRQ_ENABLE, IMG_IR_IRQ_DATA_MATCH);
711 img_ir_write_filter(priv, &hw->filters[RC_FILTER_WAKEUP]);
712 img_ir_write_timings(priv, &hw->reg_timings.timings,
713 RC_FILTER_WAKEUP);
714 hw->mode = IMG_IR_M_WAKE;
715 ret = 1;
716 }
717 spin_unlock_irq(&priv->lock);
718 return ret;
719}
720
721
722
723
724
725
726
727
728static int img_ir_disable_wake(struct img_ir_priv *priv)
729{
730 struct img_ir_priv_hw *hw = &priv->hw;
731 int ret = 0;
732
733 spin_lock_irq(&priv->lock);
734 if (hw->flags & IMG_IR_F_WAKE) {
735
736 if (hw->flags & IMG_IR_F_FILTER) {
737 img_ir_write(priv, IMG_IR_IRQ_ENABLE,
738 (hw->suspend_irqen & IMG_IR_IRQ_EDGE) |
739 IMG_IR_IRQ_DATA_MATCH);
740 img_ir_write_filter(priv,
741 &hw->filters[RC_FILTER_NORMAL]);
742 } else {
743 img_ir_write(priv, IMG_IR_IRQ_ENABLE,
744 (hw->suspend_irqen & IMG_IR_IRQ_EDGE) |
745 IMG_IR_IRQ_DATA_VALID |
746 IMG_IR_IRQ_DATA2_VALID);
747 img_ir_write_filter(priv, NULL);
748 }
749 img_ir_write_timings(priv, &hw->reg_timings.timings,
750 RC_FILTER_NORMAL);
751 hw->mode = IMG_IR_M_NORMAL;
752 ret = 1;
753 }
754 spin_unlock_irq(&priv->lock);
755 return ret;
756}
757#endif
758
759
760static void img_ir_begin_repeat(struct img_ir_priv *priv)
761{
762 struct img_ir_priv_hw *hw = &priv->hw;
763 if (hw->mode == IMG_IR_M_NORMAL) {
764
765 img_ir_write(priv, IMG_IR_CONTROL, 0);
766 hw->mode = IMG_IR_M_REPEATING;
767 img_ir_write_timings(priv, &hw->reg_timings.rtimings,
768 RC_FILTER_NORMAL);
769 img_ir_write(priv, IMG_IR_CONTROL, hw->reg_timings.ctrl);
770 }
771}
772
773
774static void img_ir_end_repeat(struct img_ir_priv *priv)
775{
776 struct img_ir_priv_hw *hw = &priv->hw;
777 if (hw->mode == IMG_IR_M_REPEATING) {
778
779 img_ir_write(priv, IMG_IR_CONTROL, 0);
780 hw->mode = IMG_IR_M_NORMAL;
781 img_ir_write_timings(priv, &hw->reg_timings.timings,
782 RC_FILTER_NORMAL);
783 img_ir_write(priv, IMG_IR_CONTROL, hw->reg_timings.ctrl);
784 }
785}
786
787
788static void img_ir_handle_data(struct img_ir_priv *priv, u32 len, u64 raw)
789{
790 struct img_ir_priv_hw *hw = &priv->hw;
791 const struct img_ir_decoder *dec = hw->decoder;
792 int ret = IMG_IR_SCANCODE;
793 int scancode;
794 if (dec->scancode)
795 ret = dec->scancode(len, raw, &scancode, hw->enabled_protocols);
796 else if (len >= 32)
797 scancode = (u32)raw;
798 else if (len < 32)
799 scancode = (u32)raw & ((1 << len)-1);
800 dev_dbg(priv->dev, "data (%u bits) = %#llx\n",
801 len, (unsigned long long)raw);
802 if (ret == IMG_IR_SCANCODE) {
803 dev_dbg(priv->dev, "decoded scan code %#x\n", scancode);
804 rc_keydown(hw->rdev, scancode, 0);
805 img_ir_end_repeat(priv);
806 } else if (ret == IMG_IR_REPEATCODE) {
807 if (hw->mode == IMG_IR_M_REPEATING) {
808 dev_dbg(priv->dev, "decoded repeat code\n");
809 rc_repeat(hw->rdev);
810 } else {
811 dev_dbg(priv->dev, "decoded unexpected repeat code, ignoring\n");
812 }
813 } else {
814 dev_dbg(priv->dev, "decode failed (%d)\n", ret);
815 return;
816 }
817
818
819 if (dec->repeat) {
820 unsigned long interval;
821
822 img_ir_begin_repeat(priv);
823
824
825 interval = dec->repeat + (dec->repeat >> 3);
826 mod_timer(&hw->end_timer,
827 jiffies + msecs_to_jiffies(interval));
828 }
829}
830
831
832static void img_ir_end_timer(unsigned long arg)
833{
834 struct img_ir_priv *priv = (struct img_ir_priv *)arg;
835
836 spin_lock_irq(&priv->lock);
837 img_ir_end_repeat(priv);
838 spin_unlock_irq(&priv->lock);
839}
840
841#ifdef CONFIG_COMMON_CLK
842static void img_ir_change_frequency(struct img_ir_priv *priv,
843 struct clk_notifier_data *change)
844{
845 struct img_ir_priv_hw *hw = &priv->hw;
846
847 dev_dbg(priv->dev, "clk changed %lu HZ -> %lu HZ\n",
848 change->old_rate, change->new_rate);
849
850 spin_lock_irq(&priv->lock);
851 if (hw->clk_hz == change->new_rate)
852 goto unlock;
853 hw->clk_hz = change->new_rate;
854
855 if (hw->decoder) {
856 img_ir_decoder_convert(hw->decoder, &hw->reg_timings,
857 hw->clk_hz);
858 switch (hw->mode) {
859 case IMG_IR_M_NORMAL:
860 img_ir_write_timings(priv, &hw->reg_timings.timings,
861 RC_FILTER_NORMAL);
862 break;
863 case IMG_IR_M_REPEATING:
864 img_ir_write_timings(priv, &hw->reg_timings.rtimings,
865 RC_FILTER_NORMAL);
866 break;
867#ifdef CONFIG_PM_SLEEP
868 case IMG_IR_M_WAKE:
869 img_ir_write_timings(priv, &hw->reg_timings.timings,
870 RC_FILTER_WAKEUP);
871 break;
872#endif
873 }
874 }
875unlock:
876 spin_unlock_irq(&priv->lock);
877}
878
879static int img_ir_clk_notify(struct notifier_block *self, unsigned long action,
880 void *data)
881{
882 struct img_ir_priv *priv = container_of(self, struct img_ir_priv,
883 hw.clk_nb);
884 switch (action) {
885 case POST_RATE_CHANGE:
886 img_ir_change_frequency(priv, data);
887 break;
888 default:
889 break;
890 }
891 return NOTIFY_OK;
892}
893#endif
894
895
896void img_ir_isr_hw(struct img_ir_priv *priv, u32 irq_status)
897{
898 struct img_ir_priv_hw *hw = &priv->hw;
899 u32 ir_status, len, lw, up;
900 unsigned int ct;
901
902
903 if (!hw->decoder)
904 return;
905
906 ir_status = img_ir_read(priv, IMG_IR_STATUS);
907 if (!(ir_status & (IMG_IR_RXDVAL | IMG_IR_RXDVALD2)))
908 return;
909 ir_status &= ~(IMG_IR_RXDVAL | IMG_IR_RXDVALD2);
910 img_ir_write(priv, IMG_IR_STATUS, ir_status);
911
912 len = (ir_status & IMG_IR_RXDLEN) >> IMG_IR_RXDLEN_SHIFT;
913
914 ct = hw->decoder->control.code_type;
915 if (hw->ct_quirks[ct] & IMG_IR_QUIRK_CODE_LEN_INCR)
916 ++len;
917
918 lw = img_ir_read(priv, IMG_IR_DATA_LW);
919 up = img_ir_read(priv, IMG_IR_DATA_UP);
920 img_ir_handle_data(priv, len, (u64)up << 32 | lw);
921}
922
923void img_ir_setup_hw(struct img_ir_priv *priv)
924{
925 struct img_ir_decoder **decp;
926
927 if (!priv->hw.rdev)
928 return;
929
930
931 for (decp = img_ir_decoders; *decp; ++decp) {
932 const struct img_ir_decoder *dec = *decp;
933 if (img_ir_decoder_compatible(priv, dec)) {
934 img_ir_set_protocol(priv, dec->type);
935 img_ir_set_decoder(priv, dec, 0);
936 return;
937 }
938 }
939 img_ir_set_decoder(priv, NULL, 0);
940}
941
942
943
944
945
946static void img_ir_probe_hw_caps(struct img_ir_priv *priv)
947{
948 struct img_ir_priv_hw *hw = &priv->hw;
949
950
951
952
953 hw->ct_quirks[IMG_IR_CODETYPE_PULSELEN]
954 |= IMG_IR_QUIRK_CODE_LEN_INCR;
955 hw->ct_quirks[IMG_IR_CODETYPE_BIPHASE]
956 |= IMG_IR_QUIRK_CODE_BROKEN;
957 hw->ct_quirks[IMG_IR_CODETYPE_2BITPULSEPOS]
958 |= IMG_IR_QUIRK_CODE_BROKEN;
959}
960
961int img_ir_probe_hw(struct img_ir_priv *priv)
962{
963 struct img_ir_priv_hw *hw = &priv->hw;
964 struct rc_dev *rdev;
965 int error;
966
967
968 img_ir_init_decoders();
969
970
971 img_ir_probe_hw_caps(priv);
972
973
974 setup_timer(&hw->end_timer, img_ir_end_timer, (unsigned long)priv);
975
976
977 if (!IS_ERR(priv->clk)) {
978 hw->clk_hz = clk_get_rate(priv->clk);
979#ifdef CONFIG_COMMON_CLK
980 hw->clk_nb.notifier_call = img_ir_clk_notify;
981 error = clk_notifier_register(priv->clk, &hw->clk_nb);
982 if (error)
983 dev_warn(priv->dev,
984 "failed to register clock notifier\n");
985#endif
986 } else {
987 hw->clk_hz = 32768;
988 }
989
990
991 hw->rdev = rdev = rc_allocate_device();
992 if (!rdev) {
993 dev_err(priv->dev, "cannot allocate input device\n");
994 error = -ENOMEM;
995 goto err_alloc_rc;
996 }
997 rdev->priv = priv;
998 rdev->map_name = RC_MAP_EMPTY;
999 rc_set_allowed_protocols(rdev, img_ir_allowed_protos(priv));
1000 rdev->input_name = "IMG Infrared Decoder";
1001 rdev->s_filter = img_ir_set_normal_filter;
1002 rdev->s_wakeup_filter = img_ir_set_wakeup_filter;
1003
1004
1005 error = rc_register_device(rdev);
1006 if (error) {
1007 dev_err(priv->dev, "failed to register IR input device\n");
1008 goto err_register_rc;
1009 }
1010
1011
1012
1013
1014
1015 rdev->change_protocol = img_ir_change_protocol;
1016
1017 device_init_wakeup(priv->dev, 1);
1018
1019 return 0;
1020
1021err_register_rc:
1022 img_ir_set_decoder(priv, NULL, 0);
1023 hw->rdev = NULL;
1024 rc_free_device(rdev);
1025err_alloc_rc:
1026#ifdef CONFIG_COMMON_CLK
1027 if (!IS_ERR(priv->clk))
1028 clk_notifier_unregister(priv->clk, &hw->clk_nb);
1029#endif
1030 return error;
1031}
1032
1033void img_ir_remove_hw(struct img_ir_priv *priv)
1034{
1035 struct img_ir_priv_hw *hw = &priv->hw;
1036 struct rc_dev *rdev = hw->rdev;
1037 if (!rdev)
1038 return;
1039 img_ir_set_decoder(priv, NULL, 0);
1040 hw->rdev = NULL;
1041 rc_unregister_device(rdev);
1042#ifdef CONFIG_COMMON_CLK
1043 if (!IS_ERR(priv->clk))
1044 clk_notifier_unregister(priv->clk, &hw->clk_nb);
1045#endif
1046}
1047
1048#ifdef CONFIG_PM_SLEEP
1049int img_ir_suspend(struct device *dev)
1050{
1051 struct img_ir_priv *priv = dev_get_drvdata(dev);
1052
1053 if (device_may_wakeup(dev) && img_ir_enable_wake(priv))
1054 enable_irq_wake(priv->irq);
1055 return 0;
1056}
1057
1058int img_ir_resume(struct device *dev)
1059{
1060 struct img_ir_priv *priv = dev_get_drvdata(dev);
1061
1062 if (device_may_wakeup(dev) && img_ir_disable_wake(priv))
1063 disable_irq_wake(priv->irq);
1064 return 0;
1065}
1066#endif
1067