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31#include <linux/kernel.h>
32#include <linux/slab.h>
33#include <linux/init.h>
34#include <linux/string.h>
35#include <linux/sched.h>
36#include <linux/delay.h>
37#include <linux/module.h>
38#include <linux/export.h>
39#include <linux/platform_device.h>
40#include <linux/io.h>
41#include <linux/bitops.h>
42#include <linux/mtd/partitions.h>
43#include <linux/mtd/mtd.h>
44#include <linux/mtd/nand.h>
45#include <linux/bch.h>
46#include <linux/bitrev.h>
47#include <linux/jiffies.h>
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64static bool reliable_mode;
65module_param(reliable_mode, bool, 0);
66MODULE_PARM_DESC(reliable_mode, "pages are programmed in reliable mode");
67
68
69
70
71
72
73
74static bool ignore_badblocks;
75module_param(ignore_badblocks, bool, 0);
76MODULE_PARM_DESC(ignore_badblocks, "no badblock checking performed");
77
78struct docg4_priv {
79 struct mtd_info *mtd;
80 struct device *dev;
81 void __iomem *virtadr;
82 int status;
83 struct {
84 unsigned int command;
85 int column;
86 int page;
87 } last_command;
88 uint8_t oob_buf[16];
89 uint8_t ecc_buf[7];
90 int oob_page;
91 struct bch_control *bch;
92};
93
94
95
96
97
98
99
100
101
102#define DOC_IOSPACE_DATA 0x0800
103
104
105#define DOC_CHIPID 0x1000
106#define DOC_DEVICESELECT 0x100a
107#define DOC_ASICMODE 0x100c
108#define DOC_DATAEND 0x101e
109#define DOC_NOP 0x103e
110
111#define DOC_FLASHSEQUENCE 0x1032
112#define DOC_FLASHCOMMAND 0x1034
113#define DOC_FLASHADDRESS 0x1036
114#define DOC_FLASHCONTROL 0x1038
115#define DOC_ECCCONF0 0x1040
116#define DOC_ECCCONF1 0x1042
117#define DOC_HAMMINGPARITY 0x1046
118#define DOC_BCH_SYNDROM(idx) (0x1048 + idx)
119
120#define DOC_ASICMODECONFIRM 0x1072
121#define DOC_CHIPID_INV 0x1074
122#define DOC_POWERMODE 0x107c
123
124#define DOCG4_MYSTERY_REG 0x1050
125
126
127#define DOCG4_OOB_6_7 0x1052
128
129
130#define DOC_SEQ_RESET 0x00
131#define DOCG4_SEQ_PAGE_READ 0x03
132#define DOCG4_SEQ_FLUSH 0x29
133#define DOCG4_SEQ_PAGEWRITE 0x16
134#define DOCG4_SEQ_PAGEPROG 0x1e
135#define DOCG4_SEQ_BLOCKERASE 0x24
136#define DOCG4_SEQ_SETMODE 0x45
137
138
139#define DOCG4_CMD_PAGE_READ 0x00
140#define DOC_CMD_ERASECYCLE2 0xd0
141#define DOCG4_CMD_FLUSH 0x70
142#define DOCG4_CMD_READ2 0x30
143#define DOC_CMD_PROG_BLOCK_ADDR 0x60
144#define DOCG4_CMD_PAGEWRITE 0x80
145#define DOC_CMD_PROG_CYCLE2 0x10
146#define DOCG4_CMD_FAST_MODE 0xa3
147#define DOC_CMD_RELIABLE_MODE 0x22
148#define DOC_CMD_RESET 0xff
149
150
151#define DOC_POWERDOWN_READY 0x80
152
153
154#define DOC_CTRL_CE 0x10
155#define DOC_CTRL_UNKNOWN 0x40
156#define DOC_CTRL_FLASHREADY 0x01
157
158
159#define DOC_ECCCONF0_READ_MODE 0x8000
160#define DOC_ECCCONF0_UNKNOWN 0x2000
161#define DOC_ECCCONF0_ECC_ENABLE 0x1000
162#define DOC_ECCCONF0_DATA_BYTES_MASK 0x07ff
163
164
165#define DOC_ECCCONF1_BCH_SYNDROM_ERR 0x80
166#define DOC_ECCCONF1_ECC_ENABLE 0x07
167#define DOC_ECCCONF1_PAGE_IS_WRITTEN 0x20
168
169
170#define DOC_ASICMODE_RESET 0x00
171#define DOC_ASICMODE_NORMAL 0x01
172#define DOC_ASICMODE_POWERDOWN 0x02
173#define DOC_ASICMODE_MDWREN 0x04
174#define DOC_ASICMODE_BDETCT_RESET 0x08
175#define DOC_ASICMODE_RSTIN_RESET 0x10
176#define DOC_ASICMODE_RAM_WE 0x20
177
178
179#define DOCG4_PROGSTATUS_GOOD 0x51
180#define DOCG4_PROGSTATUS_GOOD_2 0xe0
181
182
183
184
185
186
187#define DOCG4_READ_ERROR 0x02
188
189
190#define DOCG4_CHIP_SIZE 0x8000000
191#define DOCG4_PAGE_SIZE 0x200
192#define DOCG4_PAGES_PER_BLOCK 0x200
193#define DOCG4_BLOCK_SIZE (DOCG4_PAGES_PER_BLOCK * DOCG4_PAGE_SIZE)
194#define DOCG4_NUMBLOCKS (DOCG4_CHIP_SIZE / DOCG4_BLOCK_SIZE)
195#define DOCG4_OOB_SIZE 0x10
196#define DOCG4_CHIP_SHIFT 27
197#define DOCG4_PAGE_SHIFT 9
198#define DOCG4_ERASE_SHIFT 18
199
200
201#define DOCG4_BCH_SIZE (DOCG4_PAGE_SIZE + DOCG4_OOB_SIZE - 1)
202
203#define DOCG4_USERDATA_LEN 520
204
205
206#define DOCG4_IDREG1_VALUE 0x0400
207#define DOCG4_IDREG2_VALUE 0xfbff
208
209
210#define DOCG4_PRIMITIVE_POLY 0x4443
211
212#define DOCG4_M 14
213#define DOCG4_T 4
214
215#define DOCG4_FACTORY_BBT_PAGE 16
216#define DOCG4_REDUNDANT_BBT_PAGE 24
217
218
219
220
221
222
223
224
225static struct nand_ecclayout docg4_oobinfo = {
226 .eccbytes = 9,
227 .eccpos = {7, 8, 9, 10, 11, 12, 13, 14, 15},
228 .oobavail = 5,
229 .oobfree = { {.offset = 2, .length = 5} }
230};
231
232
233
234
235
236
237static inline void write_nop(void __iomem *docptr)
238{
239 writew(0, docptr + DOC_NOP);
240}
241
242static void docg4_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
243{
244 int i;
245 struct nand_chip *nand = mtd->priv;
246 uint16_t *p = (uint16_t *) buf;
247 len >>= 1;
248
249 for (i = 0; i < len; i++)
250 p[i] = readw(nand->IO_ADDR_R);
251}
252
253static void docg4_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
254{
255 int i;
256 struct nand_chip *nand = mtd->priv;
257 uint16_t *p = (uint16_t *) buf;
258 len >>= 1;
259
260 for (i = 0; i < len; i++)
261 writew(p[i], nand->IO_ADDR_W);
262}
263
264static int poll_status(struct docg4_priv *doc)
265{
266
267
268
269
270
271
272 uint16_t flash_status;
273 unsigned long timeo;
274 void __iomem *docptr = doc->virtadr;
275
276 dev_dbg(doc->dev, "%s...\n", __func__);
277
278
279 flash_status = readw(docptr + DOC_FLASHCONTROL);
280
281 timeo = jiffies + msecs_to_jiffies(200);
282 do {
283 cpu_relax();
284 flash_status = readb(docptr + DOC_FLASHCONTROL);
285 } while (!(flash_status & DOC_CTRL_FLASHREADY) &&
286 time_before(jiffies, timeo));
287
288 if (unlikely(!(flash_status & DOC_CTRL_FLASHREADY))) {
289 dev_err(doc->dev, "%s: timed out!\n", __func__);
290 return NAND_STATUS_FAIL;
291 }
292
293 return 0;
294}
295
296
297static int docg4_wait(struct mtd_info *mtd, struct nand_chip *nand)
298{
299
300 struct docg4_priv *doc = nand->priv;
301 int status = NAND_STATUS_WP;
302 dev_dbg(doc->dev, "%s...\n", __func__);
303
304
305 if (doc->status) {
306 status |= doc->status;
307 doc->status = 0;
308 return status;
309 }
310
311 status |= poll_status(doc);
312 return status;
313}
314
315static void docg4_select_chip(struct mtd_info *mtd, int chip)
316{
317
318
319
320
321 struct nand_chip *nand = mtd->priv;
322 struct docg4_priv *doc = nand->priv;
323 void __iomem *docptr = doc->virtadr;
324
325 dev_dbg(doc->dev, "%s: chip %d\n", __func__, chip);
326
327 if (chip < 0)
328 return;
329
330 if (chip > 0)
331 dev_warn(doc->dev, "multiple floors currently unsupported\n");
332
333 writew(0, docptr + DOC_DEVICESELECT);
334}
335
336static void reset(struct mtd_info *mtd)
337{
338
339
340 struct nand_chip *nand = mtd->priv;
341 struct docg4_priv *doc = nand->priv;
342 void __iomem *docptr = doc->virtadr;
343
344 writew(DOC_ASICMODE_RESET | DOC_ASICMODE_MDWREN,
345 docptr + DOC_ASICMODE);
346 writew(~(DOC_ASICMODE_RESET | DOC_ASICMODE_MDWREN),
347 docptr + DOC_ASICMODECONFIRM);
348 write_nop(docptr);
349
350 writew(DOC_ASICMODE_NORMAL | DOC_ASICMODE_MDWREN,
351 docptr + DOC_ASICMODE);
352 writew(~(DOC_ASICMODE_NORMAL | DOC_ASICMODE_MDWREN),
353 docptr + DOC_ASICMODECONFIRM);
354
355 writew(DOC_ECCCONF1_ECC_ENABLE, docptr + DOC_ECCCONF1);
356
357 poll_status(doc);
358}
359
360static void read_hw_ecc(void __iomem *docptr, uint8_t *ecc_buf)
361{
362
363
364 int i;
365 for (i = 0; i < 7; i++) {
366 ecc_buf[i] = readb(docptr + DOC_BCH_SYNDROM(i));
367 ecc_buf[i] = readb(docptr + DOC_BCH_SYNDROM(i));
368 }
369}
370
371static int correct_data(struct mtd_info *mtd, uint8_t *buf, int page)
372{
373
374
375
376
377
378 struct nand_chip *nand = mtd->priv;
379 struct docg4_priv *doc = nand->priv;
380 void __iomem *docptr = doc->virtadr;
381 int i, numerrs, errpos[4];
382 const uint8_t blank_read_hwecc[8] = {
383 0xcf, 0x72, 0xfc, 0x1b, 0xa9, 0xc7, 0xb9, 0 };
384
385 read_hw_ecc(docptr, doc->ecc_buf);
386
387
388 if (!memcmp(doc->ecc_buf, blank_read_hwecc, 7))
389 return 0;
390
391
392 if (ignore_badblocks == false) {
393
394
395
396
397
398
399
400
401
402
403 if (nand->oob_poi[15]) {
404 int bit, numsetbits = 0;
405 unsigned long written_flag = nand->oob_poi[15];
406 for_each_set_bit(bit, &written_flag, 8)
407 numsetbits++;
408 if (numsetbits > 4) {
409 dev_warn(doc->dev,
410 "error(s) in blank page "
411 "at offset %08x\n",
412 page * DOCG4_PAGE_SIZE);
413 return 0;
414 }
415 }
416 }
417
418
419
420
421
422
423
424
425 for (i = 0; i < 7; i++)
426 doc->ecc_buf[i] = bitrev8(doc->ecc_buf[i]);
427
428 numerrs = decode_bch(doc->bch, NULL, DOCG4_USERDATA_LEN, NULL,
429 doc->ecc_buf, NULL, errpos);
430
431 if (numerrs == -EBADMSG) {
432 dev_warn(doc->dev, "uncorrectable errors at offset %08x\n",
433 page * DOCG4_PAGE_SIZE);
434 return -EBADMSG;
435 }
436
437 BUG_ON(numerrs < 0);
438
439
440 for (i = 0; i < numerrs; i++)
441 errpos[i] = (errpos[i] & ~7)|(7-(errpos[i] & 7));
442
443
444 for (i = 0; i < numerrs; i++) {
445
446
447 if (errpos[i] > DOCG4_USERDATA_LEN * 8)
448 continue;
449
450
451 if (errpos[i] > DOCG4_PAGE_SIZE * 8)
452 change_bit(errpos[i] - DOCG4_PAGE_SIZE * 8,
453 (unsigned long *)nand->oob_poi);
454
455 else
456 change_bit(errpos[i], (unsigned long *)buf);
457 }
458
459 dev_notice(doc->dev, "%d error(s) corrected at offset %08x\n",
460 numerrs, page * DOCG4_PAGE_SIZE);
461
462 return numerrs;
463}
464
465static uint8_t docg4_read_byte(struct mtd_info *mtd)
466{
467 struct nand_chip *nand = mtd->priv;
468 struct docg4_priv *doc = nand->priv;
469
470 dev_dbg(doc->dev, "%s\n", __func__);
471
472 if (doc->last_command.command == NAND_CMD_STATUS) {
473 int status;
474
475
476
477
478
479
480 doc->last_command.command = 0;
481
482 if (doc->status) {
483 status = doc->status;
484 doc->status = 0;
485 }
486
487
488 else
489 status = NAND_STATUS_WP | NAND_STATUS_READY;
490
491 return status;
492 }
493
494 dev_warn(doc->dev, "unexpected call to read_byte()\n");
495
496 return 0;
497}
498
499static void write_addr(struct docg4_priv *doc, uint32_t docg4_addr)
500{
501
502
503 void __iomem *docptr = doc->virtadr;
504 writeb(docg4_addr & 0xff, docptr + DOC_FLASHADDRESS);
505 docg4_addr >>= 8;
506 writeb(docg4_addr & 0xff, docptr + DOC_FLASHADDRESS);
507 docg4_addr >>= 8;
508 writeb(docg4_addr & 0xff, docptr + DOC_FLASHADDRESS);
509 docg4_addr >>= 8;
510 writeb(docg4_addr & 0xff, docptr + DOC_FLASHADDRESS);
511}
512
513static int read_progstatus(struct docg4_priv *doc)
514{
515
516
517
518
519
520 void __iomem *docptr = doc->virtadr;
521
522
523 uint16_t status1 = readw(docptr + DOC_IOSPACE_DATA);
524 uint16_t status2 = readw(docptr + DOC_IOSPACE_DATA);
525 uint16_t status3 = readw(docptr + DOCG4_MYSTERY_REG);
526
527 dev_dbg(doc->dev, "docg4: %s: %02x %02x %02x\n",
528 __func__, status1, status2, status3);
529
530 if (status1 != DOCG4_PROGSTATUS_GOOD
531 || status2 != DOCG4_PROGSTATUS_GOOD_2
532 || status3 != DOCG4_PROGSTATUS_GOOD_2) {
533 doc->status = NAND_STATUS_FAIL;
534 dev_warn(doc->dev, "read_progstatus failed: "
535 "%02x, %02x, %02x\n", status1, status2, status3);
536 return -EIO;
537 }
538 return 0;
539}
540
541static int pageprog(struct mtd_info *mtd)
542{
543
544
545
546
547
548 struct nand_chip *nand = mtd->priv;
549 struct docg4_priv *doc = nand->priv;
550 void __iomem *docptr = doc->virtadr;
551 int retval = 0;
552
553 dev_dbg(doc->dev, "docg4: %s\n", __func__);
554
555 writew(DOCG4_SEQ_PAGEPROG, docptr + DOC_FLASHSEQUENCE);
556 writew(DOC_CMD_PROG_CYCLE2, docptr + DOC_FLASHCOMMAND);
557 write_nop(docptr);
558 write_nop(docptr);
559
560
561 poll_status(doc);
562
563 writew(DOCG4_SEQ_FLUSH, docptr + DOC_FLASHSEQUENCE);
564 writew(DOCG4_CMD_FLUSH, docptr + DOC_FLASHCOMMAND);
565 writew(DOC_ECCCONF0_READ_MODE | 4, docptr + DOC_ECCCONF0);
566 write_nop(docptr);
567 write_nop(docptr);
568 write_nop(docptr);
569 write_nop(docptr);
570 write_nop(docptr);
571
572 retval = read_progstatus(doc);
573 writew(0, docptr + DOC_DATAEND);
574 write_nop(docptr);
575 poll_status(doc);
576 write_nop(docptr);
577
578 return retval;
579}
580
581static void sequence_reset(struct mtd_info *mtd)
582{
583
584
585 struct nand_chip *nand = mtd->priv;
586 struct docg4_priv *doc = nand->priv;
587 void __iomem *docptr = doc->virtadr;
588
589 writew(DOC_CTRL_UNKNOWN | DOC_CTRL_CE, docptr + DOC_FLASHCONTROL);
590 writew(DOC_SEQ_RESET, docptr + DOC_FLASHSEQUENCE);
591 writew(DOC_CMD_RESET, docptr + DOC_FLASHCOMMAND);
592 write_nop(docptr);
593 write_nop(docptr);
594 poll_status(doc);
595 write_nop(docptr);
596}
597
598static void read_page_prologue(struct mtd_info *mtd, uint32_t docg4_addr)
599{
600
601
602 struct nand_chip *nand = mtd->priv;
603 struct docg4_priv *doc = nand->priv;
604 void __iomem *docptr = doc->virtadr;
605
606 dev_dbg(doc->dev,
607 "docg4: %s: g4 page %08x\n", __func__, docg4_addr);
608
609 sequence_reset(mtd);
610
611 writew(DOCG4_SEQ_PAGE_READ, docptr + DOC_FLASHSEQUENCE);
612 writew(DOCG4_CMD_PAGE_READ, docptr + DOC_FLASHCOMMAND);
613 write_nop(docptr);
614
615 write_addr(doc, docg4_addr);
616
617 write_nop(docptr);
618 writew(DOCG4_CMD_READ2, docptr + DOC_FLASHCOMMAND);
619 write_nop(docptr);
620 write_nop(docptr);
621
622 poll_status(doc);
623}
624
625static void write_page_prologue(struct mtd_info *mtd, uint32_t docg4_addr)
626{
627
628
629 struct nand_chip *nand = mtd->priv;
630 struct docg4_priv *doc = nand->priv;
631 void __iomem *docptr = doc->virtadr;
632
633 dev_dbg(doc->dev,
634 "docg4: %s: g4 addr: %x\n", __func__, docg4_addr);
635 sequence_reset(mtd);
636
637 if (unlikely(reliable_mode)) {
638 writew(DOCG4_SEQ_SETMODE, docptr + DOC_FLASHSEQUENCE);
639 writew(DOCG4_CMD_FAST_MODE, docptr + DOC_FLASHCOMMAND);
640 writew(DOC_CMD_RELIABLE_MODE, docptr + DOC_FLASHCOMMAND);
641 write_nop(docptr);
642 }
643
644 writew(DOCG4_SEQ_PAGEWRITE, docptr + DOC_FLASHSEQUENCE);
645 writew(DOCG4_CMD_PAGEWRITE, docptr + DOC_FLASHCOMMAND);
646 write_nop(docptr);
647 write_addr(doc, docg4_addr);
648 write_nop(docptr);
649 write_nop(docptr);
650 poll_status(doc);
651}
652
653static uint32_t mtd_to_docg4_address(int page, int column)
654{
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684 int g4_page = page / 4;
685 int g4_index = (page % 4) * 0x108 + column/2;
686 return (g4_page << 16) | g4_index;
687}
688
689static void docg4_command(struct mtd_info *mtd, unsigned command, int column,
690 int page_addr)
691{
692
693
694 struct nand_chip *nand = mtd->priv;
695 struct docg4_priv *doc = nand->priv;
696 uint32_t g4_addr = mtd_to_docg4_address(page_addr, column);
697
698 dev_dbg(doc->dev, "%s %x, page_addr=%x, column=%x\n",
699 __func__, command, page_addr, column);
700
701
702
703
704
705 doc->last_command.command = command;
706 doc->last_command.column = column;
707 doc->last_command.page = page_addr;
708
709 switch (command) {
710
711 case NAND_CMD_RESET:
712 reset(mtd);
713 break;
714
715 case NAND_CMD_READ0:
716 read_page_prologue(mtd, g4_addr);
717 break;
718
719 case NAND_CMD_STATUS:
720
721 break;
722
723 case NAND_CMD_SEQIN:
724 if (unlikely(reliable_mode)) {
725 uint16_t g4_page = g4_addr >> 16;
726
727
728 if (g4_page & 0x01)
729 dev_warn(doc->dev,
730 "invalid reliable mode address\n");
731 }
732
733 write_page_prologue(mtd, g4_addr);
734
735
736 if (doc->oob_page == page_addr)
737 memcpy(nand->oob_poi, doc->oob_buf, 16);
738 break;
739
740 case NAND_CMD_PAGEPROG:
741 pageprog(mtd);
742 break;
743
744
745 case NAND_CMD_READOOB:
746 case NAND_CMD_READID:
747 case NAND_CMD_ERASE1:
748 case NAND_CMD_ERASE2:
749 dev_warn(doc->dev, "docg4_command: "
750 "unexpected nand command 0x%x\n", command);
751 break;
752
753 }
754}
755
756static int read_page(struct mtd_info *mtd, struct nand_chip *nand,
757 uint8_t *buf, int page, bool use_ecc)
758{
759 struct docg4_priv *doc = nand->priv;
760 void __iomem *docptr = doc->virtadr;
761 uint16_t status, edc_err, *buf16;
762 int bits_corrected = 0;
763
764 dev_dbg(doc->dev, "%s: page %08x\n", __func__, page);
765
766 writew(DOC_ECCCONF0_READ_MODE |
767 DOC_ECCCONF0_ECC_ENABLE |
768 DOC_ECCCONF0_UNKNOWN |
769 DOCG4_BCH_SIZE,
770 docptr + DOC_ECCCONF0);
771 write_nop(docptr);
772 write_nop(docptr);
773 write_nop(docptr);
774 write_nop(docptr);
775 write_nop(docptr);
776
777
778 status = readw(docptr + DOC_IOSPACE_DATA);
779 if (status & DOCG4_READ_ERROR) {
780 dev_err(doc->dev,
781 "docg4_read_page: bad status: 0x%02x\n", status);
782 writew(0, docptr + DOC_DATAEND);
783 return -EIO;
784 }
785
786 dev_dbg(doc->dev, "%s: status = 0x%x\n", __func__, status);
787
788 docg4_read_buf(mtd, buf, DOCG4_PAGE_SIZE);
789
790
791
792 docg4_read_buf(mtd, nand->oob_poi, 14);
793
794
795 buf16 = (uint16_t *)(nand->oob_poi + 14);
796 *buf16 = readw(docptr + DOCG4_MYSTERY_REG);
797
798 write_nop(docptr);
799
800 if (likely(use_ecc == true)) {
801
802
803 edc_err = readw(docptr + DOC_ECCCONF1);
804 edc_err = readw(docptr + DOC_ECCCONF1);
805 dev_dbg(doc->dev, "%s: edc_err = 0x%02x\n", __func__, edc_err);
806
807
808 if (edc_err & DOC_ECCCONF1_BCH_SYNDROM_ERR) {
809 bits_corrected = correct_data(mtd, buf, page);
810 if (bits_corrected == -EBADMSG)
811 mtd->ecc_stats.failed++;
812 else
813 mtd->ecc_stats.corrected += bits_corrected;
814 }
815 }
816
817 writew(0, docptr + DOC_DATAEND);
818 if (bits_corrected == -EBADMSG)
819 return 0;
820 return bits_corrected;
821}
822
823
824static int docg4_read_page_raw(struct mtd_info *mtd, struct nand_chip *nand,
825 uint8_t *buf, int oob_required, int page)
826{
827 return read_page(mtd, nand, buf, page, false);
828}
829
830static int docg4_read_page(struct mtd_info *mtd, struct nand_chip *nand,
831 uint8_t *buf, int oob_required, int page)
832{
833 return read_page(mtd, nand, buf, page, true);
834}
835
836static int docg4_read_oob(struct mtd_info *mtd, struct nand_chip *nand,
837 int page)
838{
839 struct docg4_priv *doc = nand->priv;
840 void __iomem *docptr = doc->virtadr;
841 uint16_t status;
842
843 dev_dbg(doc->dev, "%s: page %x\n", __func__, page);
844
845 docg4_command(mtd, NAND_CMD_READ0, nand->ecc.size, page);
846
847 writew(DOC_ECCCONF0_READ_MODE | DOCG4_OOB_SIZE, docptr + DOC_ECCCONF0);
848 write_nop(docptr);
849 write_nop(docptr);
850 write_nop(docptr);
851 write_nop(docptr);
852 write_nop(docptr);
853
854
855 status = readw(docptr + DOC_IOSPACE_DATA);
856 if (status & DOCG4_READ_ERROR) {
857 dev_warn(doc->dev,
858 "docg4_read_oob failed: status = 0x%02x\n", status);
859 return -EIO;
860 }
861
862 dev_dbg(doc->dev, "%s: status = 0x%x\n", __func__, status);
863
864 docg4_read_buf(mtd, nand->oob_poi, 16);
865
866 write_nop(docptr);
867 write_nop(docptr);
868 write_nop(docptr);
869 writew(0, docptr + DOC_DATAEND);
870 write_nop(docptr);
871
872 return 0;
873}
874
875static void docg4_erase_block(struct mtd_info *mtd, int page)
876{
877 struct nand_chip *nand = mtd->priv;
878 struct docg4_priv *doc = nand->priv;
879 void __iomem *docptr = doc->virtadr;
880 uint16_t g4_page;
881
882 dev_dbg(doc->dev, "%s: page %04x\n", __func__, page);
883
884 sequence_reset(mtd);
885
886 writew(DOCG4_SEQ_BLOCKERASE, docptr + DOC_FLASHSEQUENCE);
887 writew(DOC_CMD_PROG_BLOCK_ADDR, docptr + DOC_FLASHCOMMAND);
888 write_nop(docptr);
889
890
891 g4_page = (uint16_t)(page / 4);
892 writeb(g4_page & 0xff, docptr + DOC_FLASHADDRESS);
893 g4_page >>= 8;
894 writeb(g4_page & 0xff, docptr + DOC_FLASHADDRESS);
895 write_nop(docptr);
896
897
898 writew(DOC_CMD_ERASECYCLE2, docptr + DOC_FLASHCOMMAND);
899 write_nop(docptr);
900 write_nop(docptr);
901
902 usleep_range(500, 1000);
903 poll_status(doc);
904 writew(DOCG4_SEQ_FLUSH, docptr + DOC_FLASHSEQUENCE);
905 writew(DOCG4_CMD_FLUSH, docptr + DOC_FLASHCOMMAND);
906 writew(DOC_ECCCONF0_READ_MODE | 4, docptr + DOC_ECCCONF0);
907 write_nop(docptr);
908 write_nop(docptr);
909 write_nop(docptr);
910 write_nop(docptr);
911 write_nop(docptr);
912
913 read_progstatus(doc);
914
915 writew(0, docptr + DOC_DATAEND);
916 write_nop(docptr);
917 poll_status(doc);
918 write_nop(docptr);
919}
920
921static int write_page(struct mtd_info *mtd, struct nand_chip *nand,
922 const uint8_t *buf, bool use_ecc)
923{
924 struct docg4_priv *doc = nand->priv;
925 void __iomem *docptr = doc->virtadr;
926 uint8_t ecc_buf[8];
927
928 dev_dbg(doc->dev, "%s...\n", __func__);
929
930 writew(DOC_ECCCONF0_ECC_ENABLE |
931 DOC_ECCCONF0_UNKNOWN |
932 DOCG4_BCH_SIZE,
933 docptr + DOC_ECCCONF0);
934 write_nop(docptr);
935
936
937 docg4_write_buf16(mtd, buf, DOCG4_PAGE_SIZE);
938
939
940 docg4_write_buf16(mtd, nand->oob_poi, 6);
941
942
943 writew(nand->oob_poi[6], docptr + DOCG4_OOB_6_7);
944
945 write_nop(docptr);
946 write_nop(docptr);
947
948
949 if (likely(use_ecc == true)) {
950
951 uint8_t hamming = readb(docptr + DOC_HAMMINGPARITY);
952 hamming = readb(docptr + DOC_HAMMINGPARITY);
953 writew(hamming, docptr + DOCG4_OOB_6_7);
954 write_nop(docptr);
955
956
957 read_hw_ecc(docptr, ecc_buf);
958 ecc_buf[7] = 0;
959 }
960
961
962 else {
963 writew(nand->oob_poi[7], docptr + DOCG4_OOB_6_7);
964 write_nop(docptr);
965 memcpy(ecc_buf, &nand->oob_poi[8], 8);
966 }
967
968 docg4_write_buf16(mtd, ecc_buf, 8);
969 write_nop(docptr);
970 write_nop(docptr);
971 writew(0, docptr + DOC_DATAEND);
972 write_nop(docptr);
973
974 return 0;
975}
976
977static int docg4_write_page_raw(struct mtd_info *mtd, struct nand_chip *nand,
978 const uint8_t *buf, int oob_required)
979{
980 return write_page(mtd, nand, buf, false);
981}
982
983static int docg4_write_page(struct mtd_info *mtd, struct nand_chip *nand,
984 const uint8_t *buf, int oob_required)
985{
986 return write_page(mtd, nand, buf, true);
987}
988
989static int docg4_write_oob(struct mtd_info *mtd, struct nand_chip *nand,
990 int page)
991{
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004 struct docg4_priv *doc = nand->priv;
1005 doc->oob_page = page;
1006 memcpy(doc->oob_buf, nand->oob_poi, 16);
1007 return 0;
1008}
1009
1010static int __init read_factory_bbt(struct mtd_info *mtd)
1011{
1012
1013
1014
1015
1016
1017 struct nand_chip *nand = mtd->priv;
1018 struct docg4_priv *doc = nand->priv;
1019 uint32_t g4_addr = mtd_to_docg4_address(DOCG4_FACTORY_BBT_PAGE, 0);
1020 uint8_t *buf;
1021 int i, block;
1022 __u32 eccfailed_stats = mtd->ecc_stats.failed;
1023
1024 buf = kzalloc(DOCG4_PAGE_SIZE, GFP_KERNEL);
1025 if (buf == NULL)
1026 return -ENOMEM;
1027
1028 read_page_prologue(mtd, g4_addr);
1029 docg4_read_page(mtd, nand, buf, 0, DOCG4_FACTORY_BBT_PAGE);
1030
1031
1032
1033
1034
1035
1036
1037
1038 if (nand->bbt == NULL)
1039 goto exit;
1040
1041 if (mtd->ecc_stats.failed > eccfailed_stats) {
1042
1043
1044
1045
1046 eccfailed_stats = mtd->ecc_stats.failed;
1047 docg4_read_page(mtd, nand, buf, 0, DOCG4_REDUNDANT_BBT_PAGE);
1048 if (mtd->ecc_stats.failed > eccfailed_stats) {
1049 dev_warn(doc->dev,
1050 "The factory bbt could not be read!\n");
1051 goto exit;
1052 }
1053 }
1054
1055
1056
1057
1058
1059
1060 for (i = block = 0; block < DOCG4_NUMBLOCKS; block += 8, i++) {
1061 int bitnum;
1062 unsigned long bits = ~buf[i];
1063 for_each_set_bit(bitnum, &bits, 8) {
1064 int badblock = block + 7 - bitnum;
1065 nand->bbt[badblock / 4] |=
1066 0x03 << ((badblock % 4) * 2);
1067 mtd->ecc_stats.badblocks++;
1068 dev_notice(doc->dev, "factory-marked bad block: %d\n",
1069 badblock);
1070 }
1071 }
1072 exit:
1073 kfree(buf);
1074 return 0;
1075}
1076
1077static int docg4_block_markbad(struct mtd_info *mtd, loff_t ofs)
1078{
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088 int ret, i;
1089 uint8_t *buf;
1090 struct nand_chip *nand = mtd->priv;
1091 struct docg4_priv *doc = nand->priv;
1092 struct nand_bbt_descr *bbtd = nand->badblock_pattern;
1093 int page = (int)(ofs >> nand->page_shift);
1094 uint32_t g4_addr = mtd_to_docg4_address(page, 0);
1095
1096 dev_dbg(doc->dev, "%s: %08llx\n", __func__, ofs);
1097
1098 if (unlikely(ofs & (DOCG4_BLOCK_SIZE - 1)))
1099 dev_warn(doc->dev, "%s: ofs %llx not start of block!\n",
1100 __func__, ofs);
1101
1102
1103 buf = kzalloc(DOCG4_PAGE_SIZE, GFP_KERNEL);
1104 if (buf == NULL)
1105 return -ENOMEM;
1106
1107
1108 memset(nand->oob_poi, 0xff, mtd->oobsize);
1109 for (i = 0; i < bbtd->len; i++)
1110 nand->oob_poi[bbtd->offs + i] = ~bbtd->pattern[i];
1111
1112
1113 write_page_prologue(mtd, g4_addr);
1114 docg4_write_page(mtd, nand, buf, 1);
1115 ret = pageprog(mtd);
1116
1117 kfree(buf);
1118
1119 return ret;
1120}
1121
1122static int docg4_block_neverbad(struct mtd_info *mtd, loff_t ofs, int getchip)
1123{
1124
1125 return 0;
1126}
1127
1128static int docg4_suspend(struct platform_device *pdev, pm_message_t state)
1129{
1130
1131
1132
1133
1134
1135
1136
1137 int i;
1138 uint8_t pwr_down;
1139 struct docg4_priv *doc = platform_get_drvdata(pdev);
1140 void __iomem *docptr = doc->virtadr;
1141
1142 dev_dbg(doc->dev, "%s...\n", __func__);
1143
1144
1145 for (i = 0; i < 10; i++) {
1146 pwr_down = readb(docptr + DOC_POWERMODE);
1147 if (pwr_down & DOC_POWERDOWN_READY)
1148 break;
1149 usleep_range(1000, 4000);
1150 }
1151
1152 if (pwr_down & DOC_POWERDOWN_READY) {
1153 dev_err(doc->dev, "suspend failed; "
1154 "timeout polling DOC_POWERDOWN_READY\n");
1155 return -EIO;
1156 }
1157
1158 writew(DOC_ASICMODE_POWERDOWN | DOC_ASICMODE_MDWREN,
1159 docptr + DOC_ASICMODE);
1160 writew(~(DOC_ASICMODE_POWERDOWN | DOC_ASICMODE_MDWREN),
1161 docptr + DOC_ASICMODECONFIRM);
1162
1163 write_nop(docptr);
1164
1165 return 0;
1166}
1167
1168static int docg4_resume(struct platform_device *pdev)
1169{
1170
1171
1172
1173
1174
1175
1176 struct docg4_priv *doc = platform_get_drvdata(pdev);
1177 void __iomem *docptr = doc->virtadr;
1178 int i;
1179
1180 dev_dbg(doc->dev, "%s...\n", __func__);
1181
1182 for (i = 0; i < 12; i++)
1183 readb(docptr + 0x1fff);
1184
1185 return 0;
1186}
1187
1188static void __init init_mtd_structs(struct mtd_info *mtd)
1189{
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203 struct nand_chip *nand = mtd->priv;
1204 struct docg4_priv *doc = nand->priv;
1205
1206 mtd->size = DOCG4_CHIP_SIZE;
1207 mtd->name = "Msys_Diskonchip_G4";
1208 mtd->writesize = DOCG4_PAGE_SIZE;
1209 mtd->erasesize = DOCG4_BLOCK_SIZE;
1210 mtd->oobsize = DOCG4_OOB_SIZE;
1211 nand->chipsize = DOCG4_CHIP_SIZE;
1212 nand->chip_shift = DOCG4_CHIP_SHIFT;
1213 nand->bbt_erase_shift = nand->phys_erase_shift = DOCG4_ERASE_SHIFT;
1214 nand->chip_delay = 20;
1215 nand->page_shift = DOCG4_PAGE_SHIFT;
1216 nand->pagemask = 0x3ffff;
1217 nand->badblockpos = NAND_LARGE_BADBLOCK_POS;
1218 nand->badblockbits = 8;
1219 nand->ecc.layout = &docg4_oobinfo;
1220 nand->ecc.mode = NAND_ECC_HW_SYNDROME;
1221 nand->ecc.size = DOCG4_PAGE_SIZE;
1222 nand->ecc.prepad = 8;
1223 nand->ecc.bytes = 8;
1224 nand->ecc.strength = DOCG4_T;
1225 nand->options = NAND_BUSWIDTH_16 | NAND_NO_SUBPAGE_WRITE;
1226 nand->IO_ADDR_R = nand->IO_ADDR_W = doc->virtadr + DOC_IOSPACE_DATA;
1227 nand->controller = &nand->hwcontrol;
1228 spin_lock_init(&nand->controller->lock);
1229 init_waitqueue_head(&nand->controller->wq);
1230
1231
1232 nand->cmdfunc = docg4_command;
1233 nand->waitfunc = docg4_wait;
1234 nand->select_chip = docg4_select_chip;
1235 nand->read_byte = docg4_read_byte;
1236 nand->block_markbad = docg4_block_markbad;
1237 nand->read_buf = docg4_read_buf;
1238 nand->write_buf = docg4_write_buf16;
1239 nand->erase_cmd = docg4_erase_block;
1240 nand->ecc.read_page = docg4_read_page;
1241 nand->ecc.write_page = docg4_write_page;
1242 nand->ecc.read_page_raw = docg4_read_page_raw;
1243 nand->ecc.write_page_raw = docg4_write_page_raw;
1244 nand->ecc.read_oob = docg4_read_oob;
1245 nand->ecc.write_oob = docg4_write_oob;
1246
1247
1248
1249
1250
1251
1252
1253 if (ignore_badblocks) {
1254 nand->options |= NAND_SKIP_BBTSCAN;
1255 nand->block_bad = docg4_block_neverbad;
1256 }
1257
1258}
1259
1260static int __init read_id_reg(struct mtd_info *mtd)
1261{
1262 struct nand_chip *nand = mtd->priv;
1263 struct docg4_priv *doc = nand->priv;
1264 void __iomem *docptr = doc->virtadr;
1265 uint16_t id1, id2;
1266
1267
1268 id1 = readw(docptr + DOC_CHIPID);
1269 id1 = readw(docptr + DOCG4_MYSTERY_REG);
1270 id2 = readw(docptr + DOC_CHIPID_INV);
1271 id2 = readw(docptr + DOCG4_MYSTERY_REG);
1272
1273 if (id1 == DOCG4_IDREG1_VALUE && id2 == DOCG4_IDREG2_VALUE) {
1274 dev_info(doc->dev,
1275 "NAND device: 128MiB Diskonchip G4 detected\n");
1276 return 0;
1277 }
1278
1279 return -ENODEV;
1280}
1281
1282static char const *part_probes[] = { "cmdlinepart", "saftlpart", NULL };
1283
1284static int __init probe_docg4(struct platform_device *pdev)
1285{
1286 struct mtd_info *mtd;
1287 struct nand_chip *nand;
1288 void __iomem *virtadr;
1289 struct docg4_priv *doc;
1290 int len, retval;
1291 struct resource *r;
1292 struct device *dev = &pdev->dev;
1293
1294 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1295 if (r == NULL) {
1296 dev_err(dev, "no io memory resource defined!\n");
1297 return -ENODEV;
1298 }
1299
1300 virtadr = ioremap(r->start, resource_size(r));
1301 if (!virtadr) {
1302 dev_err(dev, "Diskonchip ioremap failed: %pR\n", r);
1303 return -EIO;
1304 }
1305
1306 len = sizeof(struct mtd_info) + sizeof(struct nand_chip) +
1307 sizeof(struct docg4_priv);
1308 mtd = kzalloc(len, GFP_KERNEL);
1309 if (mtd == NULL) {
1310 retval = -ENOMEM;
1311 goto fail;
1312 }
1313 nand = (struct nand_chip *) (mtd + 1);
1314 doc = (struct docg4_priv *) (nand + 1);
1315 mtd->priv = nand;
1316 nand->priv = doc;
1317 mtd->owner = THIS_MODULE;
1318 doc->virtadr = virtadr;
1319 doc->dev = dev;
1320
1321 init_mtd_structs(mtd);
1322
1323
1324 doc->bch = init_bch(DOCG4_M, DOCG4_T, DOCG4_PRIMITIVE_POLY);
1325 if (doc->bch == NULL) {
1326 retval = -EINVAL;
1327 goto fail;
1328 }
1329
1330 platform_set_drvdata(pdev, doc);
1331
1332 reset(mtd);
1333 retval = read_id_reg(mtd);
1334 if (retval == -ENODEV) {
1335 dev_warn(dev, "No diskonchip G4 device found.\n");
1336 goto fail;
1337 }
1338
1339 retval = nand_scan_tail(mtd);
1340 if (retval)
1341 goto fail;
1342
1343 retval = read_factory_bbt(mtd);
1344 if (retval)
1345 goto fail;
1346
1347 retval = mtd_device_parse_register(mtd, part_probes, NULL, NULL, 0);
1348 if (retval)
1349 goto fail;
1350
1351 doc->mtd = mtd;
1352 return 0;
1353
1354 fail:
1355 iounmap(virtadr);
1356 if (mtd) {
1357
1358 struct nand_chip *nand = mtd->priv;
1359 struct docg4_priv *doc = nand->priv;
1360 nand_release(mtd);
1361 free_bch(doc->bch);
1362 kfree(mtd);
1363 }
1364
1365 return retval;
1366}
1367
1368static int __exit cleanup_docg4(struct platform_device *pdev)
1369{
1370 struct docg4_priv *doc = platform_get_drvdata(pdev);
1371 nand_release(doc->mtd);
1372 free_bch(doc->bch);
1373 kfree(doc->mtd);
1374 iounmap(doc->virtadr);
1375 return 0;
1376}
1377
1378static struct platform_driver docg4_driver = {
1379 .driver = {
1380 .name = "docg4",
1381 .owner = THIS_MODULE,
1382 },
1383 .suspend = docg4_suspend,
1384 .resume = docg4_resume,
1385 .remove = __exit_p(cleanup_docg4),
1386};
1387
1388module_platform_driver_probe(docg4_driver, probe_docg4);
1389
1390MODULE_LICENSE("GPL");
1391MODULE_AUTHOR("Mike Dunn");
1392MODULE_DESCRIPTION("M-Systems DiskOnChip G4 device driver");
1393