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26#include <linux/delay.h>
27#include "sn9c102_sensor.h"
28#include "sn9c102_devtable.h"
29
30
31static int pas202bcb_init(struct sn9c102_device* cam)
32{
33 int err = 0;
34
35 switch (sn9c102_get_bridge(cam)) {
36 case BRIDGE_SN9C101:
37 case BRIDGE_SN9C102:
38 err = sn9c102_write_const_regs(cam, {0x00, 0x10}, {0x00, 0x11},
39 {0x00, 0x14}, {0x20, 0x17},
40 {0x30, 0x19}, {0x09, 0x18});
41 break;
42 case BRIDGE_SN9C103:
43 err = sn9c102_write_const_regs(cam, {0x00, 0x02}, {0x00, 0x03},
44 {0x1a, 0x04}, {0x20, 0x05},
45 {0x20, 0x06}, {0x20, 0x07},
46 {0x00, 0x10}, {0x00, 0x11},
47 {0x00, 0x14}, {0x20, 0x17},
48 {0x30, 0x19}, {0x09, 0x18},
49 {0x02, 0x1c}, {0x03, 0x1d},
50 {0x0f, 0x1e}, {0x0c, 0x1f},
51 {0x00, 0x20}, {0x10, 0x21},
52 {0x20, 0x22}, {0x30, 0x23},
53 {0x40, 0x24}, {0x50, 0x25},
54 {0x60, 0x26}, {0x70, 0x27},
55 {0x80, 0x28}, {0x90, 0x29},
56 {0xa0, 0x2a}, {0xb0, 0x2b},
57 {0xc0, 0x2c}, {0xd0, 0x2d},
58 {0xe0, 0x2e}, {0xf0, 0x2f},
59 {0xff, 0x30});
60 break;
61 default:
62 break;
63 }
64
65 err += sn9c102_i2c_write(cam, 0x02, 0x14);
66 err += sn9c102_i2c_write(cam, 0x03, 0x40);
67 err += sn9c102_i2c_write(cam, 0x0d, 0x2c);
68 err += sn9c102_i2c_write(cam, 0x0e, 0x01);
69 err += sn9c102_i2c_write(cam, 0x0f, 0xa9);
70 err += sn9c102_i2c_write(cam, 0x10, 0x08);
71 err += sn9c102_i2c_write(cam, 0x13, 0x63);
72 err += sn9c102_i2c_write(cam, 0x15, 0x70);
73 err += sn9c102_i2c_write(cam, 0x11, 0x01);
74
75 msleep(400);
76
77 return err;
78}
79
80
81static int pas202bcb_get_ctrl(struct sn9c102_device* cam,
82 struct v4l2_control* ctrl)
83{
84 switch (ctrl->id) {
85 case V4L2_CID_EXPOSURE:
86 {
87 int r1 = sn9c102_i2c_read(cam, 0x04),
88 r2 = sn9c102_i2c_read(cam, 0x05);
89 if (r1 < 0 || r2 < 0)
90 return -EIO;
91 ctrl->value = (r1 << 6) | (r2 & 0x3f);
92 }
93 return 0;
94 case V4L2_CID_RED_BALANCE:
95 ctrl->value = sn9c102_i2c_read(cam, 0x09);
96 if (ctrl->value < 0)
97 return -EIO;
98 ctrl->value &= 0x0f;
99 return 0;
100 case V4L2_CID_BLUE_BALANCE:
101 ctrl->value = sn9c102_i2c_read(cam, 0x07);
102 if (ctrl->value < 0)
103 return -EIO;
104 ctrl->value &= 0x0f;
105 return 0;
106 case V4L2_CID_GAIN:
107 ctrl->value = sn9c102_i2c_read(cam, 0x10);
108 if (ctrl->value < 0)
109 return -EIO;
110 ctrl->value &= 0x1f;
111 return 0;
112 case SN9C102_V4L2_CID_GREEN_BALANCE:
113 ctrl->value = sn9c102_i2c_read(cam, 0x08);
114 if (ctrl->value < 0)
115 return -EIO;
116 ctrl->value &= 0x0f;
117 return 0;
118 case SN9C102_V4L2_CID_DAC_MAGNITUDE:
119 ctrl->value = sn9c102_i2c_read(cam, 0x0c);
120 if (ctrl->value < 0)
121 return -EIO;
122 return 0;
123 default:
124 return -EINVAL;
125 }
126}
127
128
129static int pas202bcb_set_pix_format(struct sn9c102_device* cam,
130 const struct v4l2_pix_format* pix)
131{
132 int err = 0;
133
134 if (pix->pixelformat == V4L2_PIX_FMT_SN9C10X)
135 err += sn9c102_write_reg(cam, 0x28, 0x17);
136 else
137 err += sn9c102_write_reg(cam, 0x20, 0x17);
138
139 return err;
140}
141
142
143static int pas202bcb_set_ctrl(struct sn9c102_device* cam,
144 const struct v4l2_control* ctrl)
145{
146 int err = 0;
147
148 switch (ctrl->id) {
149 case V4L2_CID_EXPOSURE:
150 err += sn9c102_i2c_write(cam, 0x04, ctrl->value >> 6);
151 err += sn9c102_i2c_write(cam, 0x05, ctrl->value & 0x3f);
152 break;
153 case V4L2_CID_RED_BALANCE:
154 err += sn9c102_i2c_write(cam, 0x09, ctrl->value);
155 break;
156 case V4L2_CID_BLUE_BALANCE:
157 err += sn9c102_i2c_write(cam, 0x07, ctrl->value);
158 break;
159 case V4L2_CID_GAIN:
160 err += sn9c102_i2c_write(cam, 0x10, ctrl->value);
161 break;
162 case SN9C102_V4L2_CID_GREEN_BALANCE:
163 err += sn9c102_i2c_write(cam, 0x08, ctrl->value);
164 break;
165 case SN9C102_V4L2_CID_DAC_MAGNITUDE:
166 err += sn9c102_i2c_write(cam, 0x0c, ctrl->value);
167 break;
168 default:
169 return -EINVAL;
170 }
171 err += sn9c102_i2c_write(cam, 0x11, 0x01);
172
173 return err ? -EIO : 0;
174}
175
176
177static int pas202bcb_set_crop(struct sn9c102_device* cam,
178 const struct v4l2_rect* rect)
179{
180 struct sn9c102_sensor* s = sn9c102_get_sensor(cam);
181 int err = 0;
182 u8 h_start = 0,
183 v_start = (u8)(rect->top - s->cropcap.bounds.top) + 3;
184
185 switch (sn9c102_get_bridge(cam)) {
186 case BRIDGE_SN9C101:
187 case BRIDGE_SN9C102:
188 h_start = (u8)(rect->left - s->cropcap.bounds.left) + 4;
189 break;
190 case BRIDGE_SN9C103:
191 h_start = (u8)(rect->left - s->cropcap.bounds.left) + 3;
192 break;
193 default:
194 break;
195 }
196
197 err += sn9c102_write_reg(cam, h_start, 0x12);
198 err += sn9c102_write_reg(cam, v_start, 0x13);
199
200 return err;
201}
202
203
204static const struct sn9c102_sensor pas202bcb = {
205 .name = "PAS202BCB",
206 .maintainer = "Luca Risolia <luca.risolia@studio.unibo.it>",
207 .supported_bridge = BRIDGE_SN9C101 | BRIDGE_SN9C102 | BRIDGE_SN9C103,
208 .sysfs_ops = SN9C102_I2C_READ | SN9C102_I2C_WRITE,
209 .frequency = SN9C102_I2C_400KHZ | SN9C102_I2C_100KHZ,
210 .interface = SN9C102_I2C_2WIRES,
211 .i2c_slave_id = 0x40,
212 .init = &pas202bcb_init,
213 .qctrl = {
214 {
215 .id = V4L2_CID_EXPOSURE,
216 .type = V4L2_CTRL_TYPE_INTEGER,
217 .name = "exposure",
218 .minimum = 0x01e5,
219 .maximum = 0x3fff,
220 .step = 0x0001,
221 .default_value = 0x01e5,
222 .flags = 0,
223 },
224 {
225 .id = V4L2_CID_GAIN,
226 .type = V4L2_CTRL_TYPE_INTEGER,
227 .name = "global gain",
228 .minimum = 0x00,
229 .maximum = 0x1f,
230 .step = 0x01,
231 .default_value = 0x0b,
232 .flags = 0,
233 },
234 {
235 .id = V4L2_CID_RED_BALANCE,
236 .type = V4L2_CTRL_TYPE_INTEGER,
237 .name = "red balance",
238 .minimum = 0x00,
239 .maximum = 0x0f,
240 .step = 0x01,
241 .default_value = 0x00,
242 .flags = 0,
243 },
244 {
245 .id = V4L2_CID_BLUE_BALANCE,
246 .type = V4L2_CTRL_TYPE_INTEGER,
247 .name = "blue balance",
248 .minimum = 0x00,
249 .maximum = 0x0f,
250 .step = 0x01,
251 .default_value = 0x05,
252 .flags = 0,
253 },
254 {
255 .id = SN9C102_V4L2_CID_GREEN_BALANCE,
256 .type = V4L2_CTRL_TYPE_INTEGER,
257 .name = "green balance",
258 .minimum = 0x00,
259 .maximum = 0x0f,
260 .step = 0x01,
261 .default_value = 0x00,
262 .flags = 0,
263 },
264 {
265 .id = SN9C102_V4L2_CID_DAC_MAGNITUDE,
266 .type = V4L2_CTRL_TYPE_INTEGER,
267 .name = "DAC magnitude",
268 .minimum = 0x00,
269 .maximum = 0xff,
270 .step = 0x01,
271 .default_value = 0x04,
272 .flags = 0,
273 },
274 },
275 .get_ctrl = &pas202bcb_get_ctrl,
276 .set_ctrl = &pas202bcb_set_ctrl,
277 .cropcap = {
278 .bounds = {
279 .left = 0,
280 .top = 0,
281 .width = 640,
282 .height = 480,
283 },
284 .defrect = {
285 .left = 0,
286 .top = 0,
287 .width = 640,
288 .height = 480,
289 },
290 },
291 .set_crop = &pas202bcb_set_crop,
292 .pix_format = {
293 .width = 640,
294 .height = 480,
295 .pixelformat = V4L2_PIX_FMT_SBGGR8,
296 .priv = 8,
297 },
298 .set_pix_format = &pas202bcb_set_pix_format
299};
300
301
302int sn9c102_probe_pas202bcb(struct sn9c102_device* cam)
303{
304 int r0 = 0, r1 = 0, err = 0;
305 unsigned int pid = 0;
306
307
308
309
310
311 switch (sn9c102_get_bridge(cam)) {
312 case BRIDGE_SN9C101:
313 case BRIDGE_SN9C102:
314 err = sn9c102_write_const_regs(cam,
315 {0x01, 0x01},
316 {0x40, 0x01},
317 {0x28, 0x17});
318 break;
319 case BRIDGE_SN9C103:
320 err = sn9c102_write_const_regs(cam, {0x09, 0x01}, {0x44, 0x01},
321 {0x44, 0x02}, {0x29, 0x17});
322 break;
323 default:
324 break;
325 }
326
327 r0 = sn9c102_i2c_try_read(cam, &pas202bcb, 0x00);
328 r1 = sn9c102_i2c_try_read(cam, &pas202bcb, 0x01);
329
330 if (err || r0 < 0 || r1 < 0)
331 return -EIO;
332
333 pid = (r0 << 4) | ((r1 & 0xf0) >> 4);
334 if (pid != 0x017)
335 return -ENODEV;
336
337 sn9c102_attach_sensor(cam, &pas202bcb);
338
339 return 0;
340}
341