LXR linux/drivers/staging/rtl8188eu/hal/odm

   1/******************************************************************************
   2 *
   3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   4 *
   5 * This program is free software; you can redistribute it and/or modify it
   6 * under the terms of version 2 of the GNU General Public License as
   7 * published by the Free Software Foundation.
   8 *
   9 * This program is distributed in the hope that it will be useful, but WITHOUT
  10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12 * more details.
  13 *
  14 * You should have received a copy of the GNU General Public License along with
  15 * this program; if not, write to the Free Software Foundation, Inc.,
  16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17 *
  18 *
  19 ******************************************************************************/
  20
  21/*  include files */
  22
  23#include "odm_precomp.h"
  24
  25#define READ_AND_CONFIG     READ_AND_CONFIG_MP
  26
  27#define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig##txt##ic(dm_odm))
  28#define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC##txt##ic(dm_odm))
  29
  30static u8 odm_QueryRxPwrPercentage(s8 AntPower)
  31{
  32        if ((AntPower <= -100) || (AntPower >= 20))
  33                return  0;
  34        else if (AntPower >= 0)
  35                return  100;
  36        else
  37                return 100+AntPower;
  38}
  39
  40/*  2012/01/12 MH MOve some signal strength smooth method to MP HAL layer. */
  41/*  IF other SW team do not support the feature, remove this section.?? */
  42static s32 odm_SignalScaleMapping_92CSeries(struct odm_dm_struct *dm_odm, s32 CurrSig)
  43{
  44        s32 RetSig = 0;
  45
  46        if (CurrSig >= 51 && CurrSig <= 100)
  47                RetSig = 100;
  48        else if (CurrSig >= 41 && CurrSig <= 50)
  49                RetSig = 80 + ((CurrSig - 40)*2);
  50        else if (CurrSig >= 31 && CurrSig <= 40)
  51                RetSig = 66 + (CurrSig - 30);
  52        else if (CurrSig >= 21 && CurrSig <= 30)
  53                RetSig = 54 + (CurrSig - 20);
  54        else if (CurrSig >= 10 && CurrSig <= 20)
  55                RetSig = 42 + (((CurrSig - 10) * 2) / 3);
  56        else if (CurrSig >= 5 && CurrSig <= 9)
  57                RetSig = 22 + (((CurrSig - 5) * 3) / 2);
  58        else if (CurrSig >= 1 && CurrSig <= 4)
  59                RetSig = 6 + (((CurrSig - 1) * 3) / 2);
  60        else
  61                RetSig = CurrSig;
  62        return RetSig;
  63}
  64
  65static s32 odm_SignalScaleMapping(struct odm_dm_struct *dm_odm, s32 CurrSig)
  66{
  67        return odm_SignalScaleMapping_92CSeries(dm_odm, CurrSig);
  68}
  69
  70static u8 odm_EVMdbToPercentage(s8 Value)
  71{
  72        /*  -33dB~0dB to 0%~99% */
  73        s8 ret_val;
  74
  75        ret_val = Value;
  76
  77        if (ret_val >= 0)
  78                ret_val = 0;
  79        if (ret_val <= -33)
  80                ret_val = -33;
  81
  82        ret_val = 0 - ret_val;
  83        ret_val *= 3;
  84
  85        if (ret_val == 99)
  86                ret_val = 100;
  87        return ret_val;
  88}
  89
  90static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
  91                        struct odm_phy_status_info *pPhyInfo,
  92                        u8 *pPhyStatus,
  93                        struct odm_per_pkt_info *pPktinfo)
  94{
  95        struct sw_ant_switch *pDM_SWAT_Table = &dm_odm->DM_SWAT_Table;
  96        u8 i, Max_spatial_stream;
  97        s8 rx_pwr[4], rx_pwr_all = 0;
  98        u8 EVM, PWDB_ALL = 0, PWDB_ALL_BT;
  99        u8 RSSI, total_rssi = 0;
 100        u8 isCCKrate = 0;
 101        u8 rf_rx_num = 0;
 102        u8 cck_highpwr = 0;
 103        u8 LNA_idx, VGA_idx;
 104
 105        struct phy_status_rpt *pPhyStaRpt = (struct phy_status_rpt *)pPhyStatus;
 106
 107        isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M)) ? true : false;
 108
 109        pPhyInfo->RxMIMOSignalQuality[RF_PATH_A] = -1;
 110        pPhyInfo->RxMIMOSignalQuality[RF_PATH_B] = -1;
 111
 112        if (isCCKrate) {
 113                u8 cck_agc_rpt;
 114
 115                dm_odm->PhyDbgInfo.NumQryPhyStatusCCK++;
 116                /*  (1)Hardware does not provide RSSI for CCK */
 117                /*  (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */
 118
 119                cck_highpwr = dm_odm->bCckHighPower;
 120
 121                cck_agc_rpt =  pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a ;
 122
 123                /* 2011.11.28 LukeLee: 88E use different LNA & VGA gain table */
 124                /* The RSSI formula should be modified according to the gain table */
 125                /* In 88E, cck_highpwr is always set to 1 */
 126                LNA_idx = ((cck_agc_rpt & 0xE0) >> 5);
 127                VGA_idx = (cck_agc_rpt & 0x1F);
 128                switch (LNA_idx) {
 129                case 7:
 130                        if (VGA_idx <= 27)
 131                                rx_pwr_all = -100 + 2*(27-VGA_idx); /* VGA_idx = 27~2 */
 132                        else
 133                                rx_pwr_all = -100;
 134                        break;
 135                case 6:
 136                        rx_pwr_all = -48 + 2*(2-VGA_idx); /* VGA_idx = 2~0 */
 137                        break;
 138                case 5:
 139                        rx_pwr_all = -42 + 2*(7-VGA_idx); /* VGA_idx = 7~5 */
 140                        break;
 141                case 4:
 142                        rx_pwr_all = -36 + 2*(7-VGA_idx); /* VGA_idx = 7~4 */
 143                        break;
 144                case 3:
 145                        rx_pwr_all = -24 + 2*(7-VGA_idx); /* VGA_idx = 7~0 */
 146                        break;
 147                case 2:
 148                        if (cck_highpwr)
 149                                rx_pwr_all = -12 + 2*(5-VGA_idx); /* VGA_idx = 5~0 */
 150                        else
 151                                rx_pwr_all = -6 + 2*(5-VGA_idx);
 152                        break;
 153                case 1:
 154                        rx_pwr_all = 8-2*VGA_idx;
 155                        break;
 156                case 0:
 157                        rx_pwr_all = 14-2*VGA_idx;
 158                        break;
 159                default:
 160                        break;
 161                }
 162                rx_pwr_all += 6;
 163                PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
 164                if (!cck_highpwr) {
 165                        if (PWDB_ALL >= 80)
 166                                PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80;
 167                        else if ((PWDB_ALL <= 78) && (PWDB_ALL >= 20))
 168                                PWDB_ALL += 3;
 169                        if (PWDB_ALL > 100)
 170                                PWDB_ALL = 100;
 171                }
 172
 173                pPhyInfo->RxPWDBAll = PWDB_ALL;
 174                pPhyInfo->BTRxRSSIPercentage = PWDB_ALL;
 175                pPhyInfo->RecvSignalPower = rx_pwr_all;
 176                /*  (3) Get Signal Quality (EVM) */
 177                if (pPktinfo->bPacketMatchBSSID) {
 178                        u8 SQ, SQ_rpt;
 179
 180                        if (pPhyInfo->RxPWDBAll > 40 && !dm_odm->bInHctTest) {
 181                                SQ = 100;
 182                        } else {
 183                                SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all;
 184
 185                                if (SQ_rpt > 64)
 186                                        SQ = 0;
 187                                else if (SQ_rpt < 20)
 188                                        SQ = 100;
 189                                else
 190                                        SQ = ((64-SQ_rpt) * 100) / 44;
 191                        }
 192                        pPhyInfo->SignalQuality = SQ;
 193                        pPhyInfo->RxMIMOSignalQuality[RF_PATH_A] = SQ;
 194                        pPhyInfo->RxMIMOSignalQuality[RF_PATH_B] = -1;
 195                }
 196        } else { /* is OFDM rate */
 197                dm_odm->PhyDbgInfo.NumQryPhyStatusOFDM++;
 198
 199                /*  (1)Get RSSI for HT rate */
 200
 201                 for (i = RF_PATH_A; i < RF_PATH_MAX; i++) {
 202                        /*  2008/01/30 MH we will judge RF RX path now. */
 203                        if (dm_odm->RFPathRxEnable & BIT(i))
 204                                rf_rx_num++;
 205
 206                        rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain & 0x3F)*2) - 110;
 207
 208                        pPhyInfo->RxPwr[i] = rx_pwr[i];
 209
 210                        /* Translate DBM to percentage. */
 211                        RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]);
 212                        total_rssi += RSSI;
 213
 214                        /* Modification for ext-LNA board */
 215                        if (dm_odm->BoardType == ODM_BOARD_HIGHPWR) {
 216                                if ((pPhyStaRpt->path_agc[i].trsw) == 1)
 217                                        RSSI = (RSSI > 94) ? 100 : (RSSI + 6);
 218                                else
 219                                        RSSI = (RSSI <= 16) ? (RSSI >> 3) : (RSSI - 16);
 220
 221                                if ((RSSI <= 34) && (RSSI >= 4))
 222                                        RSSI -= 4;
 223                        }
 224
 225                        pPhyInfo->RxMIMOSignalStrength[i] = (u8)RSSI;
 226
 227                        /* Get Rx snr value in DB */
 228                        pPhyInfo->RxSNR[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2);
 229                        dm_odm->PhyDbgInfo.RxSNRdB[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2);
 230                }
 231                /*  (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */
 232                rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1) & 0x7f) - 110;
 233
 234                PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
 235                PWDB_ALL_BT = PWDB_ALL;
 236
 237                pPhyInfo->RxPWDBAll = PWDB_ALL;
 238                pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT;
 239                pPhyInfo->RxPower = rx_pwr_all;
 240                pPhyInfo->RecvSignalPower = rx_pwr_all;
 241
 242                /*  (3)EVM of HT rate */
 243                if (pPktinfo->Rate >= DESC92C_RATEMCS8 && pPktinfo->Rate <= DESC92C_RATEMCS15)
 244                        Max_spatial_stream = 2; /* both spatial stream make sense */
 245                else
 246                        Max_spatial_stream = 1; /* only spatial stream 1 makes sense */
 247
 248                for (i = 0; i < Max_spatial_stream; i++) {
 249                        /*  Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */
 250                        /*  fill most significant bit to "zero" when doing shifting operation which may change a negative */
 251                        /*  value to positive one, then the dbm value (which is supposed to be negative)  is not correct anymore. */
 252                        EVM = odm_EVMdbToPercentage((pPhyStaRpt->stream_rxevm[i]));     /* dbm */
 253
 254                        if (pPktinfo->bPacketMatchBSSID) {
 255                                if (i == RF_PATH_A) /*  Fill value in RFD, Get the first spatial stream only */
 256                                        pPhyInfo->SignalQuality = (u8)(EVM & 0xff);
 257                                pPhyInfo->RxMIMOSignalQuality[i] = (u8)(EVM & 0xff);
 258                        }
 259                }
 260        }
 261        /* UI BSS List signal strength(in percentage), make it good looking, from 0~100. */
 262        /* It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). */
 263        if (isCCKrate) {
 264                pPhyInfo->SignalStrength = (u8)(odm_SignalScaleMapping(dm_odm, PWDB_ALL));/* PWDB_ALL; */
 265        } else {
 266                if (rf_rx_num != 0)
 267                        pPhyInfo->SignalStrength = (u8)(odm_SignalScaleMapping(dm_odm, total_rssi /= rf_rx_num));
 268        }
 269
 270        /* For 92C/92D HW (Hybrid) Antenna Diversity */
 271        pDM_SWAT_Table->antsel = pPhyStaRpt->ant_sel;
 272        /* For 88E HW Antenna Diversity */
 273        dm_odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->ant_sel;
 274        dm_odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->ant_sel_b;
 275        dm_odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antsel_rx_keep_2;
 276}
 277
 278void odm_Init_RSSIForDM(struct odm_dm_struct *dm_odm)
 279{
 280}
 281
 282static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm,
 283                                  struct odm_phy_status_info *pPhyInfo,
 284                                  struct odm_per_pkt_info *pPktinfo)
 285{
 286        s32 UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK;
 287        s32 UndecoratedSmoothedOFDM, RSSI_Ave;
 288        u8 isCCKrate = 0;
 289        u8 RSSI_max, RSSI_min, i;
 290        u32 OFDM_pkt = 0;
 291        u32 Weighting = 0;
 292        struct sta_info *pEntry;
 293        u8 antsel_tr_mux;
 294        struct fast_ant_train *pDM_FatTable = &dm_odm->DM_FatTable;
 295
 296        if (pPktinfo->StationID == 0xFF)
 297                return;
 298        pEntry = dm_odm->pODM_StaInfo[pPktinfo->StationID];
 299        if (!IS_STA_VALID(pEntry))
 300                return;
 301        if ((!pPktinfo->bPacketMatchBSSID))
 302                return;
 303
 304        isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M)) ? true : false;
 305
 306        /* Smart Antenna Debug Message------------------  */
 307
 308        if (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV) {
 309                if (pDM_FatTable->FAT_State == FAT_TRAINING_STATE) {
 310                        if (pPktinfo->bPacketToSelf) {
 311                                antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) |
 312                                                (pDM_FatTable->antsel_rx_keep_1<<1) |
 313                                                pDM_FatTable->antsel_rx_keep_0;
 314                                pDM_FatTable->antSumRSSI[antsel_tr_mux] += pPhyInfo->RxPWDBAll;
 315                                pDM_FatTable->antRSSIcnt[antsel_tr_mux]++;
 316                        }
 317                }
 318        } else if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)) {
 319                if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) {
 320                        antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) |
 321                                        (pDM_FatTable->antsel_rx_keep_1<<1) | pDM_FatTable->antsel_rx_keep_0;
 322                        ODM_AntselStatistics_88E(dm_odm, antsel_tr_mux, pPktinfo->StationID, pPhyInfo->RxPWDBAll);
 323                }
 324        }
 325        /* Smart Antenna Debug Message------------------ */
 326
 327        UndecoratedSmoothedCCK =  pEntry->rssi_stat.UndecoratedSmoothedCCK;
 328        UndecoratedSmoothedOFDM = pEntry->rssi_stat.UndecoratedSmoothedOFDM;
 329        UndecoratedSmoothedPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;
 330
 331        if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) {
 332                if (!isCCKrate) { /* ofdm rate */
 333                        if (pPhyInfo->RxMIMOSignalStrength[RF_PATH_B] == 0) {
 334                                RSSI_Ave = pPhyInfo->RxMIMOSignalStrength[RF_PATH_A];
 335                        } else {
 336                                if (pPhyInfo->RxMIMOSignalStrength[RF_PATH_A] > pPhyInfo->RxMIMOSignalStrength[RF_PATH_B]) {
 337                                        RSSI_max = pPhyInfo->RxMIMOSignalStrength[RF_PATH_A];
 338                                        RSSI_min = pPhyInfo->RxMIMOSignalStrength[RF_PATH_B];
 339                                } else {
 340                                        RSSI_max = pPhyInfo->RxMIMOSignalStrength[RF_PATH_B];
 341                                        RSSI_min = pPhyInfo->RxMIMOSignalStrength[RF_PATH_A];
 342                                }
 343                                if ((RSSI_max - RSSI_min) < 3)
 344                                        RSSI_Ave = RSSI_max;
 345                                else if ((RSSI_max - RSSI_min) < 6)
 346                                        RSSI_Ave = RSSI_max - 1;
 347                                else if ((RSSI_max - RSSI_min) < 10)
 348                                        RSSI_Ave = RSSI_max - 2;
 349                                else
 350                                        RSSI_Ave = RSSI_max - 3;
 351                        }
 352
 353                        /* 1 Process OFDM RSSI */
 354                        if (UndecoratedSmoothedOFDM <= 0) {     /*  initialize */
 355                                UndecoratedSmoothedOFDM = pPhyInfo->RxPWDBAll;
 356                        } else {
 357                                if (pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedOFDM) {
 358                                        UndecoratedSmoothedOFDM =
 359                                                        (((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) +
 360                                                        (RSSI_Ave)) / (Rx_Smooth_Factor);
 361                                        UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM + 1;
 362                                } else {
 363                                        UndecoratedSmoothedOFDM =
 364                                                        (((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) +
 365                                                        (RSSI_Ave)) / (Rx_Smooth_Factor);
 366                                }
 367                        }
 368
 369                        pEntry->rssi_stat.PacketMap = (pEntry->rssi_stat.PacketMap<<1) | BIT0;
 370
 371                } else {
 372                        RSSI_Ave = pPhyInfo->RxPWDBAll;
 373
 374                        /* 1 Process CCK RSSI */
 375                        if (UndecoratedSmoothedCCK <= 0) {      /*  initialize */
 376                                UndecoratedSmoothedCCK = pPhyInfo->RxPWDBAll;
 377                        } else {
 378                                if (pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedCCK) {
 379                                        UndecoratedSmoothedCCK =
 380                                                        ((UndecoratedSmoothedCCK * (Rx_Smooth_Factor-1)) +
 381                                                        pPhyInfo->RxPWDBAll) / Rx_Smooth_Factor;
 382                                        UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1;
 383                                } else {
 384                                        UndecoratedSmoothedCCK =
 385                                                        ((UndecoratedSmoothedCCK * (Rx_Smooth_Factor-1)) +
 386                                                        pPhyInfo->RxPWDBAll) / Rx_Smooth_Factor;
 387                                }
 388                        }
 389                        pEntry->rssi_stat.PacketMap = pEntry->rssi_stat.PacketMap<<1;
 390                }
 391                /* 2011.07.28 LukeLee: modified to prevent unstable CCK RSSI */
 392                if (pEntry->rssi_stat.ValidBit >= 64)
 393                        pEntry->rssi_stat.ValidBit = 64;
 394                else
 395                        pEntry->rssi_stat.ValidBit++;
 396
 397                for (i = 0; i < pEntry->rssi_stat.ValidBit; i++)
 398                        OFDM_pkt += (u8)(pEntry->rssi_stat.PacketMap>>i)&BIT0;
 399
 400                if (pEntry->rssi_stat.ValidBit == 64) {
 401                        Weighting = ((OFDM_pkt<<4) > 64) ? 64 : (OFDM_pkt<<4);
 402                        UndecoratedSmoothedPWDB = (Weighting*UndecoratedSmoothedOFDM+(64-Weighting)*UndecoratedSmoothedCCK)>>6;
 403                } else {
 404                        if (pEntry->rssi_stat.ValidBit != 0)
 405                                UndecoratedSmoothedPWDB = (OFDM_pkt * UndecoratedSmoothedOFDM +
 406                                                          (pEntry->rssi_stat.ValidBit-OFDM_pkt) *
 407                                                          UndecoratedSmoothedCCK)/pEntry->rssi_stat.ValidBit;
 408                        else
 409                                UndecoratedSmoothedPWDB = 0;
 410                }
 411                pEntry->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK;
 412                pEntry->rssi_stat.UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM;
 413                pEntry->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
 414        }
 415}
 416
 417/*  Endianness before calling this API */
 418static void ODM_PhyStatusQuery_92CSeries(struct odm_dm_struct *dm_odm,
 419                                         struct odm_phy_status_info *pPhyInfo,
 420                                         u8 *pPhyStatus,
 421                                         struct odm_per_pkt_info *pPktinfo)
 422{
 423        odm_RxPhyStatus92CSeries_Parsing(dm_odm, pPhyInfo, pPhyStatus,
 424                                         pPktinfo);
 425        if (dm_odm->RSSI_test) {
 426                ;/*  Select the packets to do RSSI checking for antenna switching. */
 427        } else {
 428                odm_Process_RSSIForDM(dm_odm, pPhyInfo, pPktinfo);
 429        }
 430}
 431
 432void ODM_PhyStatusQuery(struct odm_dm_struct *dm_odm,
 433                        struct odm_phy_status_info *pPhyInfo,
 434                        u8 *pPhyStatus, struct odm_per_pkt_info *pPktinfo)
 435{
 436        ODM_PhyStatusQuery_92CSeries(dm_odm, pPhyInfo, pPhyStatus, pPktinfo);
 437}
 438
 439/*  For future use. */
 440void ODM_MacStatusQuery(struct odm_dm_struct *dm_odm, u8 *mac_stat,
 441                        u8 macid, bool pkt_match_bssid,
 442                        bool pkttoself, bool pkt_beacon)
 443{
 444        /*  2011/10/19 Driver team will handle in the future. */
 445}
 446
 447enum HAL_STATUS ODM_ConfigRFWithHeaderFile(struct odm_dm_struct *dm_odm,
 448                                           enum rf_radio_path content,
 449                                           enum rf_radio_path rfpath)
 450{
 451        ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===>ODM_ConfigRFWithHeaderFile\n"));
 452        if (rfpath == RF_PATH_A)
 453                READ_AND_CONFIG(8188E, _RadioA_1T_);
 454        ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> ODM_ConfigRFWithHeaderFile() Radio_A:Rtl8188ERadioA_1TArray\n"));
 455        ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> ODM_ConfigRFWithHeaderFile() Radio_B:Rtl8188ERadioB_1TArray\n"));
 456
 457        ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("ODM_ConfigRFWithHeaderFile: Radio No %x\n", rfpath));
 458        return HAL_STATUS_SUCCESS;
 459}
 460
 461enum HAL_STATUS ODM_ConfigBBWithHeaderFile(struct odm_dm_struct *dm_odm,
 462                                           enum odm_bb_config_type config_tp)
 463{
 464        if (config_tp == CONFIG_BB_PHY_REG) {
 465                READ_AND_CONFIG(8188E, _PHY_REG_1T_);
 466        } else if (config_tp == CONFIG_BB_AGC_TAB) {
 467                READ_AND_CONFIG(8188E, _AGC_TAB_1T_);
 468        } else if (config_tp == CONFIG_BB_PHY_REG_PG) {
 469                READ_AND_CONFIG(8188E, _PHY_REG_PG_);
 470                ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD,
 471                             (" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8188EPHY_REG_PGArray\n"));
 472        }
 473        return HAL_STATUS_SUCCESS;
 474}
 475
 476enum HAL_STATUS ODM_ConfigMACWithHeaderFile(struct odm_dm_struct *dm_odm)
 477{
 478        u8 result = HAL_STATUS_SUCCESS;
 479        result = READ_AND_CONFIG(8188E, _MAC_REG_);
 480        return result;
 481}
 482