1#ifndef _LINUX_IRQ_H
2#define _LINUX_IRQ_H
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12#include <linux/smp.h>
13#include <linux/linkage.h>
14#include <linux/cache.h>
15#include <linux/spinlock.h>
16#include <linux/cpumask.h>
17#include <linux/gfp.h>
18#include <linux/irqreturn.h>
19#include <linux/irqnr.h>
20#include <linux/errno.h>
21#include <linux/topology.h>
22#include <linux/wait.h>
23
24#include <asm/irq.h>
25#include <asm/ptrace.h>
26#include <asm/irq_regs.h>
27
28struct seq_file;
29struct module;
30struct irq_desc;
31struct irq_data;
32typedef void (*irq_flow_handler_t)(unsigned int irq,
33 struct irq_desc *desc);
34typedef void (*irq_preflow_handler_t)(struct irq_data *data);
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77enum {
78 IRQ_TYPE_NONE = 0x00000000,
79 IRQ_TYPE_EDGE_RISING = 0x00000001,
80 IRQ_TYPE_EDGE_FALLING = 0x00000002,
81 IRQ_TYPE_EDGE_BOTH = (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING),
82 IRQ_TYPE_LEVEL_HIGH = 0x00000004,
83 IRQ_TYPE_LEVEL_LOW = 0x00000008,
84 IRQ_TYPE_LEVEL_MASK = (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH),
85 IRQ_TYPE_SENSE_MASK = 0x0000000f,
86 IRQ_TYPE_DEFAULT = IRQ_TYPE_SENSE_MASK,
87
88 IRQ_TYPE_PROBE = 0x00000010,
89
90 IRQ_LEVEL = (1 << 8),
91 IRQ_PER_CPU = (1 << 9),
92 IRQ_NOPROBE = (1 << 10),
93 IRQ_NOREQUEST = (1 << 11),
94 IRQ_NOAUTOEN = (1 << 12),
95 IRQ_NO_BALANCING = (1 << 13),
96 IRQ_MOVE_PCNTXT = (1 << 14),
97 IRQ_NESTED_THREAD = (1 << 15),
98 IRQ_NOTHREAD = (1 << 16),
99 IRQ_PER_CPU_DEVID = (1 << 17),
100 IRQ_IS_POLLED = (1 << 18),
101};
102
103#define IRQF_MODIFY_MASK \
104 (IRQ_TYPE_SENSE_MASK | IRQ_NOPROBE | IRQ_NOREQUEST | \
105 IRQ_NOAUTOEN | IRQ_MOVE_PCNTXT | IRQ_LEVEL | IRQ_NO_BALANCING | \
106 IRQ_PER_CPU | IRQ_NESTED_THREAD | IRQ_NOTHREAD | IRQ_PER_CPU_DEVID | \
107 IRQ_IS_POLLED)
108
109#define IRQ_NO_BALANCING_MASK (IRQ_PER_CPU | IRQ_NO_BALANCING)
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117enum {
118 IRQ_SET_MASK_OK = 0,
119 IRQ_SET_MASK_OK_NOCOPY,
120};
121
122struct msi_desc;
123struct irq_domain;
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146struct irq_data {
147 u32 mask;
148 unsigned int irq;
149 unsigned long hwirq;
150 unsigned int node;
151 unsigned int state_use_accessors;
152 struct irq_chip *chip;
153 struct irq_domain *domain;
154 void *handler_data;
155 void *chip_data;
156 struct msi_desc *msi_desc;
157 cpumask_var_t affinity;
158};
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177enum {
178 IRQD_TRIGGER_MASK = 0xf,
179 IRQD_SETAFFINITY_PENDING = (1 << 8),
180 IRQD_NO_BALANCING = (1 << 10),
181 IRQD_PER_CPU = (1 << 11),
182 IRQD_AFFINITY_SET = (1 << 12),
183 IRQD_LEVEL = (1 << 13),
184 IRQD_WAKEUP_STATE = (1 << 14),
185 IRQD_MOVE_PCNTXT = (1 << 15),
186 IRQD_IRQ_DISABLED = (1 << 16),
187 IRQD_IRQ_MASKED = (1 << 17),
188 IRQD_IRQ_INPROGRESS = (1 << 18),
189};
190
191static inline bool irqd_is_setaffinity_pending(struct irq_data *d)
192{
193 return d->state_use_accessors & IRQD_SETAFFINITY_PENDING;
194}
195
196static inline bool irqd_is_per_cpu(struct irq_data *d)
197{
198 return d->state_use_accessors & IRQD_PER_CPU;
199}
200
201static inline bool irqd_can_balance(struct irq_data *d)
202{
203 return !(d->state_use_accessors & (IRQD_PER_CPU | IRQD_NO_BALANCING));
204}
205
206static inline bool irqd_affinity_was_set(struct irq_data *d)
207{
208 return d->state_use_accessors & IRQD_AFFINITY_SET;
209}
210
211static inline void irqd_mark_affinity_was_set(struct irq_data *d)
212{
213 d->state_use_accessors |= IRQD_AFFINITY_SET;
214}
215
216static inline u32 irqd_get_trigger_type(struct irq_data *d)
217{
218 return d->state_use_accessors & IRQD_TRIGGER_MASK;
219}
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224static inline void irqd_set_trigger_type(struct irq_data *d, u32 type)
225{
226 d->state_use_accessors &= ~IRQD_TRIGGER_MASK;
227 d->state_use_accessors |= type & IRQD_TRIGGER_MASK;
228}
229
230static inline bool irqd_is_level_type(struct irq_data *d)
231{
232 return d->state_use_accessors & IRQD_LEVEL;
233}
234
235static inline bool irqd_is_wakeup_set(struct irq_data *d)
236{
237 return d->state_use_accessors & IRQD_WAKEUP_STATE;
238}
239
240static inline bool irqd_can_move_in_process_context(struct irq_data *d)
241{
242 return d->state_use_accessors & IRQD_MOVE_PCNTXT;
243}
244
245static inline bool irqd_irq_disabled(struct irq_data *d)
246{
247 return d->state_use_accessors & IRQD_IRQ_DISABLED;
248}
249
250static inline bool irqd_irq_masked(struct irq_data *d)
251{
252 return d->state_use_accessors & IRQD_IRQ_MASKED;
253}
254
255static inline bool irqd_irq_inprogress(struct irq_data *d)
256{
257 return d->state_use_accessors & IRQD_IRQ_INPROGRESS;
258}
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265static inline void irqd_set_chained_irq_inprogress(struct irq_data *d)
266{
267 d->state_use_accessors |= IRQD_IRQ_INPROGRESS;
268}
269
270static inline void irqd_clr_chained_irq_inprogress(struct irq_data *d)
271{
272 d->state_use_accessors &= ~IRQD_IRQ_INPROGRESS;
273}
274
275static inline irq_hw_number_t irqd_to_hwirq(struct irq_data *d)
276{
277 return d->hwirq;
278}
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312struct irq_chip {
313 const char *name;
314 unsigned int (*irq_startup)(struct irq_data *data);
315 void (*irq_shutdown)(struct irq_data *data);
316 void (*irq_enable)(struct irq_data *data);
317 void (*irq_disable)(struct irq_data *data);
318
319 void (*irq_ack)(struct irq_data *data);
320 void (*irq_mask)(struct irq_data *data);
321 void (*irq_mask_ack)(struct irq_data *data);
322 void (*irq_unmask)(struct irq_data *data);
323 void (*irq_eoi)(struct irq_data *data);
324
325 int (*irq_set_affinity)(struct irq_data *data, const struct cpumask *dest, bool force);
326 int (*irq_retrigger)(struct irq_data *data);
327 int (*irq_set_type)(struct irq_data *data, unsigned int flow_type);
328 int (*irq_set_wake)(struct irq_data *data, unsigned int on);
329
330 void (*irq_bus_lock)(struct irq_data *data);
331 void (*irq_bus_sync_unlock)(struct irq_data *data);
332
333 void (*irq_cpu_online)(struct irq_data *data);
334 void (*irq_cpu_offline)(struct irq_data *data);
335
336 void (*irq_suspend)(struct irq_data *data);
337 void (*irq_resume)(struct irq_data *data);
338 void (*irq_pm_shutdown)(struct irq_data *data);
339
340 void (*irq_calc_mask)(struct irq_data *data);
341
342 void (*irq_print_chip)(struct irq_data *data, struct seq_file *p);
343 int (*irq_request_resources)(struct irq_data *data);
344 void (*irq_release_resources)(struct irq_data *data);
345
346 unsigned long flags;
347};
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361enum {
362 IRQCHIP_SET_TYPE_MASKED = (1 << 0),
363 IRQCHIP_EOI_IF_HANDLED = (1 << 1),
364 IRQCHIP_MASK_ON_SUSPEND = (1 << 2),
365 IRQCHIP_ONOFFLINE_ENABLED = (1 << 3),
366 IRQCHIP_SKIP_SET_WAKE = (1 << 4),
367 IRQCHIP_ONESHOT_SAFE = (1 << 5),
368 IRQCHIP_EOI_THREADED = (1 << 6),
369};
370
371
372#include <linux/irqdesc.h>
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377#include <asm/hw_irq.h>
378
379#ifndef NR_IRQS_LEGACY
380# define NR_IRQS_LEGACY 0
381#endif
382
383#ifndef ARCH_IRQ_INIT_FLAGS
384# define ARCH_IRQ_INIT_FLAGS 0
385#endif
386
387#define IRQ_DEFAULT_INIT_FLAGS ARCH_IRQ_INIT_FLAGS
388
389struct irqaction;
390extern int setup_irq(unsigned int irq, struct irqaction *new);
391extern void remove_irq(unsigned int irq, struct irqaction *act);
392extern int setup_percpu_irq(unsigned int irq, struct irqaction *new);
393extern void remove_percpu_irq(unsigned int irq, struct irqaction *act);
394
395extern void irq_cpu_online(void);
396extern void irq_cpu_offline(void);
397extern int irq_set_affinity_locked(struct irq_data *data,
398 const struct cpumask *cpumask, bool force);
399
400#if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_PENDING_IRQ)
401void irq_move_irq(struct irq_data *data);
402void irq_move_masked_irq(struct irq_data *data);
403#else
404static inline void irq_move_irq(struct irq_data *data) { }
405static inline void irq_move_masked_irq(struct irq_data *data) { }
406#endif
407
408extern int no_irq_affinity;
409
410#ifdef CONFIG_HARDIRQS_SW_RESEND
411int irq_set_parent(int irq, int parent_irq);
412#else
413static inline int irq_set_parent(int irq, int parent_irq)
414{
415 return 0;
416}
417#endif
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422
423extern void handle_level_irq(unsigned int irq, struct irq_desc *desc);
424extern void handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc);
425extern void handle_edge_irq(unsigned int irq, struct irq_desc *desc);
426extern void handle_edge_eoi_irq(unsigned int irq, struct irq_desc *desc);
427extern void handle_simple_irq(unsigned int irq, struct irq_desc *desc);
428extern void handle_percpu_irq(unsigned int irq, struct irq_desc *desc);
429extern void handle_percpu_devid_irq(unsigned int irq, struct irq_desc *desc);
430extern void handle_bad_irq(unsigned int irq, struct irq_desc *desc);
431extern void handle_nested_irq(unsigned int irq);
432
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434extern void note_interrupt(unsigned int irq, struct irq_desc *desc,
435 irqreturn_t action_ret);
436
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438
439extern int noirqdebug_setup(char *str);
440
441
442extern int can_request_irq(unsigned int irq, unsigned long irqflags);
443
444
445extern struct irq_chip no_irq_chip;
446extern struct irq_chip dummy_irq_chip;
447
448extern void
449irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
450 irq_flow_handler_t handle, const char *name);
451
452static inline void irq_set_chip_and_handler(unsigned int irq, struct irq_chip *chip,
453 irq_flow_handler_t handle)
454{
455 irq_set_chip_and_handler_name(irq, chip, handle, NULL);
456}
457
458extern int irq_set_percpu_devid(unsigned int irq);
459
460extern void
461__irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
462 const char *name);
463
464static inline void
465irq_set_handler(unsigned int irq, irq_flow_handler_t handle)
466{
467 __irq_set_handler(irq, handle, 0, NULL);
468}
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475static inline void
476irq_set_chained_handler(unsigned int irq, irq_flow_handler_t handle)
477{
478 __irq_set_handler(irq, handle, 1, NULL);
479}
480
481void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set);
482
483static inline void irq_set_status_flags(unsigned int irq, unsigned long set)
484{
485 irq_modify_status(irq, 0, set);
486}
487
488static inline void irq_clear_status_flags(unsigned int irq, unsigned long clr)
489{
490 irq_modify_status(irq, clr, 0);
491}
492
493static inline void irq_set_noprobe(unsigned int irq)
494{
495 irq_modify_status(irq, 0, IRQ_NOPROBE);
496}
497
498static inline void irq_set_probe(unsigned int irq)
499{
500 irq_modify_status(irq, IRQ_NOPROBE, 0);
501}
502
503static inline void irq_set_nothread(unsigned int irq)
504{
505 irq_modify_status(irq, 0, IRQ_NOTHREAD);
506}
507
508static inline void irq_set_thread(unsigned int irq)
509{
510 irq_modify_status(irq, IRQ_NOTHREAD, 0);
511}
512
513static inline void irq_set_nested_thread(unsigned int irq, bool nest)
514{
515 if (nest)
516 irq_set_status_flags(irq, IRQ_NESTED_THREAD);
517 else
518 irq_clear_status_flags(irq, IRQ_NESTED_THREAD);
519}
520
521static inline void irq_set_percpu_devid_flags(unsigned int irq)
522{
523 irq_set_status_flags(irq,
524 IRQ_NOAUTOEN | IRQ_PER_CPU | IRQ_NOTHREAD |
525 IRQ_NOPROBE | IRQ_PER_CPU_DEVID);
526}
527
528
529extern unsigned int create_irq_nr(unsigned int irq_want, int node);
530extern unsigned int __create_irqs(unsigned int from, unsigned int count,
531 int node);
532extern int create_irq(void);
533extern void destroy_irq(unsigned int irq);
534extern void destroy_irqs(unsigned int irq, unsigned int count);
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540extern void dynamic_irq_cleanup(unsigned int irq);
541static inline void dynamic_irq_init(unsigned int irq)
542{
543 dynamic_irq_cleanup(irq);
544}
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547extern int irq_set_chip(unsigned int irq, struct irq_chip *chip);
548extern int irq_set_handler_data(unsigned int irq, void *data);
549extern int irq_set_chip_data(unsigned int irq, void *data);
550extern int irq_set_irq_type(unsigned int irq, unsigned int type);
551extern int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry);
552extern int irq_set_msi_desc_off(unsigned int irq_base, unsigned int irq_offset,
553 struct msi_desc *entry);
554extern struct irq_data *irq_get_irq_data(unsigned int irq);
555
556static inline struct irq_chip *irq_get_chip(unsigned int irq)
557{
558 struct irq_data *d = irq_get_irq_data(irq);
559 return d ? d->chip : NULL;
560}
561
562static inline struct irq_chip *irq_data_get_irq_chip(struct irq_data *d)
563{
564 return d->chip;
565}
566
567static inline void *irq_get_chip_data(unsigned int irq)
568{
569 struct irq_data *d = irq_get_irq_data(irq);
570 return d ? d->chip_data : NULL;
571}
572
573static inline void *irq_data_get_irq_chip_data(struct irq_data *d)
574{
575 return d->chip_data;
576}
577
578static inline void *irq_get_handler_data(unsigned int irq)
579{
580 struct irq_data *d = irq_get_irq_data(irq);
581 return d ? d->handler_data : NULL;
582}
583
584static inline void *irq_data_get_irq_handler_data(struct irq_data *d)
585{
586 return d->handler_data;
587}
588
589static inline struct msi_desc *irq_get_msi_desc(unsigned int irq)
590{
591 struct irq_data *d = irq_get_irq_data(irq);
592 return d ? d->msi_desc : NULL;
593}
594
595static inline struct msi_desc *irq_data_get_msi(struct irq_data *d)
596{
597 return d->msi_desc;
598}
599
600static inline u32 irq_get_trigger_type(unsigned int irq)
601{
602 struct irq_data *d = irq_get_irq_data(irq);
603 return d ? irqd_get_trigger_type(d) : 0;
604}
605
606unsigned int arch_dynirq_lower_bound(unsigned int from);
607
608int __irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node,
609 struct module *owner);
610
611
612#define irq_alloc_descs(irq, from, cnt, node) \
613 __irq_alloc_descs(irq, from, cnt, node, THIS_MODULE)
614
615#define irq_alloc_desc(node) \
616 irq_alloc_descs(-1, 0, 1, node)
617
618#define irq_alloc_desc_at(at, node) \
619 irq_alloc_descs(at, at, 1, node)
620
621#define irq_alloc_desc_from(from, node) \
622 irq_alloc_descs(-1, from, 1, node)
623
624#define irq_alloc_descs_from(from, cnt, node) \
625 irq_alloc_descs(-1, from, cnt, node)
626
627void irq_free_descs(unsigned int irq, unsigned int cnt);
628int irq_reserve_irqs(unsigned int from, unsigned int cnt);
629
630static inline void irq_free_desc(unsigned int irq)
631{
632 irq_free_descs(irq, 1);
633}
634
635static inline int irq_reserve_irq(unsigned int irq)
636{
637 return irq_reserve_irqs(irq, 1);
638}
639
640#ifndef irq_reg_writel
641# define irq_reg_writel(val, addr) writel(val, addr)
642#endif
643#ifndef irq_reg_readl
644# define irq_reg_readl(addr) readl(addr)
645#endif
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657struct irq_chip_regs {
658 unsigned long enable;
659 unsigned long disable;
660 unsigned long mask;
661 unsigned long ack;
662 unsigned long eoi;
663 unsigned long type;
664 unsigned long polarity;
665};
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680struct irq_chip_type {
681 struct irq_chip chip;
682 struct irq_chip_regs regs;
683 irq_flow_handler_t handler;
684 u32 type;
685 u32 mask_cache_priv;
686 u32 *mask_cache;
687};
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714struct irq_chip_generic {
715 raw_spinlock_t lock;
716 void __iomem *reg_base;
717 unsigned int irq_base;
718 unsigned int irq_cnt;
719 u32 mask_cache;
720 u32 type_cache;
721 u32 polarity_cache;
722 u32 wake_enabled;
723 u32 wake_active;
724 unsigned int num_ct;
725 void *private;
726 unsigned long installed;
727 unsigned long unused;
728 struct irq_domain *domain;
729 struct list_head list;
730 struct irq_chip_type chip_types[0];
731};
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742enum irq_gc_flags {
743 IRQ_GC_INIT_MASK_CACHE = 1 << 0,
744 IRQ_GC_INIT_NESTED_LOCK = 1 << 1,
745 IRQ_GC_MASK_CACHE_PER_TYPE = 1 << 2,
746 IRQ_GC_NO_MASK = 1 << 3,
747};
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758struct irq_domain_chip_generic {
759 unsigned int irqs_per_chip;
760 unsigned int num_chips;
761 unsigned int irq_flags_to_clear;
762 unsigned int irq_flags_to_set;
763 enum irq_gc_flags gc_flags;
764 struct irq_chip_generic *gc[0];
765};
766
767
768void irq_gc_noop(struct irq_data *d);
769void irq_gc_mask_disable_reg(struct irq_data *d);
770void irq_gc_mask_set_bit(struct irq_data *d);
771void irq_gc_mask_clr_bit(struct irq_data *d);
772void irq_gc_unmask_enable_reg(struct irq_data *d);
773void irq_gc_ack_set_bit(struct irq_data *d);
774void irq_gc_ack_clr_bit(struct irq_data *d);
775void irq_gc_mask_disable_reg_and_ack(struct irq_data *d);
776void irq_gc_eoi(struct irq_data *d);
777int irq_gc_set_wake(struct irq_data *d, unsigned int on);
778
779
780struct irq_chip_generic *
781irq_alloc_generic_chip(const char *name, int nr_ct, unsigned int irq_base,
782 void __iomem *reg_base, irq_flow_handler_t handler);
783void irq_setup_generic_chip(struct irq_chip_generic *gc, u32 msk,
784 enum irq_gc_flags flags, unsigned int clr,
785 unsigned int set);
786int irq_setup_alt_chip(struct irq_data *d, unsigned int type);
787void irq_remove_generic_chip(struct irq_chip_generic *gc, u32 msk,
788 unsigned int clr, unsigned int set);
789
790struct irq_chip_generic *irq_get_domain_generic_chip(struct irq_domain *d, unsigned int hw_irq);
791int irq_alloc_domain_generic_chips(struct irq_domain *d, int irqs_per_chip,
792 int num_ct, const char *name,
793 irq_flow_handler_t handler,
794 unsigned int clr, unsigned int set,
795 enum irq_gc_flags flags);
796
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798static inline struct irq_chip_type *irq_data_get_chip_type(struct irq_data *d)
799{
800 return container_of(d->chip, struct irq_chip_type, chip);
801}
802
803#define IRQ_MSK(n) (u32)((n) < 32 ? ((1 << (n)) - 1) : UINT_MAX)
804
805#ifdef CONFIG_SMP
806static inline void irq_gc_lock(struct irq_chip_generic *gc)
807{
808 raw_spin_lock(&gc->lock);
809}
810
811static inline void irq_gc_unlock(struct irq_chip_generic *gc)
812{
813 raw_spin_unlock(&gc->lock);
814}
815#else
816static inline void irq_gc_lock(struct irq_chip_generic *gc) { }
817static inline void irq_gc_unlock(struct irq_chip_generic *gc) { }
818#endif
819
820#endif
821