linux/sound/pci/hda/patch_hdmi.c
<<
>>
Prefs
   1/*
   2 *
   3 *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   4 *
   5 *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   6 *  Copyright (c) 2006 ATI Technologies Inc.
   7 *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   8 *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
   9 *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
  10 *
  11 *  Authors:
  12 *                      Wu Fengguang <wfg@linux.intel.com>
  13 *
  14 *  Maintained by:
  15 *                      Wu Fengguang <wfg@linux.intel.com>
  16 *
  17 *  This program is free software; you can redistribute it and/or modify it
  18 *  under the terms of the GNU General Public License as published by the Free
  19 *  Software Foundation; either version 2 of the License, or (at your option)
  20 *  any later version.
  21 *
  22 *  This program is distributed in the hope that it will be useful, but
  23 *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  24 *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  25 *  for more details.
  26 *
  27 *  You should have received a copy of the GNU General Public License
  28 *  along with this program; if not, write to the Free Software Foundation,
  29 *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  30 */
  31
  32#include <linux/init.h>
  33#include <linux/delay.h>
  34#include <linux/slab.h>
  35#include <linux/module.h>
  36#include <sound/core.h>
  37#include <sound/jack.h>
  38#include <sound/asoundef.h>
  39#include <sound/tlv.h>
  40#include "hda_codec.h"
  41#include "hda_local.h"
  42#include "hda_jack.h"
  43
  44static bool static_hdmi_pcm;
  45module_param(static_hdmi_pcm, bool, 0644);
  46MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  47
  48#define is_haswell(codec)  ((codec)->vendor_id == 0x80862807)
  49#define is_broadwell(codec)    ((codec)->vendor_id == 0x80862808)
  50#define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec))
  51
  52#define is_valleyview(codec) ((codec)->vendor_id == 0x80862882)
  53
  54struct hdmi_spec_per_cvt {
  55        hda_nid_t cvt_nid;
  56        int assigned;
  57        unsigned int channels_min;
  58        unsigned int channels_max;
  59        u32 rates;
  60        u64 formats;
  61        unsigned int maxbps;
  62};
  63
  64/* max. connections to a widget */
  65#define HDA_MAX_CONNECTIONS     32
  66
  67struct hdmi_spec_per_pin {
  68        hda_nid_t pin_nid;
  69        int num_mux_nids;
  70        hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  71        int mux_idx;
  72        hda_nid_t cvt_nid;
  73
  74        struct hda_codec *codec;
  75        struct hdmi_eld sink_eld;
  76        struct mutex lock;
  77        struct delayed_work work;
  78        struct snd_kcontrol *eld_ctl;
  79        int repoll_count;
  80        bool setup; /* the stream has been set up by prepare callback */
  81        int channels; /* current number of channels */
  82        bool non_pcm;
  83        bool chmap_set;         /* channel-map override by ALSA API? */
  84        unsigned char chmap[8]; /* ALSA API channel-map */
  85        char pcm_name[8];       /* filled in build_pcm callbacks */
  86#ifdef CONFIG_PROC_FS
  87        struct snd_info_entry *proc_entry;
  88#endif
  89};
  90
  91struct cea_channel_speaker_allocation;
  92
  93/* operations used by generic code that can be overridden by patches */
  94struct hdmi_ops {
  95        int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
  96                           unsigned char *buf, int *eld_size);
  97
  98        /* get and set channel assigned to each HDMI ASP (audio sample packet) slot */
  99        int (*pin_get_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
 100                                    int asp_slot);
 101        int (*pin_set_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
 102                                    int asp_slot, int channel);
 103
 104        void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
 105                                    int ca, int active_channels, int conn_type);
 106
 107        /* enable/disable HBR (HD passthrough) */
 108        int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
 109
 110        int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
 111                            hda_nid_t pin_nid, u32 stream_tag, int format);
 112
 113        /* Helpers for producing the channel map TLVs. These can be overridden
 114         * for devices that have non-standard mapping requirements. */
 115        int (*chmap_cea_alloc_validate_get_type)(struct cea_channel_speaker_allocation *cap,
 116                                                 int channels);
 117        void (*cea_alloc_to_tlv_chmap)(struct cea_channel_speaker_allocation *cap,
 118                                       unsigned int *chmap, int channels);
 119
 120        /* check that the user-given chmap is supported */
 121        int (*chmap_validate)(int ca, int channels, unsigned char *chmap);
 122};
 123
 124struct hdmi_spec {
 125        int num_cvts;
 126        struct snd_array cvts; /* struct hdmi_spec_per_cvt */
 127        hda_nid_t cvt_nids[4]; /* only for haswell fix */
 128
 129        int num_pins;
 130        struct snd_array pins; /* struct hdmi_spec_per_pin */
 131        struct snd_array pcm_rec; /* struct hda_pcm */
 132        unsigned int channels_max; /* max over all cvts */
 133
 134        struct hdmi_eld temp_eld;
 135        struct hdmi_ops ops;
 136
 137        bool dyn_pin_out;
 138
 139        /*
 140         * Non-generic VIA/NVIDIA specific
 141         */
 142        struct hda_multi_out multiout;
 143        struct hda_pcm_stream pcm_playback;
 144};
 145
 146
 147struct hdmi_audio_infoframe {
 148        u8 type; /* 0x84 */
 149        u8 ver;  /* 0x01 */
 150        u8 len;  /* 0x0a */
 151
 152        u8 checksum;
 153
 154        u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 155        u8 SS01_SF24;
 156        u8 CXT04;
 157        u8 CA;
 158        u8 LFEPBL01_LSV36_DM_INH7;
 159};
 160
 161struct dp_audio_infoframe {
 162        u8 type; /* 0x84 */
 163        u8 len;  /* 0x1b */
 164        u8 ver;  /* 0x11 << 2 */
 165
 166        u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 167        u8 SS01_SF24;
 168        u8 CXT04;
 169        u8 CA;
 170        u8 LFEPBL01_LSV36_DM_INH7;
 171};
 172
 173union audio_infoframe {
 174        struct hdmi_audio_infoframe hdmi;
 175        struct dp_audio_infoframe dp;
 176        u8 bytes[0];
 177};
 178
 179/*
 180 * CEA speaker placement:
 181 *
 182 *        FLH       FCH        FRH
 183 *  FLW    FL  FLC   FC   FRC   FR   FRW
 184 *
 185 *                                  LFE
 186 *                     TC
 187 *
 188 *          RL  RLC   RC   RRC   RR
 189 *
 190 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
 191 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
 192 */
 193enum cea_speaker_placement {
 194        FL  = (1 <<  0),        /* Front Left           */
 195        FC  = (1 <<  1),        /* Front Center         */
 196        FR  = (1 <<  2),        /* Front Right          */
 197        FLC = (1 <<  3),        /* Front Left Center    */
 198        FRC = (1 <<  4),        /* Front Right Center   */
 199        RL  = (1 <<  5),        /* Rear Left            */
 200        RC  = (1 <<  6),        /* Rear Center          */
 201        RR  = (1 <<  7),        /* Rear Right           */
 202        RLC = (1 <<  8),        /* Rear Left Center     */
 203        RRC = (1 <<  9),        /* Rear Right Center    */
 204        LFE = (1 << 10),        /* Low Frequency Effect */
 205        FLW = (1 << 11),        /* Front Left Wide      */
 206        FRW = (1 << 12),        /* Front Right Wide     */
 207        FLH = (1 << 13),        /* Front Left High      */
 208        FCH = (1 << 14),        /* Front Center High    */
 209        FRH = (1 << 15),        /* Front Right High     */
 210        TC  = (1 << 16),        /* Top Center           */
 211};
 212
 213/*
 214 * ELD SA bits in the CEA Speaker Allocation data block
 215 */
 216static int eld_speaker_allocation_bits[] = {
 217        [0] = FL | FR,
 218        [1] = LFE,
 219        [2] = FC,
 220        [3] = RL | RR,
 221        [4] = RC,
 222        [5] = FLC | FRC,
 223        [6] = RLC | RRC,
 224        /* the following are not defined in ELD yet */
 225        [7] = FLW | FRW,
 226        [8] = FLH | FRH,
 227        [9] = TC,
 228        [10] = FCH,
 229};
 230
 231struct cea_channel_speaker_allocation {
 232        int ca_index;
 233        int speakers[8];
 234
 235        /* derived values, just for convenience */
 236        int channels;
 237        int spk_mask;
 238};
 239
 240/*
 241 * ALSA sequence is:
 242 *
 243 *       surround40   surround41   surround50   surround51   surround71
 244 * ch0   front left   =            =            =            =
 245 * ch1   front right  =            =            =            =
 246 * ch2   rear left    =            =            =            =
 247 * ch3   rear right   =            =            =            =
 248 * ch4                LFE          center       center       center
 249 * ch5                                          LFE          LFE
 250 * ch6                                                       side left
 251 * ch7                                                       side right
 252 *
 253 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
 254 */
 255static int hdmi_channel_mapping[0x32][8] = {
 256        /* stereo */
 257        [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 258        /* 2.1 */
 259        [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 260        /* Dolby Surround */
 261        [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
 262        /* surround40 */
 263        [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
 264        /* 4ch */
 265        [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
 266        /* surround41 */
 267        [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
 268        /* surround50 */
 269        [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
 270        /* surround51 */
 271        [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
 272        /* 7.1 */
 273        [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
 274};
 275
 276/*
 277 * This is an ordered list!
 278 *
 279 * The preceding ones have better chances to be selected by
 280 * hdmi_channel_allocation().
 281 */
 282static struct cea_channel_speaker_allocation channel_allocations[] = {
 283/*                        channel:   7     6    5    4    3     2    1    0  */
 284{ .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
 285                                 /* 2.1 */
 286{ .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
 287                                 /* Dolby Surround */
 288{ .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
 289                                 /* surround40 */
 290{ .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
 291                                 /* surround41 */
 292{ .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
 293                                 /* surround50 */
 294{ .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 295                                 /* surround51 */
 296{ .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 297                                 /* 6.1 */
 298{ .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 299                                 /* surround71 */
 300{ .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 301
 302{ .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
 303{ .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
 304{ .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
 305{ .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
 306{ .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
 307{ .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
 308{ .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
 309{ .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 310{ .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
 311{ .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 312{ .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
 313{ .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
 314{ .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
 315{ .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
 316{ .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
 317{ .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
 318{ .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
 319{ .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
 320{ .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
 321{ .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
 322{ .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 323{ .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
 324{ .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 325{ .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 326{ .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 327{ .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 328{ .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 329{ .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
 330{ .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
 331{ .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
 332{ .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
 333{ .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 334{ .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 335{ .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 336{ .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 337{ .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 338{ .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 339{ .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
 340{ .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 341{ .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
 342{ .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
 343};
 344
 345
 346/*
 347 * HDMI routines
 348 */
 349
 350#define get_pin(spec, idx) \
 351        ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 352#define get_cvt(spec, idx) \
 353        ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 354#define get_pcm_rec(spec, idx) \
 355        ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
 356
 357static int pin_nid_to_pin_index(struct hda_codec *codec, hda_nid_t pin_nid)
 358{
 359        struct hdmi_spec *spec = codec->spec;
 360        int pin_idx;
 361
 362        for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 363                if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
 364                        return pin_idx;
 365
 366        codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
 367        return -EINVAL;
 368}
 369
 370static int hinfo_to_pin_index(struct hda_codec *codec,
 371                              struct hda_pcm_stream *hinfo)
 372{
 373        struct hdmi_spec *spec = codec->spec;
 374        int pin_idx;
 375
 376        for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 377                if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
 378                        return pin_idx;
 379
 380        codec_warn(codec, "HDMI: hinfo %p not registered\n", hinfo);
 381        return -EINVAL;
 382}
 383
 384static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
 385{
 386        struct hdmi_spec *spec = codec->spec;
 387        int cvt_idx;
 388
 389        for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 390                if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 391                        return cvt_idx;
 392
 393        codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
 394        return -EINVAL;
 395}
 396
 397static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 398                        struct snd_ctl_elem_info *uinfo)
 399{
 400        struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 401        struct hdmi_spec *spec = codec->spec;
 402        struct hdmi_spec_per_pin *per_pin;
 403        struct hdmi_eld *eld;
 404        int pin_idx;
 405
 406        uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 407
 408        pin_idx = kcontrol->private_value;
 409        per_pin = get_pin(spec, pin_idx);
 410        eld = &per_pin->sink_eld;
 411
 412        mutex_lock(&per_pin->lock);
 413        uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 414        mutex_unlock(&per_pin->lock);
 415
 416        return 0;
 417}
 418
 419static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 420                        struct snd_ctl_elem_value *ucontrol)
 421{
 422        struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 423        struct hdmi_spec *spec = codec->spec;
 424        struct hdmi_spec_per_pin *per_pin;
 425        struct hdmi_eld *eld;
 426        int pin_idx;
 427
 428        pin_idx = kcontrol->private_value;
 429        per_pin = get_pin(spec, pin_idx);
 430        eld = &per_pin->sink_eld;
 431
 432        mutex_lock(&per_pin->lock);
 433        if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
 434                mutex_unlock(&per_pin->lock);
 435                snd_BUG();
 436                return -EINVAL;
 437        }
 438
 439        memset(ucontrol->value.bytes.data, 0,
 440               ARRAY_SIZE(ucontrol->value.bytes.data));
 441        if (eld->eld_valid)
 442                memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 443                       eld->eld_size);
 444        mutex_unlock(&per_pin->lock);
 445
 446        return 0;
 447}
 448
 449static struct snd_kcontrol_new eld_bytes_ctl = {
 450        .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 451        .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 452        .name = "ELD",
 453        .info = hdmi_eld_ctl_info,
 454        .get = hdmi_eld_ctl_get,
 455};
 456
 457static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
 458                        int device)
 459{
 460        struct snd_kcontrol *kctl;
 461        struct hdmi_spec *spec = codec->spec;
 462        int err;
 463
 464        kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 465        if (!kctl)
 466                return -ENOMEM;
 467        kctl->private_value = pin_idx;
 468        kctl->id.device = device;
 469
 470        err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
 471        if (err < 0)
 472                return err;
 473
 474        get_pin(spec, pin_idx)->eld_ctl = kctl;
 475        return 0;
 476}
 477
 478#ifdef BE_PARANOID
 479static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 480                                int *packet_index, int *byte_index)
 481{
 482        int val;
 483
 484        val = snd_hda_codec_read(codec, pin_nid, 0,
 485                                 AC_VERB_GET_HDMI_DIP_INDEX, 0);
 486
 487        *packet_index = val >> 5;
 488        *byte_index = val & 0x1f;
 489}
 490#endif
 491
 492static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 493                                int packet_index, int byte_index)
 494{
 495        int val;
 496
 497        val = (packet_index << 5) | (byte_index & 0x1f);
 498
 499        snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 500}
 501
 502static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 503                                unsigned char val)
 504{
 505        snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 506}
 507
 508static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 509{
 510        struct hdmi_spec *spec = codec->spec;
 511        int pin_out;
 512
 513        /* Unmute */
 514        if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 515                snd_hda_codec_write(codec, pin_nid, 0,
 516                                AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 517
 518        if (spec->dyn_pin_out)
 519                /* Disable pin out until stream is active */
 520                pin_out = 0;
 521        else
 522                /* Enable pin out: some machines with GM965 gets broken output
 523                 * when the pin is disabled or changed while using with HDMI
 524                 */
 525                pin_out = PIN_OUT;
 526
 527        snd_hda_codec_write(codec, pin_nid, 0,
 528                            AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
 529}
 530
 531static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
 532{
 533        return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
 534                                        AC_VERB_GET_CVT_CHAN_COUNT, 0);
 535}
 536
 537static void hdmi_set_channel_count(struct hda_codec *codec,
 538                                   hda_nid_t cvt_nid, int chs)
 539{
 540        if (chs != hdmi_get_channel_count(codec, cvt_nid))
 541                snd_hda_codec_write(codec, cvt_nid, 0,
 542                                    AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
 543}
 544
 545/*
 546 * ELD proc files
 547 */
 548
 549#ifdef CONFIG_PROC_FS
 550static void print_eld_info(struct snd_info_entry *entry,
 551                           struct snd_info_buffer *buffer)
 552{
 553        struct hdmi_spec_per_pin *per_pin = entry->private_data;
 554
 555        mutex_lock(&per_pin->lock);
 556        snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
 557        mutex_unlock(&per_pin->lock);
 558}
 559
 560static void write_eld_info(struct snd_info_entry *entry,
 561                           struct snd_info_buffer *buffer)
 562{
 563        struct hdmi_spec_per_pin *per_pin = entry->private_data;
 564
 565        mutex_lock(&per_pin->lock);
 566        snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
 567        mutex_unlock(&per_pin->lock);
 568}
 569
 570static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
 571{
 572        char name[32];
 573        struct hda_codec *codec = per_pin->codec;
 574        struct snd_info_entry *entry;
 575        int err;
 576
 577        snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
 578        err = snd_card_proc_new(codec->bus->card, name, &entry);
 579        if (err < 0)
 580                return err;
 581
 582        snd_info_set_text_ops(entry, per_pin, print_eld_info);
 583        entry->c.text.write = write_eld_info;
 584        entry->mode |= S_IWUSR;
 585        per_pin->proc_entry = entry;
 586
 587        return 0;
 588}
 589
 590static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 591{
 592        if (!per_pin->codec->bus->shutdown && per_pin->proc_entry) {
 593                snd_device_free(per_pin->codec->bus->card, per_pin->proc_entry);
 594                per_pin->proc_entry = NULL;
 595        }
 596}
 597#else
 598static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
 599                               int index)
 600{
 601        return 0;
 602}
 603static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 604{
 605}
 606#endif
 607
 608/*
 609 * Channel mapping routines
 610 */
 611
 612/*
 613 * Compute derived values in channel_allocations[].
 614 */
 615static void init_channel_allocations(void)
 616{
 617        int i, j;
 618        struct cea_channel_speaker_allocation *p;
 619
 620        for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 621                p = channel_allocations + i;
 622                p->channels = 0;
 623                p->spk_mask = 0;
 624                for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
 625                        if (p->speakers[j]) {
 626                                p->channels++;
 627                                p->spk_mask |= p->speakers[j];
 628                        }
 629        }
 630}
 631
 632static int get_channel_allocation_order(int ca)
 633{
 634        int i;
 635
 636        for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 637                if (channel_allocations[i].ca_index == ca)
 638                        break;
 639        }
 640        return i;
 641}
 642
 643/*
 644 * The transformation takes two steps:
 645 *
 646 *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
 647 *            spk_mask => (channel_allocations[])         => ai->CA
 648 *
 649 * TODO: it could select the wrong CA from multiple candidates.
 650*/
 651static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
 652{
 653        int i;
 654        int ca = 0;
 655        int spk_mask = 0;
 656        char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
 657
 658        /*
 659         * CA defaults to 0 for basic stereo audio
 660         */
 661        if (channels <= 2)
 662                return 0;
 663
 664        /*
 665         * expand ELD's speaker allocation mask
 666         *
 667         * ELD tells the speaker mask in a compact(paired) form,
 668         * expand ELD's notions to match the ones used by Audio InfoFrame.
 669         */
 670        for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
 671                if (eld->info.spk_alloc & (1 << i))
 672                        spk_mask |= eld_speaker_allocation_bits[i];
 673        }
 674
 675        /* search for the first working match in the CA table */
 676        for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 677                if (channels == channel_allocations[i].channels &&
 678                    (spk_mask & channel_allocations[i].spk_mask) ==
 679                                channel_allocations[i].spk_mask) {
 680                        ca = channel_allocations[i].ca_index;
 681                        break;
 682                }
 683        }
 684
 685        if (!ca) {
 686                /* if there was no match, select the regular ALSA channel
 687                 * allocation with the matching number of channels */
 688                for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 689                        if (channels == channel_allocations[i].channels) {
 690                                ca = channel_allocations[i].ca_index;
 691                                break;
 692                        }
 693                }
 694        }
 695
 696        snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
 697        snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
 698                    ca, channels, buf);
 699
 700        return ca;
 701}
 702
 703static void hdmi_debug_channel_mapping(struct hda_codec *codec,
 704                                       hda_nid_t pin_nid)
 705{
 706#ifdef CONFIG_SND_DEBUG_VERBOSE
 707        struct hdmi_spec *spec = codec->spec;
 708        int i;
 709        int channel;
 710
 711        for (i = 0; i < 8; i++) {
 712                channel = spec->ops.pin_get_slot_channel(codec, pin_nid, i);
 713                codec_dbg(codec, "HDMI: ASP channel %d => slot %d\n",
 714                                                channel, i);
 715        }
 716#endif
 717}
 718
 719static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
 720                                       hda_nid_t pin_nid,
 721                                       bool non_pcm,
 722                                       int ca)
 723{
 724        struct hdmi_spec *spec = codec->spec;
 725        struct cea_channel_speaker_allocation *ch_alloc;
 726        int i;
 727        int err;
 728        int order;
 729        int non_pcm_mapping[8];
 730
 731        order = get_channel_allocation_order(ca);
 732        ch_alloc = &channel_allocations[order];
 733
 734        if (hdmi_channel_mapping[ca][1] == 0) {
 735                int hdmi_slot = 0;
 736                /* fill actual channel mappings in ALSA channel (i) order */
 737                for (i = 0; i < ch_alloc->channels; i++) {
 738                        while (!ch_alloc->speakers[7 - hdmi_slot] && !WARN_ON(hdmi_slot >= 8))
 739                                hdmi_slot++; /* skip zero slots */
 740
 741                        hdmi_channel_mapping[ca][i] = (i << 4) | hdmi_slot++;
 742                }
 743                /* fill the rest of the slots with ALSA channel 0xf */
 744                for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++)
 745                        if (!ch_alloc->speakers[7 - hdmi_slot])
 746                                hdmi_channel_mapping[ca][i++] = (0xf << 4) | hdmi_slot;
 747        }
 748
 749        if (non_pcm) {
 750                for (i = 0; i < ch_alloc->channels; i++)
 751                        non_pcm_mapping[i] = (i << 4) | i;
 752                for (; i < 8; i++)
 753                        non_pcm_mapping[i] = (0xf << 4) | i;
 754        }
 755
 756        for (i = 0; i < 8; i++) {
 757                int slotsetup = non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i];
 758                int hdmi_slot = slotsetup & 0x0f;
 759                int channel = (slotsetup & 0xf0) >> 4;
 760                err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot, channel);
 761                if (err) {
 762                        codec_dbg(codec, "HDMI: channel mapping failed\n");
 763                        break;
 764                }
 765        }
 766}
 767
 768struct channel_map_table {
 769        unsigned char map;              /* ALSA API channel map position */
 770        int spk_mask;                   /* speaker position bit mask */
 771};
 772
 773static struct channel_map_table map_tables[] = {
 774        { SNDRV_CHMAP_FL,       FL },
 775        { SNDRV_CHMAP_FR,       FR },
 776        { SNDRV_CHMAP_RL,       RL },
 777        { SNDRV_CHMAP_RR,       RR },
 778        { SNDRV_CHMAP_LFE,      LFE },
 779        { SNDRV_CHMAP_FC,       FC },
 780        { SNDRV_CHMAP_RLC,      RLC },
 781        { SNDRV_CHMAP_RRC,      RRC },
 782        { SNDRV_CHMAP_RC,       RC },
 783        { SNDRV_CHMAP_FLC,      FLC },
 784        { SNDRV_CHMAP_FRC,      FRC },
 785        { SNDRV_CHMAP_TFL,      FLH },
 786        { SNDRV_CHMAP_TFR,      FRH },
 787        { SNDRV_CHMAP_FLW,      FLW },
 788        { SNDRV_CHMAP_FRW,      FRW },
 789        { SNDRV_CHMAP_TC,       TC },
 790        { SNDRV_CHMAP_TFC,      FCH },
 791        {} /* terminator */
 792};
 793
 794/* from ALSA API channel position to speaker bit mask */
 795static int to_spk_mask(unsigned char c)
 796{
 797        struct channel_map_table *t = map_tables;
 798        for (; t->map; t++) {
 799                if (t->map == c)
 800                        return t->spk_mask;
 801        }
 802        return 0;
 803}
 804
 805/* from ALSA API channel position to CEA slot */
 806static int to_cea_slot(int ordered_ca, unsigned char pos)
 807{
 808        int mask = to_spk_mask(pos);
 809        int i;
 810
 811        if (mask) {
 812                for (i = 0; i < 8; i++) {
 813                        if (channel_allocations[ordered_ca].speakers[7 - i] == mask)
 814                                return i;
 815                }
 816        }
 817
 818        return -1;
 819}
 820
 821/* from speaker bit mask to ALSA API channel position */
 822static int spk_to_chmap(int spk)
 823{
 824        struct channel_map_table *t = map_tables;
 825        for (; t->map; t++) {
 826                if (t->spk_mask == spk)
 827                        return t->map;
 828        }
 829        return 0;
 830}
 831
 832/* from CEA slot to ALSA API channel position */
 833static int from_cea_slot(int ordered_ca, unsigned char slot)
 834{
 835        int mask = channel_allocations[ordered_ca].speakers[7 - slot];
 836
 837        return spk_to_chmap(mask);
 838}
 839
 840/* get the CA index corresponding to the given ALSA API channel map */
 841static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
 842{
 843        int i, spks = 0, spk_mask = 0;
 844
 845        for (i = 0; i < chs; i++) {
 846                int mask = to_spk_mask(map[i]);
 847                if (mask) {
 848                        spk_mask |= mask;
 849                        spks++;
 850                }
 851        }
 852
 853        for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 854                if ((chs == channel_allocations[i].channels ||
 855                     spks == channel_allocations[i].channels) &&
 856                    (spk_mask & channel_allocations[i].spk_mask) ==
 857                                channel_allocations[i].spk_mask)
 858                        return channel_allocations[i].ca_index;
 859        }
 860        return -1;
 861}
 862
 863/* set up the channel slots for the given ALSA API channel map */
 864static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
 865                                             hda_nid_t pin_nid,
 866                                             int chs, unsigned char *map,
 867                                             int ca)
 868{
 869        struct hdmi_spec *spec = codec->spec;
 870        int ordered_ca = get_channel_allocation_order(ca);
 871        int alsa_pos, hdmi_slot;
 872        int assignments[8] = {[0 ... 7] = 0xf};
 873
 874        for (alsa_pos = 0; alsa_pos < chs; alsa_pos++) {
 875
 876                hdmi_slot = to_cea_slot(ordered_ca, map[alsa_pos]);
 877
 878                if (hdmi_slot < 0)
 879                        continue; /* unassigned channel */
 880
 881                assignments[hdmi_slot] = alsa_pos;
 882        }
 883
 884        for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++) {
 885                int err;
 886
 887                err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot,
 888                                                     assignments[hdmi_slot]);
 889                if (err)
 890                        return -EINVAL;
 891        }
 892        return 0;
 893}
 894
 895/* store ALSA API channel map from the current default map */
 896static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
 897{
 898        int i;
 899        int ordered_ca = get_channel_allocation_order(ca);
 900        for (i = 0; i < 8; i++) {
 901                if (i < channel_allocations[ordered_ca].channels)
 902                        map[i] = from_cea_slot(ordered_ca, hdmi_channel_mapping[ca][i] & 0x0f);
 903                else
 904                        map[i] = 0;
 905        }
 906}
 907
 908static void hdmi_setup_channel_mapping(struct hda_codec *codec,
 909                                       hda_nid_t pin_nid, bool non_pcm, int ca,
 910                                       int channels, unsigned char *map,
 911                                       bool chmap_set)
 912{
 913        if (!non_pcm && chmap_set) {
 914                hdmi_manual_setup_channel_mapping(codec, pin_nid,
 915                                                  channels, map, ca);
 916        } else {
 917                hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
 918                hdmi_setup_fake_chmap(map, ca);
 919        }
 920
 921        hdmi_debug_channel_mapping(codec, pin_nid);
 922}
 923
 924static int hdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
 925                                     int asp_slot, int channel)
 926{
 927        return snd_hda_codec_write(codec, pin_nid, 0,
 928                                   AC_VERB_SET_HDMI_CHAN_SLOT,
 929                                   (channel << 4) | asp_slot);
 930}
 931
 932static int hdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
 933                                     int asp_slot)
 934{
 935        return (snd_hda_codec_read(codec, pin_nid, 0,
 936                                   AC_VERB_GET_HDMI_CHAN_SLOT,
 937                                   asp_slot) & 0xf0) >> 4;
 938}
 939
 940/*
 941 * Audio InfoFrame routines
 942 */
 943
 944/*
 945 * Enable Audio InfoFrame Transmission
 946 */
 947static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 948                                       hda_nid_t pin_nid)
 949{
 950        hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 951        snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 952                                                AC_DIPXMIT_BEST);
 953}
 954
 955/*
 956 * Disable Audio InfoFrame Transmission
 957 */
 958static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 959                                      hda_nid_t pin_nid)
 960{
 961        hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 962        snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 963                                                AC_DIPXMIT_DISABLE);
 964}
 965
 966static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 967{
 968#ifdef CONFIG_SND_DEBUG_VERBOSE
 969        int i;
 970        int size;
 971
 972        size = snd_hdmi_get_eld_size(codec, pin_nid);
 973        codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
 974
 975        for (i = 0; i < 8; i++) {
 976                size = snd_hda_codec_read(codec, pin_nid, 0,
 977                                                AC_VERB_GET_HDMI_DIP_SIZE, i);
 978                codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 979        }
 980#endif
 981}
 982
 983static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 984{
 985#ifdef BE_PARANOID
 986        int i, j;
 987        int size;
 988        int pi, bi;
 989        for (i = 0; i < 8; i++) {
 990                size = snd_hda_codec_read(codec, pin_nid, 0,
 991                                                AC_VERB_GET_HDMI_DIP_SIZE, i);
 992                if (size == 0)
 993                        continue;
 994
 995                hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 996                for (j = 1; j < 1000; j++) {
 997                        hdmi_write_dip_byte(codec, pin_nid, 0x0);
 998                        hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 999                        if (pi != i)
1000                                codec_dbg(codec, "dip index %d: %d != %d\n",
1001                                                bi, pi, i);
1002                        if (bi == 0) /* byte index wrapped around */
1003                                break;
1004                }
1005                codec_dbg(codec,
1006                        "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
1007                        i, size, j);
1008        }
1009#endif
1010}
1011
1012static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
1013{
1014        u8 *bytes = (u8 *)hdmi_ai;
1015        u8 sum = 0;
1016        int i;
1017
1018        hdmi_ai->checksum = 0;
1019
1020        for (i = 0; i < sizeof(*hdmi_ai); i++)
1021                sum += bytes[i];
1022
1023        hdmi_ai->checksum = -sum;
1024}
1025
1026static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
1027                                      hda_nid_t pin_nid,
1028                                      u8 *dip, int size)
1029{
1030        int i;
1031
1032        hdmi_debug_dip_size(codec, pin_nid);
1033        hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
1034
1035        hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1036        for (i = 0; i < size; i++)
1037                hdmi_write_dip_byte(codec, pin_nid, dip[i]);
1038}
1039
1040static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
1041                                    u8 *dip, int size)
1042{
1043        u8 val;
1044        int i;
1045
1046        if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
1047                                                            != AC_DIPXMIT_BEST)
1048                return false;
1049
1050        hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1051        for (i = 0; i < size; i++) {
1052                val = snd_hda_codec_read(codec, pin_nid, 0,
1053                                         AC_VERB_GET_HDMI_DIP_DATA, 0);
1054                if (val != dip[i])
1055                        return false;
1056        }
1057
1058        return true;
1059}
1060
1061static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
1062                                     hda_nid_t pin_nid,
1063                                     int ca, int active_channels,
1064                                     int conn_type)
1065{
1066        union audio_infoframe ai;
1067
1068        memset(&ai, 0, sizeof(ai));
1069        if (conn_type == 0) { /* HDMI */
1070                struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
1071
1072                hdmi_ai->type           = 0x84;
1073                hdmi_ai->ver            = 0x01;
1074                hdmi_ai->len            = 0x0a;
1075                hdmi_ai->CC02_CT47      = active_channels - 1;
1076                hdmi_ai->CA             = ca;
1077                hdmi_checksum_audio_infoframe(hdmi_ai);
1078        } else if (conn_type == 1) { /* DisplayPort */
1079                struct dp_audio_infoframe *dp_ai = &ai.dp;
1080
1081                dp_ai->type             = 0x84;
1082                dp_ai->len              = 0x1b;
1083                dp_ai->ver              = 0x11 << 2;
1084                dp_ai->CC02_CT47        = active_channels - 1;
1085                dp_ai->CA               = ca;
1086        } else {
1087                codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
1088                            pin_nid);
1089                return;
1090        }
1091
1092        /*
1093         * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
1094         * sizeof(*dp_ai) to avoid partial match/update problems when
1095         * the user switches between HDMI/DP monitors.
1096         */
1097        if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
1098                                        sizeof(ai))) {
1099                codec_dbg(codec,
1100                          "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
1101                            pin_nid,
1102                            active_channels, ca);
1103                hdmi_stop_infoframe_trans(codec, pin_nid);
1104                hdmi_fill_audio_infoframe(codec, pin_nid,
1105                                            ai.bytes, sizeof(ai));
1106                hdmi_start_infoframe_trans(codec, pin_nid);
1107        }
1108}
1109
1110static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
1111                                       struct hdmi_spec_per_pin *per_pin,
1112                                       bool non_pcm)
1113{
1114        struct hdmi_spec *spec = codec->spec;
1115        hda_nid_t pin_nid = per_pin->pin_nid;
1116        int channels = per_pin->channels;
1117        int active_channels;
1118        struct hdmi_eld *eld;
1119        int ca, ordered_ca;
1120
1121        if (!channels)
1122                return;
1123
1124        if (is_haswell_plus(codec))
1125                snd_hda_codec_write(codec, pin_nid, 0,
1126                                            AC_VERB_SET_AMP_GAIN_MUTE,
1127                                            AMP_OUT_UNMUTE);
1128
1129        eld = &per_pin->sink_eld;
1130        if (!eld->monitor_present) {
1131                hdmi_set_channel_count(codec, per_pin->cvt_nid, channels);
1132                return;
1133        }
1134
1135        if (!non_pcm && per_pin->chmap_set)
1136                ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
1137        else
1138                ca = hdmi_channel_allocation(eld, channels);
1139        if (ca < 0)
1140                ca = 0;
1141
1142        ordered_ca = get_channel_allocation_order(ca);
1143        active_channels = channel_allocations[ordered_ca].channels;
1144
1145        hdmi_set_channel_count(codec, per_pin->cvt_nid, active_channels);
1146
1147        /*
1148         * always configure channel mapping, it may have been changed by the
1149         * user in the meantime
1150         */
1151        hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
1152                                   channels, per_pin->chmap,
1153                                   per_pin->chmap_set);
1154
1155        spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
1156                                      eld->info.conn_type);
1157
1158        per_pin->non_pcm = non_pcm;
1159}
1160
1161/*
1162 * Unsolicited events
1163 */
1164
1165static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
1166
1167static void jack_callback(struct hda_codec *codec, struct hda_jack_tbl *jack)
1168{
1169        struct hdmi_spec *spec = codec->spec;
1170        int pin_idx = pin_nid_to_pin_index(codec, jack->nid);
1171        if (pin_idx < 0)
1172                return;
1173
1174        if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
1175                snd_hda_jack_report_sync(codec);
1176}
1177
1178static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
1179{
1180        int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1181        struct hda_jack_tbl *jack;
1182        int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
1183
1184        jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
1185        if (!jack)
1186                return;
1187        jack->jack_dirty = 1;
1188
1189        codec_dbg(codec,
1190                "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
1191                codec->addr, jack->nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
1192                !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
1193
1194        jack_callback(codec, jack);
1195}
1196
1197static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
1198{
1199        int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1200        int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1201        int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
1202        int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
1203
1204        codec_info(codec,
1205                "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1206                codec->addr,
1207                tag,
1208                subtag,
1209                cp_state,
1210                cp_ready);
1211
1212        /* TODO */
1213        if (cp_state)
1214                ;
1215        if (cp_ready)
1216                ;
1217}
1218
1219
1220static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
1221{
1222        int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1223        int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1224
1225        if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
1226                codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
1227                return;
1228        }
1229
1230        if (subtag == 0)
1231                hdmi_intrinsic_event(codec, res);
1232        else
1233                hdmi_non_intrinsic_event(codec, res);
1234}
1235
1236static void haswell_verify_D0(struct hda_codec *codec,
1237                hda_nid_t cvt_nid, hda_nid_t nid)
1238{
1239        int pwr;
1240
1241        /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
1242         * thus pins could only choose converter 0 for use. Make sure the
1243         * converters are in correct power state */
1244        if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
1245                snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1246
1247        if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
1248                snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
1249                                    AC_PWRST_D0);
1250                msleep(40);
1251                pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1252                pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1253                codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
1254        }
1255}
1256
1257/*
1258 * Callbacks
1259 */
1260
1261/* HBR should be Non-PCM, 8 channels */
1262#define is_hbr_format(format) \
1263        ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1264
1265static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
1266                              bool hbr)
1267{
1268        int pinctl, new_pinctl;
1269
1270        if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1271                pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1272                                            AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1273
1274                if (pinctl < 0)
1275                        return hbr ? -EINVAL : 0;
1276
1277                new_pinctl = pinctl & ~AC_PINCTL_EPT;
1278                if (hbr)
1279                        new_pinctl |= AC_PINCTL_EPT_HBR;
1280                else
1281                        new_pinctl |= AC_PINCTL_EPT_NATIVE;
1282
1283                codec_dbg(codec,
1284                          "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
1285                            pin_nid,
1286                            pinctl == new_pinctl ? "" : "new-",
1287                            new_pinctl);
1288
1289                if (pinctl != new_pinctl)
1290                        snd_hda_codec_write(codec, pin_nid, 0,
1291                                            AC_VERB_SET_PIN_WIDGET_CONTROL,
1292                                            new_pinctl);
1293        } else if (hbr)
1294                return -EINVAL;
1295
1296        return 0;
1297}
1298
1299static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1300                              hda_nid_t pin_nid, u32 stream_tag, int format)
1301{
1302        struct hdmi_spec *spec = codec->spec;
1303        int err;
1304
1305        if (is_haswell_plus(codec))
1306                haswell_verify_D0(codec, cvt_nid, pin_nid);
1307
1308        err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
1309
1310        if (err) {
1311                codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
1312                return err;
1313        }
1314
1315        snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1316        return 0;
1317}
1318
1319static int hdmi_choose_cvt(struct hda_codec *codec,
1320                        int pin_idx, int *cvt_id, int *mux_id)
1321{
1322        struct hdmi_spec *spec = codec->spec;
1323        struct hdmi_spec_per_pin *per_pin;
1324        struct hdmi_spec_per_cvt *per_cvt = NULL;
1325        int cvt_idx, mux_idx = 0;
1326
1327        per_pin = get_pin(spec, pin_idx);
1328
1329        /* Dynamically assign converter to stream */
1330        for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1331                per_cvt = get_cvt(spec, cvt_idx);
1332
1333                /* Must not already be assigned */
1334                if (per_cvt->assigned)
1335                        continue;
1336                /* Must be in pin's mux's list of converters */
1337                for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1338                        if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1339                                break;
1340                /* Not in mux list */
1341                if (mux_idx == per_pin->num_mux_nids)
1342                        continue;
1343                break;
1344        }
1345
1346        /* No free converters */
1347        if (cvt_idx == spec->num_cvts)
1348                return -ENODEV;
1349
1350        per_pin->mux_idx = mux_idx;
1351
1352        if (cvt_id)
1353                *cvt_id = cvt_idx;
1354        if (mux_id)
1355                *mux_id = mux_idx;
1356
1357        return 0;
1358}
1359
1360/* Assure the pin select the right convetor */
1361static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
1362                        struct hdmi_spec_per_pin *per_pin)
1363{
1364        hda_nid_t pin_nid = per_pin->pin_nid;
1365        int mux_idx, curr;
1366
1367        mux_idx = per_pin->mux_idx;
1368        curr = snd_hda_codec_read(codec, pin_nid, 0,
1369                                          AC_VERB_GET_CONNECT_SEL, 0);
1370        if (curr != mux_idx)
1371                snd_hda_codec_write_cache(codec, pin_nid, 0,
1372                                            AC_VERB_SET_CONNECT_SEL,
1373                                            mux_idx);
1374}
1375
1376/* Intel HDMI workaround to fix audio routing issue:
1377 * For some Intel display codecs, pins share the same connection list.
1378 * So a conveter can be selected by multiple pins and playback on any of these
1379 * pins will generate sound on the external display, because audio flows from
1380 * the same converter to the display pipeline. Also muting one pin may make
1381 * other pins have no sound output.
1382 * So this function assures that an assigned converter for a pin is not selected
1383 * by any other pins.
1384 */
1385static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1386                        hda_nid_t pin_nid, int mux_idx)
1387{
1388        struct hdmi_spec *spec = codec->spec;
1389        hda_nid_t nid, end_nid;
1390        int cvt_idx, curr;
1391        struct hdmi_spec_per_cvt *per_cvt;
1392
1393        /* configure all pins, including "no physical connection" ones */
1394        end_nid = codec->start_nid + codec->num_nodes;
1395        for (nid = codec->start_nid; nid < end_nid; nid++) {
1396                unsigned int wid_caps = get_wcaps(codec, nid);
1397                unsigned int wid_type = get_wcaps_type(wid_caps);
1398
1399                if (wid_type != AC_WID_PIN)
1400                        continue;
1401
1402                if (nid == pin_nid)
1403                        continue;
1404
1405                curr = snd_hda_codec_read(codec, nid, 0,
1406                                          AC_VERB_GET_CONNECT_SEL, 0);
1407                if (curr != mux_idx)
1408                        continue;
1409
1410                /* choose an unassigned converter. The conveters in the
1411                 * connection list are in the same order as in the codec.
1412                 */
1413                for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1414                        per_cvt = get_cvt(spec, cvt_idx);
1415                        if (!per_cvt->assigned) {
1416                                codec_dbg(codec,
1417                                          "choose cvt %d for pin nid %d\n",
1418                                        cvt_idx, nid);
1419                                snd_hda_codec_write_cache(codec, nid, 0,
1420                                            AC_VERB_SET_CONNECT_SEL,
1421                                            cvt_idx);
1422                                break;
1423                        }
1424                }
1425        }
1426}
1427
1428/*
1429 * HDA PCM callbacks
1430 */
1431static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1432                         struct hda_codec *codec,
1433                         struct snd_pcm_substream *substream)
1434{
1435        struct hdmi_spec *spec = codec->spec;
1436        struct snd_pcm_runtime *runtime = substream->runtime;
1437        int pin_idx, cvt_idx, mux_idx = 0;
1438        struct hdmi_spec_per_pin *per_pin;
1439        struct hdmi_eld *eld;
1440        struct hdmi_spec_per_cvt *per_cvt = NULL;
1441        int err;
1442
1443        /* Validate hinfo */
1444        pin_idx = hinfo_to_pin_index(codec, hinfo);
1445        if (snd_BUG_ON(pin_idx < 0))
1446                return -EINVAL;
1447        per_pin = get_pin(spec, pin_idx);
1448        eld = &per_pin->sink_eld;
1449
1450        err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
1451        if (err < 0)
1452                return err;
1453
1454        per_cvt = get_cvt(spec, cvt_idx);
1455        /* Claim converter */
1456        per_cvt->assigned = 1;
1457        per_pin->cvt_nid = per_cvt->cvt_nid;
1458        hinfo->nid = per_cvt->cvt_nid;
1459
1460        snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1461                            AC_VERB_SET_CONNECT_SEL,
1462                            mux_idx);
1463
1464        /* configure unused pins to choose other converters */
1465        if (is_haswell_plus(codec) || is_valleyview(codec))
1466                intel_not_share_assigned_cvt(codec, per_pin->pin_nid, mux_idx);
1467
1468        snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
1469
1470        /* Initially set the converter's capabilities */
1471        hinfo->channels_min = per_cvt->channels_min;
1472        hinfo->channels_max = per_cvt->channels_max;
1473        hinfo->rates = per_cvt->rates;
1474        hinfo->formats = per_cvt->formats;
1475        hinfo->maxbps = per_cvt->maxbps;
1476
1477        /* Restrict capabilities by ELD if this isn't disabled */
1478        if (!static_hdmi_pcm && eld->eld_valid) {
1479                snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1480                if (hinfo->channels_min > hinfo->channels_max ||
1481                    !hinfo->rates || !hinfo->formats) {
1482                        per_cvt->assigned = 0;
1483                        hinfo->nid = 0;
1484                        snd_hda_spdif_ctls_unassign(codec, pin_idx);
1485                        return -ENODEV;
1486                }
1487        }
1488
1489        /* Store the updated parameters */
1490        runtime->hw.channels_min = hinfo->channels_min;
1491        runtime->hw.channels_max = hinfo->channels_max;
1492        runtime->hw.formats = hinfo->formats;
1493        runtime->hw.rates = hinfo->rates;
1494
1495        snd_pcm_hw_constraint_step(substream->runtime, 0,
1496                                   SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1497        return 0;
1498}
1499
1500/*
1501 * HDA/HDMI auto parsing
1502 */
1503static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1504{
1505        struct hdmi_spec *spec = codec->spec;
1506        struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1507        hda_nid_t pin_nid = per_pin->pin_nid;
1508
1509        if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1510                codec_warn(codec,
1511                           "HDMI: pin %d wcaps %#x does not support connection list\n",
1512                           pin_nid, get_wcaps(codec, pin_nid));
1513                return -EINVAL;
1514        }
1515
1516        per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1517                                                        per_pin->mux_nids,
1518                                                        HDA_MAX_CONNECTIONS);
1519
1520        return 0;
1521}
1522
1523static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1524{
1525        struct hda_jack_tbl *jack;
1526        struct hda_codec *codec = per_pin->codec;
1527        struct hdmi_spec *spec = codec->spec;
1528        struct hdmi_eld *eld = &spec->temp_eld;
1529        struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1530        hda_nid_t pin_nid = per_pin->pin_nid;
1531        /*
1532         * Always execute a GetPinSense verb here, even when called from
1533         * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1534         * response's PD bit is not the real PD value, but indicates that
1535         * the real PD value changed. An older version of the HD-audio
1536         * specification worked this way. Hence, we just ignore the data in
1537         * the unsolicited response to avoid custom WARs.
1538         */
1539        int present;
1540        bool update_eld = false;
1541        bool eld_changed = false;
1542        bool ret;
1543
1544        snd_hda_power_up(codec);
1545        present = snd_hda_pin_sense(codec, pin_nid);
1546
1547        mutex_lock(&per_pin->lock);
1548        pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1549        if (pin_eld->monitor_present)
1550                eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1551        else
1552                eld->eld_valid = false;
1553
1554        codec_dbg(codec,
1555                "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1556                codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1557
1558        if (eld->eld_valid) {
1559                if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
1560                                                     &eld->eld_size) < 0)
1561                        eld->eld_valid = false;
1562                else {
1563                        memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
1564                        if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer,
1565                                                    eld->eld_size) < 0)
1566                                eld->eld_valid = false;
1567                }
1568
1569                if (eld->eld_valid) {
1570                        snd_hdmi_show_eld(&eld->info);
1571                        update_eld = true;
1572                }
1573                else if (repoll) {
1574                        queue_delayed_work(codec->bus->workq,
1575                                           &per_pin->work,
1576                                           msecs_to_jiffies(300));
1577                        goto unlock;
1578                }
1579        }
1580
1581        if (pin_eld->eld_valid && !eld->eld_valid) {
1582                update_eld = true;
1583                eld_changed = true;
1584        }
1585        if (update_eld) {
1586                bool old_eld_valid = pin_eld->eld_valid;
1587                pin_eld->eld_valid = eld->eld_valid;
1588                eld_changed = pin_eld->eld_size != eld->eld_size ||
1589                              memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1590                                     eld->eld_size) != 0;
1591                if (eld_changed)
1592                        memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1593                               eld->eld_size);
1594                pin_eld->eld_size = eld->eld_size;
1595                pin_eld->info = eld->info;
1596
1597                /*
1598                 * Re-setup pin and infoframe. This is needed e.g. when
1599                 * - sink is first plugged-in (infoframe is not set up if !monitor_present)
1600                 * - transcoder can change during stream playback on Haswell
1601                 */
1602                if (eld->eld_valid && !old_eld_valid && per_pin->setup)
1603                        hdmi_setup_audio_infoframe(codec, per_pin,
1604                                                   per_pin->non_pcm);
1605        }
1606
1607        if (eld_changed)
1608                snd_ctl_notify(codec->bus->card,
1609                               SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
1610                               &per_pin->eld_ctl->id);
1611 unlock:
1612        ret = !repoll || !pin_eld->monitor_present || pin_eld->eld_valid;
1613
1614        jack = snd_hda_jack_tbl_get(codec, pin_nid);
1615        if (jack)
1616                jack->block_report = !ret;
1617
1618        mutex_unlock(&per_pin->lock);
1619        snd_hda_power_down(codec);
1620        return ret;
1621}
1622
1623static void hdmi_repoll_eld(struct work_struct *work)
1624{
1625        struct hdmi_spec_per_pin *per_pin =
1626        container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1627
1628        if (per_pin->repoll_count++ > 6)
1629                per_pin->repoll_count = 0;
1630
1631        if (hdmi_present_sense(per_pin, per_pin->repoll_count))
1632                snd_hda_jack_report_sync(per_pin->codec);
1633}
1634
1635static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1636                                             hda_nid_t nid);
1637
1638static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1639{
1640        struct hdmi_spec *spec = codec->spec;
1641        unsigned int caps, config;
1642        int pin_idx;
1643        struct hdmi_spec_per_pin *per_pin;
1644        int err;
1645
1646        caps = snd_hda_query_pin_caps(codec, pin_nid);
1647        if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1648                return 0;
1649
1650        config = snd_hda_codec_get_pincfg(codec, pin_nid);
1651        if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1652                return 0;
1653
1654        if (is_haswell_plus(codec))
1655                intel_haswell_fixup_connect_list(codec, pin_nid);
1656
1657        pin_idx = spec->num_pins;
1658        per_pin = snd_array_new(&spec->pins);
1659        if (!per_pin)
1660                return -ENOMEM;
1661
1662        per_pin->pin_nid = pin_nid;
1663        per_pin->non_pcm = false;
1664
1665        err = hdmi_read_pin_conn(codec, pin_idx);
1666        if (err < 0)
1667                return err;
1668
1669        spec->num_pins++;
1670
1671        return 0;
1672}
1673
1674static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1675{
1676        struct hdmi_spec *spec = codec->spec;
1677        struct hdmi_spec_per_cvt *per_cvt;
1678        unsigned int chans;
1679        int err;
1680
1681        chans = get_wcaps(codec, cvt_nid);
1682        chans = get_wcaps_channels(chans);
1683
1684        per_cvt = snd_array_new(&spec->cvts);
1685        if (!per_cvt)
1686                return -ENOMEM;
1687
1688        per_cvt->cvt_nid = cvt_nid;
1689        per_cvt->channels_min = 2;
1690        if (chans <= 16) {
1691                per_cvt->channels_max = chans;
1692                if (chans > spec->channels_max)
1693                        spec->channels_max = chans;
1694        }
1695
1696        err = snd_hda_query_supported_pcm(codec, cvt_nid,
1697                                          &per_cvt->rates,
1698                                          &per_cvt->formats,
1699                                          &per_cvt->maxbps);
1700        if (err < 0)
1701                return err;
1702
1703        if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1704                spec->cvt_nids[spec->num_cvts] = cvt_nid;
1705        spec->num_cvts++;
1706
1707        return 0;
1708}
1709
1710static int hdmi_parse_codec(struct hda_codec *codec)
1711{
1712        hda_nid_t nid;
1713        int i, nodes;
1714
1715        nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1716        if (!nid || nodes < 0) {
1717                codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
1718                return -EINVAL;
1719        }
1720
1721        for (i = 0; i < nodes; i++, nid++) {
1722                unsigned int caps;
1723                unsigned int type;
1724
1725                caps = get_wcaps(codec, nid);
1726                type = get_wcaps_type(caps);
1727
1728                if (!(caps & AC_WCAP_DIGITAL))
1729                        continue;
1730
1731                switch (type) {
1732                case AC_WID_AUD_OUT:
1733                        hdmi_add_cvt(codec, nid);
1734                        break;
1735                case AC_WID_PIN:
1736                        hdmi_add_pin(codec, nid);
1737                        break;
1738                }
1739        }
1740
1741        return 0;
1742}
1743
1744/*
1745 */
1746static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1747{
1748        struct hda_spdif_out *spdif;
1749        bool non_pcm;
1750
1751        mutex_lock(&codec->spdif_mutex);
1752        spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1753        non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1754        mutex_unlock(&codec->spdif_mutex);
1755        return non_pcm;
1756}
1757
1758
1759/*
1760 * HDMI callbacks
1761 */
1762
1763static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1764                                           struct hda_codec *codec,
1765                                           unsigned int stream_tag,
1766                                           unsigned int format,
1767                                           struct snd_pcm_substream *substream)
1768{
1769        hda_nid_t cvt_nid = hinfo->nid;
1770        struct hdmi_spec *spec = codec->spec;
1771        int pin_idx = hinfo_to_pin_index(codec, hinfo);
1772        struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1773        hda_nid_t pin_nid = per_pin->pin_nid;
1774        bool non_pcm;
1775        int pinctl;
1776
1777        if (is_haswell_plus(codec) || is_valleyview(codec)) {
1778                /* Verify pin:cvt selections to avoid silent audio after S3.
1779                 * After S3, the audio driver restores pin:cvt selections
1780                 * but this can happen before gfx is ready and such selection
1781                 * is overlooked by HW. Thus multiple pins can share a same
1782                 * default convertor and mute control will affect each other,
1783                 * which can cause a resumed audio playback become silent
1784                 * after S3.
1785                 */
1786                intel_verify_pin_cvt_connect(codec, per_pin);
1787                intel_not_share_assigned_cvt(codec, pin_nid, per_pin->mux_idx);
1788        }
1789
1790        non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1791        mutex_lock(&per_pin->lock);
1792        per_pin->channels = substream->runtime->channels;
1793        per_pin->setup = true;
1794
1795        hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1796        mutex_unlock(&per_pin->lock);
1797
1798        if (spec->dyn_pin_out) {
1799                pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1800                                            AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1801                snd_hda_codec_write(codec, pin_nid, 0,
1802                                    AC_VERB_SET_PIN_WIDGET_CONTROL,
1803                                    pinctl | PIN_OUT);
1804        }
1805
1806        return spec->ops.setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1807}
1808
1809static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1810                                             struct hda_codec *codec,
1811                                             struct snd_pcm_substream *substream)
1812{
1813        snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1814        return 0;
1815}
1816
1817static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1818                          struct hda_codec *codec,
1819                          struct snd_pcm_substream *substream)
1820{
1821        struct hdmi_spec *spec = codec->spec;
1822        int cvt_idx, pin_idx;
1823        struct hdmi_spec_per_cvt *per_cvt;
1824        struct hdmi_spec_per_pin *per_pin;
1825        int pinctl;
1826
1827        if (hinfo->nid) {
1828                cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
1829                if (snd_BUG_ON(cvt_idx < 0))
1830                        return -EINVAL;
1831                per_cvt = get_cvt(spec, cvt_idx);
1832
1833                snd_BUG_ON(!per_cvt->assigned);
1834                per_cvt->assigned = 0;
1835                hinfo->nid = 0;
1836
1837                pin_idx = hinfo_to_pin_index(codec, hinfo);
1838                if (snd_BUG_ON(pin_idx < 0))
1839                        return -EINVAL;
1840                per_pin = get_pin(spec, pin_idx);
1841
1842                if (spec->dyn_pin_out) {
1843                        pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1844                                        AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1845                        snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1846                                            AC_VERB_SET_PIN_WIDGET_CONTROL,
1847                                            pinctl & ~PIN_OUT);
1848                }
1849
1850                snd_hda_spdif_ctls_unassign(codec, pin_idx);
1851
1852                mutex_lock(&per_pin->lock);
1853                per_pin->chmap_set = false;
1854                memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1855
1856                per_pin->setup = false;
1857                per_pin->channels = 0;
1858                mutex_unlock(&per_pin->lock);
1859        }
1860
1861        return 0;
1862}
1863
1864static const struct hda_pcm_ops generic_ops = {
1865        .open = hdmi_pcm_open,
1866        .close = hdmi_pcm_close,
1867        .prepare = generic_hdmi_playback_pcm_prepare,
1868        .cleanup = generic_hdmi_playback_pcm_cleanup,
1869};
1870
1871/*
1872 * ALSA API channel-map control callbacks
1873 */
1874static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
1875                               struct snd_ctl_elem_info *uinfo)
1876{
1877        struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1878        struct hda_codec *codec = info->private_data;
1879        struct hdmi_spec *spec = codec->spec;
1880        uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1881        uinfo->count = spec->channels_max;
1882        uinfo->value.integer.min = 0;
1883        uinfo->value.integer.max = SNDRV_CHMAP_LAST;
1884        return 0;
1885}
1886
1887static int hdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
1888                                                  int channels)
1889{
1890        /* If the speaker allocation matches the channel count, it is OK.*/
1891        if (cap->channels != channels)
1892                return -1;
1893
1894        /* all channels are remappable freely */
1895        return SNDRV_CTL_TLVT_CHMAP_VAR;
1896}
1897
1898static void hdmi_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
1899                                        unsigned int *chmap, int channels)
1900{
1901        int count = 0;
1902        int c;
1903
1904        for (c = 7; c >= 0; c--) {
1905                int spk = cap->speakers[c];
1906                if (!spk)
1907                        continue;
1908
1909                chmap[count++] = spk_to_chmap(spk);
1910        }
1911
1912        WARN_ON(count != channels);
1913}
1914
1915static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
1916                              unsigned int size, unsigned int __user *tlv)
1917{
1918        struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1919        struct hda_codec *codec = info->private_data;
1920        struct hdmi_spec *spec = codec->spec;
1921        unsigned int __user *dst;
1922        int chs, count = 0;
1923
1924        if (size < 8)
1925                return -ENOMEM;
1926        if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
1927                return -EFAULT;
1928        size -= 8;
1929        dst = tlv + 2;
1930        for (chs = 2; chs <= spec->channels_max; chs++) {
1931                int i;
1932                struct cea_channel_speaker_allocation *cap;
1933                cap = channel_allocations;
1934                for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
1935                        int chs_bytes = chs * 4;
1936                        int type = spec->ops.chmap_cea_alloc_validate_get_type(cap, chs);
1937                        unsigned int tlv_chmap[8];
1938
1939                        if (type < 0)
1940                                continue;
1941                        if (size < 8)
1942                                return -ENOMEM;
1943                        if (put_user(type, dst) ||
1944                            put_user(chs_bytes, dst + 1))
1945                                return -EFAULT;
1946                        dst += 2;
1947                        size -= 8;
1948                        count += 8;
1949                        if (size < chs_bytes)
1950                                return -ENOMEM;
1951                        size -= chs_bytes;
1952                        count += chs_bytes;
1953                        spec->ops.cea_alloc_to_tlv_chmap(cap, tlv_chmap, chs);
1954                        if (copy_to_user(dst, tlv_chmap, chs_bytes))
1955                                return -EFAULT;
1956                        dst += chs;
1957                }
1958        }
1959        if (put_user(count, tlv + 1))
1960                return -EFAULT;
1961        return 0;
1962}
1963
1964static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
1965                              struct snd_ctl_elem_value *ucontrol)
1966{
1967        struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1968        struct hda_codec *codec = info->private_data;
1969        struct hdmi_spec *spec = codec->spec;
1970        int pin_idx = kcontrol->private_value;
1971        struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1972        int i;
1973
1974        for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
1975                ucontrol->value.integer.value[i] = per_pin->chmap[i];
1976        return 0;
1977}
1978
1979static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
1980                              struct snd_ctl_elem_value *ucontrol)
1981{
1982        struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1983        struct hda_codec *codec = info->private_data;
1984        struct hdmi_spec *spec = codec->spec;
1985        int pin_idx = kcontrol->private_value;
1986        struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1987        unsigned int ctl_idx;
1988        struct snd_pcm_substream *substream;
1989        unsigned char chmap[8];
1990        int i, err, ca, prepared = 0;
1991
1992        ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1993        substream = snd_pcm_chmap_substream(info, ctl_idx);
1994        if (!substream || !substream->runtime)
1995                return 0; /* just for avoiding error from alsactl restore */
1996        switch (substream->runtime->status->state) {
1997        case SNDRV_PCM_STATE_OPEN:
1998        case SNDRV_PCM_STATE_SETUP:
1999                break;
2000        case SNDRV_PCM_STATE_PREPARED:
2001                prepared = 1;
2002                break;
2003        default:
2004                return -EBUSY;
2005        }
2006        memset(chmap, 0, sizeof(chmap));
2007        for (i = 0; i < ARRAY_SIZE(chmap); i++)
2008                chmap[i] = ucontrol->value.integer.value[i];
2009        if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
2010                return 0;
2011        ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
2012        if (ca < 0)
2013                return -EINVAL;
2014        if (spec->ops.chmap_validate) {
2015                err = spec->ops.chmap_validate(ca, ARRAY_SIZE(chmap), chmap);
2016                if (err)
2017                        return err;
2018        }
2019        mutex_lock(&per_pin->lock);
2020        per_pin->chmap_set = true;
2021        memcpy(per_pin->chmap, chmap, sizeof(chmap));
2022        if (prepared)
2023                hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
2024        mutex_unlock(&per_pin->lock);
2025
2026        return 0;
2027}
2028
2029static int generic_hdmi_build_pcms(struct hda_codec *codec)
2030{
2031        struct hdmi_spec *spec = codec->spec;
2032        int pin_idx;
2033
2034        for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2035                struct hda_pcm *info;
2036                struct hda_pcm_stream *pstr;
2037                struct hdmi_spec_per_pin *per_pin;
2038
2039                per_pin = get_pin(spec, pin_idx);
2040                sprintf(per_pin->pcm_name, "HDMI %d", pin_idx);
2041                info = snd_array_new(&spec->pcm_rec);
2042                if (!info)
2043                        return -ENOMEM;
2044                info->name = per_pin->pcm_name;
2045                info->pcm_type = HDA_PCM_TYPE_HDMI;
2046                info->own_chmap = true;
2047
2048                pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2049                pstr->substreams = 1;
2050                pstr->ops = generic_ops;
2051                /* other pstr fields are set in open */
2052        }
2053
2054        codec->num_pcms = spec->num_pins;
2055        codec->pcm_info = spec->pcm_rec.list;
2056
2057        return 0;
2058}
2059
2060static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
2061{
2062        char hdmi_str[32] = "HDMI/DP";
2063        struct hdmi_spec *spec = codec->spec;
2064        struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2065        int pcmdev = get_pcm_rec(spec, pin_idx)->device;
2066
2067        if (pcmdev > 0)
2068                sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2069        if (!is_jack_detectable(codec, per_pin->pin_nid))
2070                strncat(hdmi_str, " Phantom",
2071                        sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2072
2073        return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
2074}
2075
2076static int generic_hdmi_build_controls(struct hda_codec *codec)
2077{
2078        struct hdmi_spec *spec = codec->spec;
2079        int err;
2080        int pin_idx;
2081
2082        for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2083                struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2084
2085                err = generic_hdmi_build_jack(codec, pin_idx);
2086                if (err < 0)
2087                        return err;
2088
2089                err = snd_hda_create_dig_out_ctls(codec,
2090                                                  per_pin->pin_nid,
2091                                                  per_pin->mux_nids[0],
2092                                                  HDA_PCM_TYPE_HDMI);
2093                if (err < 0)
2094                        return err;
2095                snd_hda_spdif_ctls_unassign(codec, pin_idx);
2096
2097                /* add control for ELD Bytes */
2098                err = hdmi_create_eld_ctl(codec, pin_idx,
2099                                          get_pcm_rec(spec, pin_idx)->device);
2100
2101                if (err < 0)
2102                        return err;
2103
2104                hdmi_present_sense(per_pin, 0);
2105        }
2106
2107        /* add channel maps */
2108        for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2109                struct snd_pcm_chmap *chmap;
2110                struct snd_kcontrol *kctl;
2111                int i;
2112
2113                if (!codec->pcm_info[pin_idx].pcm)
2114                        break;
2115                err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
2116                                             SNDRV_PCM_STREAM_PLAYBACK,
2117                                             NULL, 0, pin_idx, &chmap);
2118                if (err < 0)
2119                        return err;
2120                /* override handlers */
2121                chmap->private_data = codec;
2122                kctl = chmap->kctl;
2123                for (i = 0; i < kctl->count; i++)
2124                        kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
2125                kctl->info = hdmi_chmap_ctl_info;
2126                kctl->get = hdmi_chmap_ctl_get;
2127                kctl->put = hdmi_chmap_ctl_put;
2128                kctl->tlv.c = hdmi_chmap_ctl_tlv;
2129        }
2130
2131        return 0;
2132}
2133
2134static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2135{
2136        struct hdmi_spec *spec = codec->spec;
2137        int pin_idx;
2138
2139        for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2140                struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2141
2142                per_pin->codec = codec;
2143                mutex_init(&per_pin->lock);
2144                INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2145                eld_proc_new(per_pin, pin_idx);
2146        }
2147        return 0;
2148}
2149
2150static int generic_hdmi_init(struct hda_codec *codec)
2151{
2152        struct hdmi_spec *spec = codec->spec;
2153        int pin_idx;
2154
2155        for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2156                struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2157                hda_nid_t pin_nid = per_pin->pin_nid;
2158
2159                hdmi_init_pin(codec, pin_nid);
2160                snd_hda_jack_detect_enable_callback(codec, pin_nid, pin_nid,
2161                        codec->jackpoll_interval > 0 ? jack_callback : NULL);
2162        }
2163        return 0;
2164}
2165
2166static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2167{
2168        snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2169        snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2170        snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums);
2171}
2172
2173static void hdmi_array_free(struct hdmi_spec *spec)
2174{
2175        snd_array_free(&spec->pins);
2176        snd_array_free(&spec->cvts);
2177        snd_array_free(&spec->pcm_rec);
2178}
2179
2180static void generic_hdmi_free(struct hda_codec *codec)
2181{
2182        struct hdmi_spec *spec = codec->spec;
2183        int pin_idx;
2184
2185        for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2186                struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2187
2188                cancel_delayed_work(&per_pin->work);
2189                eld_proc_free(per_pin);
2190        }
2191
2192        flush_workqueue(codec->bus->workq);
2193        hdmi_array_free(spec);
2194        kfree(spec);
2195}
2196
2197#ifdef CONFIG_PM
2198static int generic_hdmi_resume(struct hda_codec *codec)
2199{
2200        struct hdmi_spec *spec = codec->spec;
2201        int pin_idx;
2202
2203        generic_hdmi_init(codec);
2204        snd_hda_codec_resume_amp(codec);
2205        snd_hda_codec_resume_cache(codec);
2206
2207        for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2208                struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2209                hdmi_present_sense(per_pin, 1);
2210        }
2211        return 0;
2212}
2213#endif
2214
2215static const struct hda_codec_ops generic_hdmi_patch_ops = {
2216        .init                   = generic_hdmi_init,
2217        .free                   = generic_hdmi_free,
2218        .build_pcms             = generic_hdmi_build_pcms,
2219        .build_controls         = generic_hdmi_build_controls,
2220        .unsol_event            = hdmi_unsol_event,
2221#ifdef CONFIG_PM
2222        .resume                 = generic_hdmi_resume,
2223#endif
2224};
2225
2226static const struct hdmi_ops generic_standard_hdmi_ops = {
2227        .pin_get_eld                            = snd_hdmi_get_eld,
2228        .pin_get_slot_channel                   = hdmi_pin_get_slot_channel,
2229        .pin_set_slot_channel                   = hdmi_pin_set_slot_channel,
2230        .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2231        .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2232        .setup_stream                           = hdmi_setup_stream,
2233        .chmap_cea_alloc_validate_get_type      = hdmi_chmap_cea_alloc_validate_get_type,
2234        .cea_alloc_to_tlv_chmap                 = hdmi_cea_alloc_to_tlv_chmap,
2235};
2236
2237
2238static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2239                                             hda_nid_t nid)
2240{
2241        struct hdmi_spec *spec = codec->spec;
2242        hda_nid_t conns[4];
2243        int nconns;
2244
2245        nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2246        if (nconns == spec->num_cvts &&
2247            !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2248                return;
2249
2250        /* override pins connection list */
2251        codec_dbg(codec, "hdmi: haswell: override pin connection 0x%x\n", nid);
2252        snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2253}
2254
2255#define INTEL_VENDOR_NID 0x08
2256#define INTEL_GET_VENDOR_VERB 0xf81
2257#define INTEL_SET_VENDOR_VERB 0x781
2258#define INTEL_EN_DP12                   0x02 /* enable DP 1.2 features */
2259#define INTEL_EN_ALL_PIN_CVTS   0x01 /* enable 2nd & 3rd pins and convertors */
2260
2261static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2262                                          bool update_tree)
2263{
2264        unsigned int vendor_param;
2265
2266        vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2267                                INTEL_GET_VENDOR_VERB, 0);
2268        if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2269                return;
2270
2271        vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2272        vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2273                                INTEL_SET_VENDOR_VERB, vendor_param);
2274        if (vendor_param == -1)
2275                return;
2276
2277        if (update_tree)
2278                snd_hda_codec_update_widgets(codec);
2279}
2280
2281static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2282{
2283        unsigned int vendor_param;
2284
2285        vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2286                                INTEL_GET_VENDOR_VERB, 0);
2287        if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2288                return;
2289
2290        /* enable DP1.2 mode */
2291        vendor_param |= INTEL_EN_DP12;
2292        snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
2293                                INTEL_SET_VENDOR_VERB, vendor_param);
2294}
2295
2296/* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2297 * Otherwise you may get severe h/w communication errors.
2298 */
2299static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2300                                unsigned int power_state)
2301{
2302        if (power_state == AC_PWRST_D0) {
2303                intel_haswell_enable_all_pins(codec, false);
2304                intel_haswell_fixup_enable_dp12(codec);
2305        }
2306
2307        snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2308        snd_hda_codec_set_power_to_all(codec, fg, power_state);
2309}
2310
2311static int patch_generic_hdmi(struct hda_codec *codec)
2312{
2313        struct hdmi_spec *spec;
2314
2315        spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2316        if (spec == NULL)
2317                return -ENOMEM;
2318
2319        spec->ops = generic_standard_hdmi_ops;
2320        codec->spec = spec;
2321        hdmi_array_init(spec, 4);
2322
2323        if (is_haswell_plus(codec)) {
2324                intel_haswell_enable_all_pins(codec, true);
2325                intel_haswell_fixup_enable_dp12(codec);
2326        }
2327
2328        if (is_haswell(codec) || is_valleyview(codec)) {
2329                codec->depop_delay = 0;
2330        }
2331
2332        if (hdmi_parse_codec(codec) < 0) {
2333                codec->spec = NULL;
2334                kfree(spec);
2335                return -EINVAL;
2336        }
2337        codec->patch_ops = generic_hdmi_patch_ops;
2338        if (is_haswell_plus(codec)) {
2339                codec->patch_ops.set_power_state = haswell_set_power_state;
2340                codec->dp_mst = true;
2341        }
2342
2343        generic_hdmi_init_per_pins(codec);
2344
2345        init_channel_allocations();
2346
2347        return 0;
2348}
2349
2350/*
2351 * Shared non-generic implementations
2352 */
2353
2354static int simple_playback_build_pcms(struct hda_codec *codec)
2355{
2356        struct hdmi_spec *spec = codec->spec;
2357        struct hda_pcm *info;
2358        unsigned int chans;
2359        struct hda_pcm_stream *pstr;
2360        struct hdmi_spec_per_cvt *per_cvt;
2361
2362        per_cvt = get_cvt(spec, 0);
2363        chans = get_wcaps(codec, per_cvt->cvt_nid);
2364        chans = get_wcaps_channels(chans);
2365
2366        info = snd_array_new(&spec->pcm_rec);
2367        if (!info)
2368                return -ENOMEM;
2369        info->name = get_pin(spec, 0)->pcm_name;
2370        sprintf(info->name, "HDMI 0");
2371        info->pcm_type = HDA_PCM_TYPE_HDMI;
2372        pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2373        *pstr = spec->pcm_playback;
2374        pstr->nid = per_cvt->cvt_nid;
2375        if (pstr->channels_max <= 2 && chans && chans <= 16)
2376                pstr->channels_max = chans;
2377
2378        codec->num_pcms = 1;
2379        codec->pcm_info = info;
2380
2381        return 0;
2382}
2383
2384/* unsolicited event for jack sensing */
2385static void simple_hdmi_unsol_event(struct hda_codec *codec,
2386                                    unsigned int res)
2387{
2388        snd_hda_jack_set_dirty_all(codec);
2389        snd_hda_jack_report_sync(codec);
2390}
2391
2392/* generic_hdmi_build_jack can be used for simple_hdmi, too,
2393 * as long as spec->pins[] is set correctly
2394 */
2395#define simple_hdmi_build_jack  generic_hdmi_build_jack
2396
2397static int simple_playback_build_controls(struct hda_codec *codec)
2398{
2399        struct hdmi_spec *spec = codec->spec;
2400        struct hdmi_spec_per_cvt *per_cvt;
2401        int err;
2402
2403        per_cvt = get_cvt(spec, 0);
2404        err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
2405                                          per_cvt->cvt_nid,
2406                                          HDA_PCM_TYPE_HDMI);
2407        if (err < 0)
2408                return err;
2409        return simple_hdmi_build_jack(codec, 0);
2410}
2411
2412static int simple_playback_init(struct hda_codec *codec)
2413{
2414        struct hdmi_spec *spec = codec->spec;
2415        struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2416        hda_nid_t pin = per_pin->pin_nid;
2417
2418        snd_hda_codec_write(codec, pin, 0,
2419                            AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2420        /* some codecs require to unmute the pin */
2421        if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2422                snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2423                                    AMP_OUT_UNMUTE);
2424        snd_hda_jack_detect_enable(codec, pin, pin);
2425        return 0;
2426}
2427
2428static void simple_playback_free(struct hda_codec *codec)
2429{
2430        struct hdmi_spec *spec = codec->spec;
2431
2432        hdmi_array_free(spec);
2433        kfree(spec);
2434}
2435
2436/*
2437 * Nvidia specific implementations
2438 */
2439
2440#define Nv_VERB_SET_Channel_Allocation          0xF79
2441#define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
2442#define Nv_VERB_SET_Audio_Protection_On         0xF98
2443#define Nv_VERB_SET_Audio_Protection_Off        0xF99
2444
2445#define nvhdmi_master_con_nid_7x        0x04
2446#define nvhdmi_master_pin_nid_7x        0x05
2447
2448static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2449        /*front, rear, clfe, rear_surr */
2450        0x6, 0x8, 0xa, 0xc,
2451};
2452
2453static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2454        /* set audio protect on */
2455        { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2456        /* enable digital output on pin widget */
2457        { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2458        {} /* terminator */
2459};
2460
2461static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2462        /* set audio protect on */
2463        { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2464        /* enable digital output on pin widget */
2465        { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2466        { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2467        { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2468        { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2469        { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2470        {} /* terminator */
2471};
2472
2473#ifdef LIMITED_RATE_FMT_SUPPORT
2474/* support only the safe format and rate */
2475#define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
2476#define SUPPORTED_MAXBPS        16
2477#define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
2478#else
2479/* support all rates and formats */
2480#define SUPPORTED_RATES \
2481        (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2482        SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2483         SNDRV_PCM_RATE_192000)
2484#define SUPPORTED_MAXBPS        24
2485#define SUPPORTED_FORMATS \
2486        (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2487#endif
2488
2489static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2490{
2491        snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2492        return 0;
2493}
2494
2495static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2496{
2497        snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2498        return 0;
2499}
2500
2501static unsigned int channels_2_6_8[] = {
2502        2, 6, 8
2503};
2504
2505static unsigned int channels_2_8[] = {
2506        2, 8
2507};
2508
2509static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2510        .count = ARRAY_SIZE(channels_2_6_8),
2511        .list = channels_2_6_8,
2512        .mask = 0,
2513};
2514
2515static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2516        .count = ARRAY_SIZE(channels_2_8),
2517        .list = channels_2_8,
2518        .mask = 0,
2519};
2520
2521static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2522                                    struct hda_codec *codec,
2523                                    struct snd_pcm_substream *substream)
2524{
2525        struct hdmi_spec *spec = codec->spec;
2526        struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2527
2528        switch (codec->preset->id) {
2529        case 0x10de0002:
2530        case 0x10de0003:
2531        case 0x10de0005:
2532        case 0x10de0006:
2533                hw_constraints_channels = &hw_constraints_2_8_channels;
2534                break;
2535        case 0x10de0007:
2536                hw_constraints_channels = &hw_constraints_2_6_8_channels;
2537                break;
2538        default:
2539                break;
2540        }
2541
2542        if (hw_constraints_channels != NULL) {
2543                snd_pcm_hw_constraint_list(substream->runtime, 0,
2544                                SNDRV_PCM_HW_PARAM_CHANNELS,
2545                                hw_constraints_channels);
2546        } else {
2547                snd_pcm_hw_constraint_step(substream->runtime, 0,
2548                                           SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2549        }
2550
2551        return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2552}
2553
2554static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2555                                     struct hda_codec *codec,
2556                                     struct snd_pcm_substream *substream)
2557{
2558        struct hdmi_spec *spec = codec->spec;
2559        return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2560}
2561
2562static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2563                                       struct hda_codec *codec,
2564                                       unsigned int stream_tag,
2565                                       unsigned int format,
2566                                       struct snd_pcm_substream *substream)
2567{
2568        struct hdmi_spec *spec = codec->spec;
2569        return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2570                                             stream_tag, format, substream);
2571}
2572
2573static const struct hda_pcm_stream simple_pcm_playback = {
2574        .substreams = 1,
2575        .channels_min = 2,
2576        .channels_max = 2,
2577        .ops = {
2578                .open = simple_playback_pcm_open,
2579                .close = simple_playback_pcm_close,
2580                .prepare = simple_playback_pcm_prepare
2581        },
2582};
2583
2584static const struct hda_codec_ops simple_hdmi_patch_ops = {
2585        .build_controls = simple_playback_build_controls,
2586        .build_pcms = simple_playback_build_pcms,
2587        .init = simple_playback_init,
2588        .free = simple_playback_free,
2589        .unsol_event = simple_hdmi_unsol_event,
2590};
2591
2592static int patch_simple_hdmi(struct hda_codec *codec,
2593                             hda_nid_t cvt_nid, hda_nid_t pin_nid)
2594{
2595        struct hdmi_spec *spec;
2596        struct hdmi_spec_per_cvt *per_cvt;
2597        struct hdmi_spec_per_pin *per_pin;
2598
2599        spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2600        if (!spec)
2601                return -ENOMEM;
2602
2603        codec->spec = spec;
2604        hdmi_array_init(spec, 1);
2605
2606        spec->multiout.num_dacs = 0;  /* no analog */
2607        spec->multiout.max_channels = 2;
2608        spec->multiout.dig_out_nid = cvt_nid;
2609        spec->num_cvts = 1;
2610        spec->num_pins = 1;
2611        per_pin = snd_array_new(&spec->pins);
2612        per_cvt = snd_array_new(&spec->cvts);
2613        if (!per_pin || !per_cvt) {
2614                simple_playback_free(codec);
2615                return -ENOMEM;
2616        }
2617        per_cvt->cvt_nid = cvt_nid;
2618        per_pin->pin_nid = pin_nid;
2619        spec->pcm_playback = simple_pcm_playback;
2620
2621        codec->patch_ops = simple_hdmi_patch_ops;
2622
2623        return 0;
2624}
2625
2626static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2627                                                    int channels)
2628{
2629        unsigned int chanmask;
2630        int chan = channels ? (channels - 1) : 1;
2631
2632        switch (channels) {
2633        default:
2634        case 0:
2635        case 2:
2636                chanmask = 0x00;
2637                break;
2638        case 4:
2639                chanmask = 0x08;
2640                break;
2641        case 6:
2642                chanmask = 0x0b;
2643                break;
2644        case 8:
2645                chanmask = 0x13;
2646                break;
2647        }
2648
2649        /* Set the audio infoframe channel allocation and checksum fields.  The
2650         * channel count is computed implicitly by the hardware. */
2651        snd_hda_codec_write(codec, 0x1, 0,
2652                        Nv_VERB_SET_Channel_Allocation, chanmask);
2653
2654        snd_hda_codec_write(codec, 0x1, 0,
2655                        Nv_VERB_SET_Info_Frame_Checksum,
2656                        (0x71 - chan - chanmask));
2657}
2658
2659static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2660                                   struct hda_codec *codec,
2661                                   struct snd_pcm_substream *substream)
2662{
2663        struct hdmi_spec *spec = codec->spec;
2664        int i;
2665
2666        snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2667                        0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2668        for (i = 0; i < 4; i++) {
2669                /* set the stream id */
2670                snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2671                                AC_VERB_SET_CHANNEL_STREAMID, 0);
2672                /* set the stream format */
2673                snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2674                                AC_VERB_SET_STREAM_FORMAT, 0);
2675        }
2676
2677        /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2678         * streams are disabled. */
2679        nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2680
2681        return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2682}
2683
2684static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2685                                     struct hda_codec *codec,
2686                                     unsigned int stream_tag,
2687                                     unsigned int format,
2688                                     struct snd_pcm_substream *substream)
2689{
2690        int chs;
2691        unsigned int dataDCC2, channel_id;
2692        int i;
2693        struct hdmi_spec *spec = codec->spec;
2694        struct hda_spdif_out *spdif;
2695        struct hdmi_spec_per_cvt *per_cvt;
2696
2697        mutex_lock(&codec->spdif_mutex);
2698        per_cvt = get_cvt(spec, 0);
2699        spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2700
2701        chs = substream->runtime->channels;
2702
2703        dataDCC2 = 0x2;
2704
2705        /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2706        if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2707                snd_hda_codec_write(codec,
2708                                nvhdmi_master_con_nid_7x,
2709                                0,
2710                                AC_VERB_SET_DIGI_CONVERT_1,
2711                                spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2712
2713        /* set the stream id */
2714        snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2715                        AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2716
2717        /* set the stream format */
2718        snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2719                        AC_VERB_SET_STREAM_FORMAT, format);
2720
2721        /* turn on again (if needed) */
2722        /* enable and set the channel status audio/data flag */
2723        if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2724                snd_hda_codec_write(codec,
2725                                nvhdmi_master_con_nid_7x,
2726                                0,
2727                                AC_VERB_SET_DIGI_CONVERT_1,
2728                                spdif->ctls & 0xff);
2729                snd_hda_codec_write(codec,
2730                                nvhdmi_master_con_nid_7x,
2731                                0,
2732                                AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2733        }
2734
2735        for (i = 0; i < 4; i++) {
2736                if (chs == 2)
2737                        channel_id = 0;
2738                else
2739                        channel_id = i * 2;
2740
2741                /* turn off SPDIF once;
2742                 *otherwise the IEC958 bits won't be updated
2743                 */
2744                if (codec->spdif_status_reset &&
2745                (spdif->ctls & AC_DIG1_ENABLE))
2746                        snd_hda_codec_write(codec,
2747                                nvhdmi_con_nids_7x[i],
2748                                0,
2749                                AC_VERB_SET_DIGI_CONVERT_1,
2750                                spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2751                /* set the stream id */
2752                snd_hda_codec_write(codec,
2753                                nvhdmi_con_nids_7x[i],
2754                                0,
2755                                AC_VERB_SET_CHANNEL_STREAMID,
2756                                (stream_tag << 4) | channel_id);
2757                /* set the stream format */
2758                snd_hda_codec_write(codec,
2759                                nvhdmi_con_nids_7x[i],
2760                                0,
2761                                AC_VERB_SET_STREAM_FORMAT,
2762                                format);
2763                /* turn on again (if needed) */
2764                /* enable and set the channel status audio/data flag */
2765                if (codec->spdif_status_reset &&
2766                (spdif->ctls & AC_DIG1_ENABLE)) {
2767                        snd_hda_codec_write(codec,
2768                                        nvhdmi_con_nids_7x[i],
2769                                        0,
2770                                        AC_VERB_SET_DIGI_CONVERT_1,
2771                                        spdif->ctls & 0xff);
2772                        snd_hda_codec_write(codec,
2773                                        nvhdmi_con_nids_7x[i],
2774                                        0,
2775                                        AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2776                }
2777        }
2778
2779        nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2780
2781        mutex_unlock(&codec->spdif_mutex);
2782        return 0;
2783}
2784
2785static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2786        .substreams = 1,
2787        .channels_min = 2,
2788        .channels_max = 8,
2789        .nid = nvhdmi_master_con_nid_7x,
2790        .rates = SUPPORTED_RATES,
2791        .maxbps = SUPPORTED_MAXBPS,
2792        .formats = SUPPORTED_FORMATS,
2793        .ops = {
2794                .open = simple_playback_pcm_open,
2795                .close = nvhdmi_8ch_7x_pcm_close,
2796                .prepare = nvhdmi_8ch_7x_pcm_prepare
2797        },
2798};
2799
2800static int patch_nvhdmi_2ch(struct hda_codec *codec)
2801{
2802        struct hdmi_spec *spec;
2803        int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2804                                    nvhdmi_master_pin_nid_7x);
2805        if (err < 0)
2806                return err;
2807
2808        codec->patch_ops.init = nvhdmi_7x_init_2ch;
2809        /* override the PCM rates, etc, as the codec doesn't give full list */
2810        spec = codec->spec;
2811        spec->pcm_playback.rates = SUPPORTED_RATES;
2812        spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2813        spec->pcm_playback.formats = SUPPORTED_FORMATS;
2814        return 0;
2815}
2816
2817static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2818{
2819        struct hdmi_spec *spec = codec->spec;
2820        int err = simple_playback_build_pcms(codec);
2821        if (!err) {
2822                struct hda_pcm *info = get_pcm_rec(spec, 0);
2823                info->own_chmap = true;
2824        }
2825        return err;
2826}
2827
2828static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2829{
2830        struct hdmi_spec *spec = codec->spec;
2831        struct hda_pcm *info;
2832        struct snd_pcm_chmap *chmap;
2833        int err;
2834
2835        err = simple_playback_build_controls(codec);
2836        if (err < 0)
2837                return err;
2838
2839        /* add channel maps */
2840        info = get_pcm_rec(spec, 0);
2841        err = snd_pcm_add_chmap_ctls(info->pcm,
2842                                     SNDRV_PCM_STREAM_PLAYBACK,
2843                                     snd_pcm_alt_chmaps, 8, 0, &chmap);
2844        if (err < 0)
2845                return err;
2846        switch (codec->preset->id) {
2847        case 0x10de0002:
2848        case 0x10de0003:
2849        case 0x10de0005:
2850        case 0x10de0006:
2851                chmap->channel_mask = (1U << 2) | (1U << 8);
2852                break;
2853        case 0x10de0007:
2854                chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2855        }
2856        return 0;
2857}
2858
2859static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2860{
2861        struct hdmi_spec *spec;
2862        int err = patch_nvhdmi_2ch(codec);
2863        if (err < 0)
2864                return err;
2865        spec = codec->spec;
2866        spec->multiout.max_channels = 8;
2867        spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2868        codec->patch_ops.init = nvhdmi_7x_init_8ch;
2869        codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2870        codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2871
2872        /* Initialize the audio infoframe channel mask and checksum to something
2873         * valid */
2874        nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2875
2876        return 0;
2877}
2878
2879/*
2880 * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
2881 * - 0x10de0015
2882 * - 0x10de0040
2883 */
2884static int nvhdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
2885                                                    int channels)
2886{
2887        if (cap->ca_index == 0x00 && channels == 2)
2888                return SNDRV_CTL_TLVT_CHMAP_FIXED;
2889
2890        return hdmi_chmap_cea_alloc_validate_get_type(cap, channels);
2891}
2892
2893static int nvhdmi_chmap_validate(int ca, int chs, unsigned char *map)
2894{
2895        if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
2896                return -EINVAL;
2897
2898        return 0;
2899}
2900
2901static int patch_nvhdmi(struct hda_codec *codec)
2902{
2903        struct hdmi_spec *spec;
2904        int err;
2905
2906        err = patch_generic_hdmi(codec);
2907        if (err)
2908                return err;
2909
2910        spec = codec->spec;
2911        spec->dyn_pin_out = true;
2912
2913        spec->ops.chmap_cea_alloc_validate_get_type =
2914                nvhdmi_chmap_cea_alloc_validate_get_type;
2915        spec->ops.chmap_validate = nvhdmi_chmap_validate;
2916
2917        return 0;
2918}
2919
2920/*
2921 * ATI/AMD-specific implementations
2922 */
2923
2924#define is_amdhdmi_rev3_or_later(codec) \
2925        ((codec)->vendor_id == 0x1002aa01 && ((codec)->revision_id & 0xff00) >= 0x0300)
2926#define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
2927
2928/* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
2929#define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
2930#define ATI_VERB_SET_DOWNMIX_INFO       0x772
2931#define ATI_VERB_SET_MULTICHANNEL_01    0x777
2932#define ATI_VERB_SET_MULTICHANNEL_23    0x778
2933#define ATI_VERB_SET_MULTICHANNEL_45    0x779
2934#define ATI_VERB_SET_MULTICHANNEL_67    0x77a
2935#define ATI_VERB_SET_HBR_CONTROL        0x77c
2936#define ATI_VERB_SET_MULTICHANNEL_1     0x785
2937#define ATI_VERB_SET_MULTICHANNEL_3     0x786
2938#define ATI_VERB_SET_MULTICHANNEL_5     0x787
2939#define ATI_VERB_SET_MULTICHANNEL_7     0x788
2940#define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
2941#define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
2942#define ATI_VERB_GET_DOWNMIX_INFO       0xf72
2943#define ATI_VERB_GET_MULTICHANNEL_01    0xf77
2944#define ATI_VERB_GET_MULTICHANNEL_23    0xf78
2945#define ATI_VERB_GET_MULTICHANNEL_45    0xf79
2946#define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
2947#define ATI_VERB_GET_HBR_CONTROL        0xf7c
2948#define ATI_VERB_GET_MULTICHANNEL_1     0xf85
2949#define ATI_VERB_GET_MULTICHANNEL_3     0xf86
2950#define ATI_VERB_GET_MULTICHANNEL_5     0xf87
2951#define ATI_VERB_GET_MULTICHANNEL_7     0xf88
2952#define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
2953
2954/* AMD specific HDA cvt verbs */
2955#define ATI_VERB_SET_RAMP_RATE          0x770
2956#define ATI_VERB_GET_RAMP_RATE          0xf70
2957
2958#define ATI_OUT_ENABLE 0x1
2959
2960#define ATI_MULTICHANNEL_MODE_PAIRED    0
2961#define ATI_MULTICHANNEL_MODE_SINGLE    1
2962
2963#define ATI_HBR_CAPABLE 0x01
2964#define ATI_HBR_ENABLE 0x10
2965
2966static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
2967                           unsigned char *buf, int *eld_size)
2968{
2969        /* call hda_eld.c ATI/AMD-specific function */
2970        return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
2971                                    is_amdhdmi_rev3_or_later(codec));
2972}
2973
2974static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
2975                                        int active_channels, int conn_type)
2976{
2977        snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
2978}
2979
2980static int atihdmi_paired_swap_fc_lfe(int pos)
2981{
2982        /*
2983         * ATI/AMD have automatic FC/LFE swap built-in
2984         * when in pairwise mapping mode.
2985         */
2986
2987        switch (pos) {
2988                /* see channel_allocations[].speakers[] */
2989                case 2: return 3;
2990                case 3: return 2;
2991                default: break;
2992        }
2993
2994        return pos;
2995}
2996
2997static int atihdmi_paired_chmap_validate(int ca, int chs, unsigned char *map)
2998{
2999        struct cea_channel_speaker_allocation *cap;
3000        int i, j;
3001
3002        /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3003
3004        cap = &channel_allocations[get_channel_allocation_order(ca)];
3005        for (i = 0; i < chs; ++i) {
3006                int mask = to_spk_mask(map[i]);
3007                bool ok = false;
3008                bool companion_ok = false;
3009
3010                if (!mask)
3011                        continue;
3012
3013                for (j = 0 + i % 2; j < 8; j += 2) {
3014                        int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3015                        if (cap->speakers[chan_idx] == mask) {
3016                                /* channel is in a supported position */
3017                                ok = true;
3018
3019                                if (i % 2 == 0 && i + 1 < chs) {
3020                                        /* even channel, check the odd companion */
3021                                        int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3022                                        int comp_mask_req = to_spk_mask(map[i+1]);
3023                                        int comp_mask_act = cap->speakers[comp_chan_idx];
3024
3025                                        if (comp_mask_req == comp_mask_act)
3026                                                companion_ok = true;
3027                                        else
3028                                                return -EINVAL;
3029                                }
3030                                break;
3031                        }
3032                }
3033
3034                if (!ok)
3035                        return -EINVAL;
3036
3037                if (companion_ok)
3038                        i++; /* companion channel already checked */
3039        }
3040
3041        return 0;
3042}
3043
3044static int atihdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
3045                                        int hdmi_slot, int stream_channel)
3046{
3047        int verb;
3048        int ati_channel_setup = 0;
3049
3050        if (hdmi_slot > 7)
3051                return -EINVAL;
3052
3053        if (!has_amd_full_remap_support(codec)) {
3054                hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3055
3056                /* In case this is an odd slot but without stream channel, do not
3057                 * disable the slot since the corresponding even slot could have a
3058                 * channel. In case neither have a channel, the slot pair will be
3059                 * disabled when this function is called for the even slot. */
3060                if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3061                        return 0;
3062
3063                hdmi_slot -= hdmi_slot % 2;
3064
3065                if (stream_channel != 0xf)
3066                        stream_channel -= stream_channel % 2;
3067        }
3068
3069        verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3070
3071        /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3072
3073        if (stream_channel != 0xf)
3074                ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3075
3076        return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3077}
3078
3079static int atihdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
3080                                        int asp_slot)
3081{
3082        bool was_odd = false;
3083        int ati_asp_slot = asp_slot;
3084        int verb;
3085        int ati_channel_setup;
3086
3087        if (asp_slot > 7)
3088                return -EINVAL;
3089
3090        if (!has_amd_full_remap_support(codec)) {
3091                ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3092                if (ati_asp_slot % 2 != 0) {
3093                        ati_asp_slot -= 1;
3094                        was_odd = true;
3095                }
3096        }
3097
3098        verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3099
3100        ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3101
3102        if (!(ati_channel_setup & ATI_OUT_ENABLE))
3103                return 0xf;
3104
3105        return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3106}
3107
3108static int atihdmi_paired_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
3109                                                            int channels)
3110{
3111        int c;
3112
3113        /*
3114         * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3115         * we need to take that into account (a single channel may take 2
3116         * channel slots if we need to carry a silent channel next to it).
3117         * On Rev3+ AMD codecs this function is not used.
3118         */
3119        int chanpairs = 0;
3120
3121        /* We only produce even-numbered channel count TLVs */
3122        if ((channels % 2) != 0)
3123                return -1;
3124
3125        for (c = 0; c < 7; c += 2) {
3126                if (cap->speakers[c] || cap->speakers[c+1])
3127                        chanpairs++;
3128        }
3129
3130        if (chanpairs * 2 != channels)
3131                return -1;
3132
3133        return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3134}
3135
3136static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
3137                                                  unsigned int *chmap, int channels)
3138{
3139        /* produce paired maps for pre-rev3 ATI/AMD codecs */
3140        int count = 0;
3141        int c;
3142
3143        for (c = 7; c >= 0; c--) {
3144                int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3145                int spk = cap->speakers[chan];
3146                if (!spk) {
3147                        /* add N/A channel if the companion channel is occupied */
3148                        if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3149                                chmap[count++] = SNDRV_CHMAP_NA;
3150
3151                        continue;
3152                }
3153
3154                chmap[count++] = spk_to_chmap(spk);
3155        }
3156
3157        WARN_ON(count != channels);
3158}
3159
3160static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3161                                 bool hbr)
3162{
3163        int hbr_ctl, hbr_ctl_new;
3164
3165        hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3166        if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
3167                if (hbr)
3168                        hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3169                else
3170                        hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3171
3172                codec_dbg(codec,
3173                          "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
3174                                pin_nid,
3175                                hbr_ctl == hbr_ctl_new ? "" : "new-",
3176                                hbr_ctl_new);
3177
3178                if (hbr_ctl != hbr_ctl_new)
3179                        snd_hda_codec_write(codec, pin_nid, 0,
3180                                                ATI_VERB_SET_HBR_CONTROL,
3181                                                hbr_ctl_new);
3182
3183        } else if (hbr)
3184                return -EINVAL;
3185
3186        return 0;
3187}
3188
3189static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3190                                hda_nid_t pin_nid, u32 stream_tag, int format)
3191{
3192
3193        if (is_amdhdmi_rev3_or_later(codec)) {
3194                int ramp_rate = 180; /* default as per AMD spec */
3195                /* disable ramp-up/down for non-pcm as per AMD spec */
3196                if (format & AC_FMT_TYPE_NON_PCM)
3197                        ramp_rate = 0;
3198
3199                snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3200        }
3201
3202        return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
3203}
3204
3205
3206static int atihdmi_init(struct hda_codec *codec)
3207{
3208        struct hdmi_spec *spec = codec->spec;
3209        int pin_idx, err;
3210
3211        err = generic_hdmi_init(codec);
3212
3213        if (err)
3214                return err;
3215
3216        for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
3217                struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
3218
3219                /* make sure downmix information in infoframe is zero */
3220                snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
3221
3222                /* enable channel-wise remap mode if supported */
3223                if (has_amd_full_remap_support(codec))
3224                        snd_hda_codec_write(codec, per_pin->pin_nid, 0,
3225                                            ATI_VERB_SET_MULTICHANNEL_MODE,
3226                                            ATI_MULTICHANNEL_MODE_SINGLE);
3227        }
3228
3229        return 0;
3230}
3231
3232static int patch_atihdmi(struct hda_codec *codec)
3233{
3234        struct hdmi_spec *spec;
3235        struct hdmi_spec_per_cvt *per_cvt;
3236        int err, cvt_idx;
3237
3238        err = patch_generic_hdmi(codec);
3239
3240        if (err)
3241                return err;
3242
3243        codec->patch_ops.init = atihdmi_init;
3244
3245        spec = codec->spec;
3246
3247        spec->ops.pin_get_eld = atihdmi_pin_get_eld;
3248        spec->ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
3249        spec->ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
3250        spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
3251        spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
3252        spec->ops.setup_stream = atihdmi_setup_stream;
3253
3254        if (!has_amd_full_remap_support(codec)) {
3255                /* override to ATI/AMD-specific versions with pairwise mapping */
3256                spec->ops.chmap_cea_alloc_validate_get_type =
3257                        atihdmi_paired_chmap_cea_alloc_validate_get_type;
3258                spec->ops.cea_alloc_to_tlv_chmap = atihdmi_paired_cea_alloc_to_tlv_chmap;
3259                spec->ops.chmap_validate = atihdmi_paired_chmap_validate;
3260        }
3261
3262        /* ATI/AMD converters do not advertise all of their capabilities */
3263        for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
3264                per_cvt = get_cvt(spec, cvt_idx);
3265                per_cvt->channels_max = max(per_cvt->channels_max, 8u);
3266                per_cvt->rates |= SUPPORTED_RATES;
3267                per_cvt->formats |= SUPPORTED_FORMATS;
3268                per_cvt->maxbps = max(per_cvt->maxbps, 24u);
3269        }
3270
3271        spec->channels_max = max(spec->channels_max, 8u);
3272
3273        return 0;
3274}
3275
3276/* VIA HDMI Implementation */
3277#define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
3278#define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
3279
3280static int patch_via_hdmi(struct hda_codec *codec)
3281{
3282        return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
3283}
3284
3285/*
3286 * called from hda_codec.c for generic HDMI support
3287 */
3288int snd_hda_parse_hdmi_codec(struct hda_codec *codec)
3289{
3290        return patch_generic_hdmi(codec);
3291}
3292EXPORT_SYMBOL_GPL(snd_hda_parse_hdmi_codec);
3293
3294/*
3295 * patch entries
3296 */
3297static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
3298{ .id = 0x1002793c, .name = "RS600 HDMI",       .patch = patch_atihdmi },
3299{ .id = 0x10027919, .name = "RS600 HDMI",       .patch = patch_atihdmi },
3300{ .id = 0x1002791a, .name = "RS690/780 HDMI",   .patch = patch_atihdmi },
3301{ .id = 0x1002aa01, .name = "R6xx HDMI",        .patch = patch_atihdmi },
3302{ .id = 0x10951390, .name = "SiI1390 HDMI",     .patch = patch_generic_hdmi },
3303{ .id = 0x10951392, .name = "SiI1392 HDMI",     .patch = patch_generic_hdmi },
3304{ .id = 0x17e80047, .name = "Chrontel HDMI",    .patch = patch_generic_hdmi },
3305{ .id = 0x10de0002, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3306{ .id = 0x10de0003, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3307{ .id = 0x10de0005, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3308{ .id = 0x10de0006, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3309{ .id = 0x10de0007, .name = "MCP79/7A HDMI",    .patch = patch_nvhdmi_8ch_7x },
3310{ .id = 0x10de000a, .name = "GPU 0a HDMI/DP",   .patch = patch_nvhdmi },
3311{ .id = 0x10de000b, .name = "GPU 0b HDMI/DP",   .patch = patch_nvhdmi },
3312{ .id = 0x10de000c, .name = "MCP89 HDMI",       .patch = patch_nvhdmi },
3313{ .id = 0x10de000d, .name = "GPU 0d HDMI/DP",   .patch = patch_nvhdmi },
3314{ .id = 0x10de0010, .name = "GPU 10 HDMI/DP",   .patch = patch_nvhdmi },
3315{ .id = 0x10de0011, .name = "GPU 11 HDMI/DP",   .patch = patch_nvhdmi },
3316{ .id = 0x10de0012, .name = "GPU 12 HDMI/DP",   .patch = patch_nvhdmi },
3317{ .id = 0x10de0013, .name = "GPU 13 HDMI/DP",   .patch = patch_nvhdmi },
3318{ .id = 0x10de0014, .name = "GPU 14 HDMI/DP",   .patch = patch_nvhdmi },
3319{ .id = 0x10de0015, .name = "GPU 15 HDMI/DP",   .patch = patch_nvhdmi },
3320{ .id = 0x10de0016, .name = "GPU 16 HDMI/DP",   .patch = patch_nvhdmi },
3321/* 17 is known to be absent */
3322{ .id = 0x10de0018, .name = "GPU 18 HDMI/DP",   .patch = patch_nvhdmi },
3323{ .id = 0x10de0019, .name = "GPU 19 HDMI/DP",   .patch = patch_nvhdmi },
3324{ .id = 0x10de001a, .name = "GPU 1a HDMI/DP",   .patch = patch_nvhdmi },
3325{ .id = 0x10de001b, .name = "GPU 1b HDMI/DP",   .patch = patch_nvhdmi },
3326{ .id = 0x10de001c, .name = "GPU 1c HDMI/DP",   .patch = patch_nvhdmi },
3327{ .id = 0x10de0040, .name = "GPU 40 HDMI/DP",   .patch = patch_nvhdmi },
3328{ .id = 0x10de0041, .name = "GPU 41 HDMI/DP",   .patch = patch_nvhdmi },
3329{ .id = 0x10de0042, .name = "GPU 42 HDMI/DP",   .patch = patch_nvhdmi },
3330{ .id = 0x10de0043, .name = "GPU 43 HDMI/DP",   .patch = patch_nvhdmi },
3331{ .id = 0x10de0044, .name = "GPU 44 HDMI/DP",   .patch = patch_nvhdmi },
3332{ .id = 0x10de0051, .name = "GPU 51 HDMI/DP",   .patch = patch_nvhdmi },
3333{ .id = 0x10de0060, .name = "GPU 60 HDMI/DP",   .patch = patch_nvhdmi },
3334{ .id = 0x10de0067, .name = "MCP67 HDMI",       .patch = patch_nvhdmi_2ch },
3335{ .id = 0x10de0071, .name = "GPU 71 HDMI/DP",   .patch = patch_nvhdmi },
3336{ .id = 0x10de8001, .name = "MCP73 HDMI",       .patch = patch_nvhdmi_2ch },
3337{ .id = 0x11069f80, .name = "VX900 HDMI/DP",    .patch = patch_via_hdmi },
3338{ .id = 0x11069f81, .name = "VX900 HDMI/DP",    .patch = patch_via_hdmi },
3339{ .id = 0x11069f84, .name = "VX11 HDMI/DP",     .patch = patch_generic_hdmi },
3340{ .id = 0x11069f85, .name = "VX11 HDMI/DP",     .patch = patch_generic_hdmi },
3341{ .id = 0x80860054, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
3342{ .id = 0x80862801, .name = "Bearlake HDMI",    .patch = patch_generic_hdmi },
3343{ .id = 0x80862802, .name = "Cantiga HDMI",     .patch = patch_generic_hdmi },
3344{ .id = 0x80862803, .name = "Eaglelake HDMI",   .patch = patch_generic_hdmi },
3345{ .id = 0x80862804, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
3346{ .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
3347{ .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
3348{ .id = 0x80862807, .name = "Haswell HDMI",     .patch = patch_generic_hdmi },
3349{ .id = 0x80862808, .name = "Broadwell HDMI",   .patch = patch_generic_hdmi },
3350{ .id = 0x80862880, .name = "CedarTrail HDMI",  .patch = patch_generic_hdmi },
3351{ .id = 0x80862882, .name = "Valleyview2 HDMI", .patch = patch_generic_hdmi },
3352{ .id = 0x808629fb, .name = "Crestline HDMI",   .patch = patch_generic_hdmi },
3353{} /* terminator */
3354};
3355
3356MODULE_ALIAS("snd-hda-codec-id:1002793c");
3357MODULE_ALIAS("snd-hda-codec-id:10027919");
3358MODULE_ALIAS("snd-hda-codec-id:1002791a");
3359MODULE_ALIAS("snd-hda-codec-id:1002aa01");
3360MODULE_ALIAS("snd-hda-codec-id:10951390");
3361MODULE_ALIAS("snd-hda-codec-id:10951392");
3362MODULE_ALIAS("snd-hda-codec-id:10de0002");
3363MODULE_ALIAS("snd-hda-codec-id:10de0003");
3364MODULE_ALIAS("snd-hda-codec-id:10de0005");
3365MODULE_ALIAS("snd-hda-codec-id:10de0006");
3366MODULE_ALIAS("snd-hda-codec-id:10de0007");
3367MODULE_ALIAS("snd-hda-codec-id:10de000a");
3368MODULE_ALIAS("snd-hda-codec-id:10de000b");
3369MODULE_ALIAS("snd-hda-codec-id:10de000c");
3370MODULE_ALIAS("snd-hda-codec-id:10de000d");
3371MODULE_ALIAS("snd-hda-codec-id:10de0010");
3372MODULE_ALIAS("snd-hda-codec-id:10de0011");
3373MODULE_ALIAS("snd-hda-codec-id:10de0012");
3374MODULE_ALIAS("snd-hda-codec-id:10de0013");
3375MODULE_ALIAS("snd-hda-codec-id:10de0014");
3376MODULE_ALIAS("snd-hda-codec-id:10de0015");
3377MODULE_ALIAS("snd-hda-codec-id:10de0016");
3378MODULE_ALIAS("snd-hda-codec-id:10de0018");
3379MODULE_ALIAS("snd-hda-codec-id:10de0019");
3380MODULE_ALIAS("snd-hda-codec-id:10de001a");
3381MODULE_ALIAS("snd-hda-codec-id:10de001b");
3382MODULE_ALIAS("snd-hda-codec-id:10de001c");
3383MODULE_ALIAS("snd-hda-codec-id:10de0040");
3384MODULE_ALIAS("snd-hda-codec-id:10de0041");
3385MODULE_ALIAS("snd-hda-codec-id:10de0042");
3386MODULE_ALIAS("snd-hda-codec-id:10de0043");
3387MODULE_ALIAS("snd-hda-codec-id:10de0044");
3388MODULE_ALIAS("snd-hda-codec-id:10de0051");
3389MODULE_ALIAS("snd-hda-codec-id:10de0060");
3390MODULE_ALIAS("snd-hda-codec-id:10de0067");
3391MODULE_ALIAS("snd-hda-codec-id:10de0071");
3392MODULE_ALIAS("snd-hda-codec-id:10de8001");
3393MODULE_ALIAS("snd-hda-codec-id:11069f80");
3394MODULE_ALIAS("snd-hda-codec-id:11069f81");
3395MODULE_ALIAS("snd-hda-codec-id:11069f84");
3396MODULE_ALIAS("snd-hda-codec-id:11069f85");
3397MODULE_ALIAS("snd-hda-codec-id:17e80047");
3398MODULE_ALIAS("snd-hda-codec-id:80860054");
3399MODULE_ALIAS("snd-hda-codec-id:80862801");
3400MODULE_ALIAS("snd-hda-codec-id:80862802");
3401MODULE_ALIAS("snd-hda-codec-id:80862803");
3402MODULE_ALIAS("snd-hda-codec-id:80862804");
3403MODULE_ALIAS("snd-hda-codec-id:80862805");
3404MODULE_ALIAS("snd-hda-codec-id:80862806");
3405MODULE_ALIAS("snd-hda-codec-id:80862807");
3406MODULE_ALIAS("snd-hda-codec-id:80862808");
3407MODULE_ALIAS("snd-hda-codec-id:80862880");
3408MODULE_ALIAS("snd-hda-codec-id:80862882");
3409MODULE_ALIAS("snd-hda-codec-id:808629fb");
3410
3411MODULE_LICENSE("GPL");
3412MODULE_DESCRIPTION("HDMI HD-audio codec");
3413MODULE_ALIAS("snd-hda-codec-intelhdmi");
3414MODULE_ALIAS("snd-hda-codec-nvhdmi");
3415MODULE_ALIAS("snd-hda-codec-atihdmi");
3416
3417static struct hda_codec_preset_list intel_list = {
3418        .preset = snd_hda_preset_hdmi,
3419        .owner = THIS_MODULE,
3420};
3421
3422static int __init patch_hdmi_init(void)
3423{
3424        return snd_hda_add_codec_preset(&intel_list);
3425}
3426
3427static void __exit patch_hdmi_exit(void)
3428{
3429        snd_hda_delete_codec_preset(&intel_list);
3430}
3431
3432module_init(patch_hdmi_init)
3433module_exit(patch_hdmi_exit)
3434