LXR linux/arch/arm/mach-mmp/clock.h

   1/*
   2 *  linux/arch/arm/mach-mmp/clock.h
   3 *
   4 *  This program is free software; you can redistribute it and/or modify
   5 *  it under the terms of the GNU General Public License version 2 as
   6 *  published by the Free Software Foundation.
   7 */
   8
   9#include <linux/clkdev.h>
  10
  11struct clkops {
  12        void                    (*enable)(struct clk *);
  13        void                    (*disable)(struct clk *);
  14        unsigned long           (*getrate)(struct clk *);
  15        int                     (*setrate)(struct clk *, unsigned long);
  16};
  17
  18struct clk {
  19        const struct clkops     *ops;
  20
  21        void __iomem    *clk_rst;       /* clock reset control register */
  22        int             fnclksel;       /* functional clock select (APBC) */
  23        uint32_t        enable_val;     /* value for clock enable (APMU) */
  24        unsigned long   rate;
  25        int             enabled;
  26};
  27
  28extern struct clkops apbc_clk_ops;
  29extern struct clkops apmu_clk_ops;
  30
  31#define APBC_CLK(_name, _reg, _fnclksel, _rate)                 \
  32struct clk clk_##_name = {                                      \
  33                .clk_rst        = APBC_##_reg,                  \
  34                .fnclksel       = _fnclksel,                    \
  35                .rate           = _rate,                        \
  36                .ops            = &apbc_clk_ops,                \
  37}
  38
  39#define APBC_CLK_OPS(_name, _reg, _fnclksel, _rate, _ops)       \
  40struct clk clk_##_name = {                                      \
  41                .clk_rst        = APBC_##_reg,                  \
  42                .fnclksel       = _fnclksel,                    \
  43                .rate           = _rate,                        \
  44                .ops            = _ops,                         \
  45}
  46
  47#define APMU_CLK(_name, _reg, _eval, _rate)                     \
  48struct clk clk_##_name = {                                      \
  49                .clk_rst        = APMU_##_reg,                  \
  50                .enable_val     = _eval,                        \
  51                .rate           = _rate,                        \
  52                .ops            = &apmu_clk_ops,                \
  53}
  54
  55#define APMU_CLK_OPS(_name, _reg, _eval, _rate, _ops)           \
  56struct clk clk_##_name = {                                      \
  57                .clk_rst        = APMU_##_reg,                  \
  58                .enable_val     = _eval,                        \
  59                .rate           = _rate,                        \
  60                .ops            = _ops,                         \
  61}
  62
  63#define INIT_CLKREG(_clk, _devname, _conname)                   \
  64        {                                                       \
  65                .clk            = _clk,                         \
  66                .dev_id         = _devname,                     \
  67                .con_id         = _conname,                     \
  68        }
  69
  70extern struct clk clk_pxa168_gpio;
  71extern struct clk clk_pxa168_timers;
  72