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13#include <linux/amba/pl330.h>
14#include <linux/kernel.h>
15#include <linux/types.h>
16#include <linux/interrupt.h>
17#include <linux/list.h>
18#include <linux/timer.h>
19#include <linux/init.h>
20#include <linux/serial_core.h>
21#include <linux/serial_s3c.h>
22#include <linux/platform_device.h>
23#include <linux/io.h>
24#include <linux/slab.h>
25#include <linux/string.h>
26#include <linux/dma-mapping.h>
27#include <linux/fb.h>
28#include <linux/gfp.h>
29#include <linux/mtd/mtd.h>
30#include <linux/mtd/onenand.h>
31#include <linux/mtd/partitions.h>
32#include <linux/mmc/host.h>
33#include <linux/ioport.h>
34#include <linux/sizes.h>
35#include <linux/platform_data/s3c-hsudc.h>
36#include <linux/platform_data/s3c-hsotg.h>
37#include <linux/platform_data/dma-s3c24xx.h>
38
39#include <media/s5p_hdmi.h>
40
41#include <asm/irq.h>
42#include <asm/mach/arch.h>
43#include <asm/mach/map.h>
44#include <asm/mach/irq.h>
45
46#include <mach/dma.h>
47#include <mach/irqs.h>
48#include <mach/map.h>
49
50#include <plat/cpu.h>
51#include <plat/devs.h>
52#include <plat/adc.h>
53#include <linux/platform_data/ata-samsung_cf.h>
54#include <plat/fb.h>
55#include <plat/fb-s3c2410.h>
56#include <plat/hdmi.h>
57#include <linux/platform_data/hwmon-s3c.h>
58#include <linux/platform_data/i2c-s3c2410.h>
59#include <plat/keypad.h>
60#include <linux/platform_data/mmc-s3cmci.h>
61#include <linux/platform_data/mtd-nand-s3c2410.h>
62#include <plat/pwm-core.h>
63#include <plat/sdhci.h>
64#include <linux/platform_data/touchscreen-s3c2410.h>
65#include <linux/platform_data/usb-s3c2410_udc.h>
66#include <linux/platform_data/usb-ohci-s3c2410.h>
67#include <plat/usb-phy.h>
68#include <plat/regs-spi.h>
69#include <linux/platform_data/spi-s3c64xx.h>
70
71static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
72
73
74#ifdef CONFIG_CPU_S3C2440
75static struct resource s3c_ac97_resource[] = {
76 [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
77 [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
78 [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
79 [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
80 [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
81};
82
83struct platform_device s3c_device_ac97 = {
84 .name = "samsung-ac97",
85 .id = -1,
86 .num_resources = ARRAY_SIZE(s3c_ac97_resource),
87 .resource = s3c_ac97_resource,
88 .dev = {
89 .dma_mask = &samsung_device_dma_mask,
90 .coherent_dma_mask = DMA_BIT_MASK(32),
91 }
92};
93#endif
94
95
96
97#ifdef CONFIG_PLAT_S3C24XX
98static struct resource s3c_adc_resource[] = {
99 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
100 [1] = DEFINE_RES_IRQ(IRQ_TC),
101 [2] = DEFINE_RES_IRQ(IRQ_ADC),
102};
103
104struct platform_device s3c_device_adc = {
105 .name = "s3c24xx-adc",
106 .id = -1,
107 .num_resources = ARRAY_SIZE(s3c_adc_resource),
108 .resource = s3c_adc_resource,
109};
110#endif
111
112#if defined(CONFIG_SAMSUNG_DEV_ADC)
113static struct resource s3c_adc_resource[] = {
114 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
115 [1] = DEFINE_RES_IRQ(IRQ_TC),
116 [2] = DEFINE_RES_IRQ(IRQ_ADC),
117};
118
119struct platform_device s3c_device_adc = {
120 .name = "samsung-adc",
121 .id = -1,
122 .num_resources = ARRAY_SIZE(s3c_adc_resource),
123 .resource = s3c_adc_resource,
124};
125#endif
126
127
128
129#ifdef CONFIG_CPU_S3C2440
130static struct resource s3c_camif_resource[] = {
131 [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
132 [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
133 [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
134};
135
136struct platform_device s3c_device_camif = {
137 .name = "s3c2440-camif",
138 .id = -1,
139 .num_resources = ARRAY_SIZE(s3c_camif_resource),
140 .resource = s3c_camif_resource,
141 .dev = {
142 .dma_mask = &samsung_device_dma_mask,
143 .coherent_dma_mask = DMA_BIT_MASK(32),
144 }
145};
146#endif
147
148
149
150#ifdef CONFIG_PLAT_S5P
151static struct resource samsung_asoc_idma_resource = DEFINE_RES_IRQ(IRQ_I2S0);
152
153struct platform_device samsung_asoc_idma = {
154 .name = "samsung-idma",
155 .id = -1,
156 .num_resources = 1,
157 .resource = &samsung_asoc_idma_resource,
158 .dev = {
159 .dma_mask = &samsung_device_dma_mask,
160 .coherent_dma_mask = DMA_BIT_MASK(32),
161 }
162};
163#endif
164
165
166
167#ifdef CONFIG_S3C_DEV_FB
168static struct resource s3c_fb_resource[] = {
169 [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
170 [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
171 [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
172 [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
173};
174
175struct platform_device s3c_device_fb = {
176 .name = "s3c-fb",
177 .id = -1,
178 .num_resources = ARRAY_SIZE(s3c_fb_resource),
179 .resource = s3c_fb_resource,
180 .dev = {
181 .dma_mask = &samsung_device_dma_mask,
182 .coherent_dma_mask = DMA_BIT_MASK(32),
183 },
184};
185
186void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
187{
188 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
189 &s3c_device_fb);
190}
191#endif
192
193
194
195#ifdef CONFIG_S5P_DEV_FIMC0
196static struct resource s5p_fimc0_resource[] = {
197 [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
198 [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
199};
200
201struct platform_device s5p_device_fimc0 = {
202 .name = "s5p-fimc",
203 .id = 0,
204 .num_resources = ARRAY_SIZE(s5p_fimc0_resource),
205 .resource = s5p_fimc0_resource,
206 .dev = {
207 .dma_mask = &samsung_device_dma_mask,
208 .coherent_dma_mask = DMA_BIT_MASK(32),
209 },
210};
211
212struct platform_device s5p_device_fimc_md = {
213 .name = "s5p-fimc-md",
214 .id = -1,
215};
216#endif
217
218#ifdef CONFIG_S5P_DEV_FIMC1
219static struct resource s5p_fimc1_resource[] = {
220 [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
221 [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
222};
223
224struct platform_device s5p_device_fimc1 = {
225 .name = "s5p-fimc",
226 .id = 1,
227 .num_resources = ARRAY_SIZE(s5p_fimc1_resource),
228 .resource = s5p_fimc1_resource,
229 .dev = {
230 .dma_mask = &samsung_device_dma_mask,
231 .coherent_dma_mask = DMA_BIT_MASK(32),
232 },
233};
234#endif
235
236#ifdef CONFIG_S5P_DEV_FIMC2
237static struct resource s5p_fimc2_resource[] = {
238 [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
239 [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
240};
241
242struct platform_device s5p_device_fimc2 = {
243 .name = "s5p-fimc",
244 .id = 2,
245 .num_resources = ARRAY_SIZE(s5p_fimc2_resource),
246 .resource = s5p_fimc2_resource,
247 .dev = {
248 .dma_mask = &samsung_device_dma_mask,
249 .coherent_dma_mask = DMA_BIT_MASK(32),
250 },
251};
252#endif
253
254#ifdef CONFIG_S5P_DEV_FIMC3
255static struct resource s5p_fimc3_resource[] = {
256 [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
257 [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
258};
259
260struct platform_device s5p_device_fimc3 = {
261 .name = "s5p-fimc",
262 .id = 3,
263 .num_resources = ARRAY_SIZE(s5p_fimc3_resource),
264 .resource = s5p_fimc3_resource,
265 .dev = {
266 .dma_mask = &samsung_device_dma_mask,
267 .coherent_dma_mask = DMA_BIT_MASK(32),
268 },
269};
270#endif
271
272
273
274#ifdef CONFIG_S5P_DEV_G2D
275static struct resource s5p_g2d_resource[] = {
276 [0] = DEFINE_RES_MEM(S5P_PA_G2D, SZ_4K),
277 [1] = DEFINE_RES_IRQ(IRQ_2D),
278};
279
280struct platform_device s5p_device_g2d = {
281 .name = "s5p-g2d",
282 .id = 0,
283 .num_resources = ARRAY_SIZE(s5p_g2d_resource),
284 .resource = s5p_g2d_resource,
285 .dev = {
286 .dma_mask = &samsung_device_dma_mask,
287 .coherent_dma_mask = DMA_BIT_MASK(32),
288 },
289};
290#endif
291
292#ifdef CONFIG_S5P_DEV_JPEG
293static struct resource s5p_jpeg_resource[] = {
294 [0] = DEFINE_RES_MEM(S5P_PA_JPEG, SZ_4K),
295 [1] = DEFINE_RES_IRQ(IRQ_JPEG),
296};
297
298struct platform_device s5p_device_jpeg = {
299 .name = "s5p-jpeg",
300 .id = 0,
301 .num_resources = ARRAY_SIZE(s5p_jpeg_resource),
302 .resource = s5p_jpeg_resource,
303 .dev = {
304 .dma_mask = &samsung_device_dma_mask,
305 .coherent_dma_mask = DMA_BIT_MASK(32),
306 },
307};
308#endif
309
310
311
312#ifdef CONFIG_S5P_DEV_FIMD0
313static struct resource s5p_fimd0_resource[] = {
314 [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
315 [1] = DEFINE_RES_IRQ_NAMED(IRQ_FIMD0_VSYNC, "vsync"),
316 [2] = DEFINE_RES_IRQ_NAMED(IRQ_FIMD0_FIFO, "fifo"),
317 [3] = DEFINE_RES_IRQ_NAMED(IRQ_FIMD0_SYSTEM, "lcd_sys"),
318};
319
320struct platform_device s5p_device_fimd0 = {
321 .name = "s5p-fb",
322 .id = 0,
323 .num_resources = ARRAY_SIZE(s5p_fimd0_resource),
324 .resource = s5p_fimd0_resource,
325 .dev = {
326 .dma_mask = &samsung_device_dma_mask,
327 .coherent_dma_mask = DMA_BIT_MASK(32),
328 },
329};
330
331void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
332{
333 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
334 &s5p_device_fimd0);
335}
336#endif
337
338
339
340#ifdef CONFIG_S3C_DEV_HWMON
341struct platform_device s3c_device_hwmon = {
342 .name = "s3c-hwmon",
343 .id = -1,
344 .dev.parent = &s3c_device_adc.dev,
345};
346
347void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
348{
349 s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
350 &s3c_device_hwmon);
351}
352#endif
353
354
355
356#ifdef CONFIG_S3C_DEV_HSMMC
357static struct resource s3c_hsmmc_resource[] = {
358 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
359 [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
360};
361
362struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
363 .max_width = 4,
364 .host_caps = (MMC_CAP_4_BIT_DATA |
365 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
366};
367
368struct platform_device s3c_device_hsmmc0 = {
369 .name = "s3c-sdhci",
370 .id = 0,
371 .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
372 .resource = s3c_hsmmc_resource,
373 .dev = {
374 .dma_mask = &samsung_device_dma_mask,
375 .coherent_dma_mask = DMA_BIT_MASK(32),
376 .platform_data = &s3c_hsmmc0_def_platdata,
377 },
378};
379
380void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
381{
382 s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
383}
384#endif
385
386#ifdef CONFIG_S3C_DEV_HSMMC1
387static struct resource s3c_hsmmc1_resource[] = {
388 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
389 [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
390};
391
392struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
393 .max_width = 4,
394 .host_caps = (MMC_CAP_4_BIT_DATA |
395 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
396};
397
398struct platform_device s3c_device_hsmmc1 = {
399 .name = "s3c-sdhci",
400 .id = 1,
401 .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
402 .resource = s3c_hsmmc1_resource,
403 .dev = {
404 .dma_mask = &samsung_device_dma_mask,
405 .coherent_dma_mask = DMA_BIT_MASK(32),
406 .platform_data = &s3c_hsmmc1_def_platdata,
407 },
408};
409
410void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
411{
412 s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
413}
414#endif
415
416
417
418#ifdef CONFIG_S3C_DEV_HSMMC2
419static struct resource s3c_hsmmc2_resource[] = {
420 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
421 [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
422};
423
424struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
425 .max_width = 4,
426 .host_caps = (MMC_CAP_4_BIT_DATA |
427 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
428};
429
430struct platform_device s3c_device_hsmmc2 = {
431 .name = "s3c-sdhci",
432 .id = 2,
433 .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
434 .resource = s3c_hsmmc2_resource,
435 .dev = {
436 .dma_mask = &samsung_device_dma_mask,
437 .coherent_dma_mask = DMA_BIT_MASK(32),
438 .platform_data = &s3c_hsmmc2_def_platdata,
439 },
440};
441
442void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
443{
444 s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
445}
446#endif
447
448#ifdef CONFIG_S3C_DEV_HSMMC3
449static struct resource s3c_hsmmc3_resource[] = {
450 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
451 [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
452};
453
454struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
455 .max_width = 4,
456 .host_caps = (MMC_CAP_4_BIT_DATA |
457 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
458};
459
460struct platform_device s3c_device_hsmmc3 = {
461 .name = "s3c-sdhci",
462 .id = 3,
463 .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
464 .resource = s3c_hsmmc3_resource,
465 .dev = {
466 .dma_mask = &samsung_device_dma_mask,
467 .coherent_dma_mask = DMA_BIT_MASK(32),
468 .platform_data = &s3c_hsmmc3_def_platdata,
469 },
470};
471
472void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
473{
474 s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
475}
476#endif
477
478
479
480static struct resource s3c_i2c0_resource[] = {
481 [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
482 [1] = DEFINE_RES_IRQ(IRQ_IIC),
483};
484
485struct platform_device s3c_device_i2c0 = {
486 .name = "s3c2410-i2c",
487 .id = 0,
488 .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
489 .resource = s3c_i2c0_resource,
490};
491
492struct s3c2410_platform_i2c default_i2c_data __initdata = {
493 .flags = 0,
494 .slave_addr = 0x10,
495 .frequency = 100*1000,
496 .sda_delay = 100,
497};
498
499void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
500{
501 struct s3c2410_platform_i2c *npd;
502
503 if (!pd) {
504 pd = &default_i2c_data;
505 pd->bus_num = 0;
506 }
507
508 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
509 &s3c_device_i2c0);
510
511 if (!npd->cfg_gpio)
512 npd->cfg_gpio = s3c_i2c0_cfg_gpio;
513}
514
515#ifdef CONFIG_S3C_DEV_I2C1
516static struct resource s3c_i2c1_resource[] = {
517 [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
518 [1] = DEFINE_RES_IRQ(IRQ_IIC1),
519};
520
521struct platform_device s3c_device_i2c1 = {
522 .name = "s3c2410-i2c",
523 .id = 1,
524 .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
525 .resource = s3c_i2c1_resource,
526};
527
528void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
529{
530 struct s3c2410_platform_i2c *npd;
531
532 if (!pd) {
533 pd = &default_i2c_data;
534 pd->bus_num = 1;
535 }
536
537 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
538 &s3c_device_i2c1);
539
540 if (!npd->cfg_gpio)
541 npd->cfg_gpio = s3c_i2c1_cfg_gpio;
542}
543#endif
544
545#ifdef CONFIG_S3C_DEV_I2C2
546static struct resource s3c_i2c2_resource[] = {
547 [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
548 [1] = DEFINE_RES_IRQ(IRQ_IIC2),
549};
550
551struct platform_device s3c_device_i2c2 = {
552 .name = "s3c2410-i2c",
553 .id = 2,
554 .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
555 .resource = s3c_i2c2_resource,
556};
557
558void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
559{
560 struct s3c2410_platform_i2c *npd;
561
562 if (!pd) {
563 pd = &default_i2c_data;
564 pd->bus_num = 2;
565 }
566
567 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
568 &s3c_device_i2c2);
569
570 if (!npd->cfg_gpio)
571 npd->cfg_gpio = s3c_i2c2_cfg_gpio;
572}
573#endif
574
575#ifdef CONFIG_S3C_DEV_I2C3
576static struct resource s3c_i2c3_resource[] = {
577 [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
578 [1] = DEFINE_RES_IRQ(IRQ_IIC3),
579};
580
581struct platform_device s3c_device_i2c3 = {
582 .name = "s3c2440-i2c",
583 .id = 3,
584 .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
585 .resource = s3c_i2c3_resource,
586};
587
588void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
589{
590 struct s3c2410_platform_i2c *npd;
591
592 if (!pd) {
593 pd = &default_i2c_data;
594 pd->bus_num = 3;
595 }
596
597 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
598 &s3c_device_i2c3);
599
600 if (!npd->cfg_gpio)
601 npd->cfg_gpio = s3c_i2c3_cfg_gpio;
602}
603#endif
604
605#ifdef CONFIG_S3C_DEV_I2C4
606static struct resource s3c_i2c4_resource[] = {
607 [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
608 [1] = DEFINE_RES_IRQ(IRQ_IIC4),
609};
610
611struct platform_device s3c_device_i2c4 = {
612 .name = "s3c2440-i2c",
613 .id = 4,
614 .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
615 .resource = s3c_i2c4_resource,
616};
617
618void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
619{
620 struct s3c2410_platform_i2c *npd;
621
622 if (!pd) {
623 pd = &default_i2c_data;
624 pd->bus_num = 4;
625 }
626
627 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
628 &s3c_device_i2c4);
629
630 if (!npd->cfg_gpio)
631 npd->cfg_gpio = s3c_i2c4_cfg_gpio;
632}
633#endif
634
635#ifdef CONFIG_S3C_DEV_I2C5
636static struct resource s3c_i2c5_resource[] = {
637 [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
638 [1] = DEFINE_RES_IRQ(IRQ_IIC5),
639};
640
641struct platform_device s3c_device_i2c5 = {
642 .name = "s3c2440-i2c",
643 .id = 5,
644 .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
645 .resource = s3c_i2c5_resource,
646};
647
648void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
649{
650 struct s3c2410_platform_i2c *npd;
651
652 if (!pd) {
653 pd = &default_i2c_data;
654 pd->bus_num = 5;
655 }
656
657 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
658 &s3c_device_i2c5);
659
660 if (!npd->cfg_gpio)
661 npd->cfg_gpio = s3c_i2c5_cfg_gpio;
662}
663#endif
664
665#ifdef CONFIG_S3C_DEV_I2C6
666static struct resource s3c_i2c6_resource[] = {
667 [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
668 [1] = DEFINE_RES_IRQ(IRQ_IIC6),
669};
670
671struct platform_device s3c_device_i2c6 = {
672 .name = "s3c2440-i2c",
673 .id = 6,
674 .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
675 .resource = s3c_i2c6_resource,
676};
677
678void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
679{
680 struct s3c2410_platform_i2c *npd;
681
682 if (!pd) {
683 pd = &default_i2c_data;
684 pd->bus_num = 6;
685 }
686
687 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
688 &s3c_device_i2c6);
689
690 if (!npd->cfg_gpio)
691 npd->cfg_gpio = s3c_i2c6_cfg_gpio;
692}
693#endif
694
695#ifdef CONFIG_S3C_DEV_I2C7
696static struct resource s3c_i2c7_resource[] = {
697 [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
698 [1] = DEFINE_RES_IRQ(IRQ_IIC7),
699};
700
701struct platform_device s3c_device_i2c7 = {
702 .name = "s3c2440-i2c",
703 .id = 7,
704 .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
705 .resource = s3c_i2c7_resource,
706};
707
708void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
709{
710 struct s3c2410_platform_i2c *npd;
711
712 if (!pd) {
713 pd = &default_i2c_data;
714 pd->bus_num = 7;
715 }
716
717 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
718 &s3c_device_i2c7);
719
720 if (!npd->cfg_gpio)
721 npd->cfg_gpio = s3c_i2c7_cfg_gpio;
722}
723#endif
724
725
726
727#ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
728static struct resource s5p_i2c_resource[] = {
729 [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
730 [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
731};
732
733struct platform_device s5p_device_i2c_hdmiphy = {
734 .name = "s3c2440-hdmiphy-i2c",
735 .id = -1,
736 .num_resources = ARRAY_SIZE(s5p_i2c_resource),
737 .resource = s5p_i2c_resource,
738};
739
740void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
741{
742 struct s3c2410_platform_i2c *npd;
743
744 if (!pd) {
745 pd = &default_i2c_data;
746
747 if (soc_is_s5pv210())
748 pd->bus_num = 3;
749 else
750 pd->bus_num = 0;
751 }
752
753 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
754 &s5p_device_i2c_hdmiphy);
755}
756
757static struct s5p_hdmi_platform_data s5p_hdmi_def_platdata;
758
759void __init s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info,
760 struct i2c_board_info *mhl_info, int mhl_bus)
761{
762 struct s5p_hdmi_platform_data *pd = &s5p_hdmi_def_platdata;
763
764 if (soc_is_s5pv210())
765 pd->hdmiphy_bus = 3;
766 else
767 pd->hdmiphy_bus = 0;
768
769 pd->hdmiphy_info = hdmiphy_info;
770 pd->mhl_info = mhl_info;
771 pd->mhl_bus = mhl_bus;
772
773 s3c_set_platdata(pd, sizeof(struct s5p_hdmi_platform_data),
774 &s5p_device_hdmi);
775}
776
777#endif
778
779
780
781#ifdef CONFIG_PLAT_S3C24XX
782static struct resource s3c_iis_resource[] = {
783 [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
784};
785
786struct platform_device s3c_device_iis = {
787 .name = "s3c24xx-iis",
788 .id = -1,
789 .num_resources = ARRAY_SIZE(s3c_iis_resource),
790 .resource = s3c_iis_resource,
791 .dev = {
792 .dma_mask = &samsung_device_dma_mask,
793 .coherent_dma_mask = DMA_BIT_MASK(32),
794 }
795};
796#endif
797
798
799
800#ifdef CONFIG_SAMSUNG_DEV_IDE
801static struct resource s3c_cfcon_resource[] = {
802 [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
803 [1] = DEFINE_RES_IRQ(IRQ_CFCON),
804};
805
806struct platform_device s3c_device_cfcon = {
807 .id = 0,
808 .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
809 .resource = s3c_cfcon_resource,
810};
811
812void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
813{
814 s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
815 &s3c_device_cfcon);
816}
817#endif
818
819
820
821#ifdef CONFIG_SAMSUNG_DEV_KEYPAD
822static struct resource samsung_keypad_resources[] = {
823 [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
824 [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
825};
826
827struct platform_device samsung_device_keypad = {
828 .name = "samsung-keypad",
829 .id = -1,
830 .num_resources = ARRAY_SIZE(samsung_keypad_resources),
831 .resource = samsung_keypad_resources,
832};
833
834void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
835{
836 struct samsung_keypad_platdata *npd;
837
838 npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
839 &samsung_device_keypad);
840
841 if (!npd->cfg_gpio)
842 npd->cfg_gpio = samsung_keypad_cfg_gpio;
843}
844#endif
845
846
847
848#ifdef CONFIG_PLAT_S3C24XX
849static struct resource s3c_lcd_resource[] = {
850 [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
851 [1] = DEFINE_RES_IRQ(IRQ_LCD),
852};
853
854struct platform_device s3c_device_lcd = {
855 .name = "s3c2410-lcd",
856 .id = -1,
857 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
858 .resource = s3c_lcd_resource,
859 .dev = {
860 .dma_mask = &samsung_device_dma_mask,
861 .coherent_dma_mask = DMA_BIT_MASK(32),
862 }
863};
864
865void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
866{
867 struct s3c2410fb_mach_info *npd;
868
869 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
870 if (npd) {
871 npd->displays = kmemdup(pd->displays,
872 sizeof(struct s3c2410fb_display) * npd->num_displays,
873 GFP_KERNEL);
874 if (!npd->displays)
875 printk(KERN_ERR "no memory for LCD display data\n");
876 } else {
877 printk(KERN_ERR "no memory for LCD platform data\n");
878 }
879}
880#endif
881
882
883
884#ifdef CONFIG_S5P_DEV_CSIS0
885static struct resource s5p_mipi_csis0_resource[] = {
886 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_16K),
887 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
888};
889
890struct platform_device s5p_device_mipi_csis0 = {
891 .name = "s5p-mipi-csis",
892 .id = 0,
893 .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource),
894 .resource = s5p_mipi_csis0_resource,
895};
896#endif
897
898#ifdef CONFIG_S5P_DEV_CSIS1
899static struct resource s5p_mipi_csis1_resource[] = {
900 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_16K),
901 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
902};
903
904struct platform_device s5p_device_mipi_csis1 = {
905 .name = "s5p-mipi-csis",
906 .id = 1,
907 .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource),
908 .resource = s5p_mipi_csis1_resource,
909};
910#endif
911
912
913
914#ifdef CONFIG_S3C_DEV_NAND
915static struct resource s3c_nand_resource[] = {
916 [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
917};
918
919struct platform_device s3c_device_nand = {
920 .name = "s3c2410-nand",
921 .id = -1,
922 .num_resources = ARRAY_SIZE(s3c_nand_resource),
923 .resource = s3c_nand_resource,
924};
925
926
927
928
929
930
931
932
933
934
935
936
937static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
938{
939 void *ptr;
940 int size;
941
942 size = sizeof(struct mtd_partition) * set->nr_partitions;
943 if (size) {
944 ptr = kmemdup(set->partitions, size, GFP_KERNEL);
945 set->partitions = ptr;
946
947 if (!ptr)
948 return -ENOMEM;
949 }
950
951 if (set->nr_map && set->nr_chips) {
952 size = sizeof(int) * set->nr_chips;
953 ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
954 set->nr_map = ptr;
955
956 if (!ptr)
957 return -ENOMEM;
958 }
959
960 if (set->ecc_layout) {
961 ptr = kmemdup(set->ecc_layout,
962 sizeof(struct nand_ecclayout), GFP_KERNEL);
963 set->ecc_layout = ptr;
964
965 if (!ptr)
966 return -ENOMEM;
967 }
968
969 return 0;
970}
971
972void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
973{
974 struct s3c2410_platform_nand *npd;
975 int size;
976 int ret;
977
978
979
980
981
982
983 npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
984 &s3c_device_nand);
985 if (!npd)
986 return;
987
988
989
990 size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
991 if (size) {
992 struct s3c2410_nand_set *from = npd->sets;
993 struct s3c2410_nand_set *to;
994 int i;
995
996 to = kmemdup(from, size, GFP_KERNEL);
997 npd->sets = to;
998
999 if (!to) {
1000 printk(KERN_ERR "%s: no memory for sets\n", __func__);
1001 return;
1002 }
1003
1004 for (i = 0; i < npd->nr_sets; i++) {
1005 ret = s3c_nand_copy_set(to);
1006 if (ret) {
1007 printk(KERN_ERR "%s: failed to copy set %d\n",
1008 __func__, i);
1009 return;
1010 }
1011 to++;
1012 }
1013 }
1014}
1015#endif
1016
1017
1018
1019#ifdef CONFIG_S3C_DEV_ONENAND
1020static struct resource s3c_onenand_resources[] = {
1021 [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
1022 [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
1023 [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
1024};
1025
1026struct platform_device s3c_device_onenand = {
1027 .name = "samsung-onenand",
1028 .id = 0,
1029 .num_resources = ARRAY_SIZE(s3c_onenand_resources),
1030 .resource = s3c_onenand_resources,
1031};
1032#endif
1033
1034#ifdef CONFIG_S3C64XX_DEV_ONENAND1
1035static struct resource s3c64xx_onenand1_resources[] = {
1036 [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
1037 [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
1038 [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
1039};
1040
1041struct platform_device s3c64xx_device_onenand1 = {
1042 .name = "samsung-onenand",
1043 .id = 1,
1044 .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
1045 .resource = s3c64xx_onenand1_resources,
1046};
1047
1048void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
1049{
1050 s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
1051 &s3c64xx_device_onenand1);
1052}
1053#endif
1054
1055#ifdef CONFIG_S5P_DEV_ONENAND
1056static struct resource s5p_onenand_resources[] = {
1057 [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
1058 [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
1059 [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
1060};
1061
1062struct platform_device s5p_device_onenand = {
1063 .name = "s5pc110-onenand",
1064 .id = -1,
1065 .num_resources = ARRAY_SIZE(s5p_onenand_resources),
1066 .resource = s5p_onenand_resources,
1067};
1068#endif
1069
1070
1071
1072#if defined(CONFIG_PLAT_S5P) && !defined(CONFIG_ARCH_EXYNOS)
1073static struct resource s5p_pmu_resource[] = {
1074 DEFINE_RES_IRQ(IRQ_PMU)
1075};
1076
1077static struct platform_device s5p_device_pmu = {
1078 .name = "arm-pmu",
1079 .id = -1,
1080 .num_resources = ARRAY_SIZE(s5p_pmu_resource),
1081 .resource = s5p_pmu_resource,
1082};
1083
1084static int __init s5p_pmu_init(void)
1085{
1086 platform_device_register(&s5p_device_pmu);
1087 return 0;
1088}
1089arch_initcall(s5p_pmu_init);
1090#endif
1091
1092
1093
1094#ifdef CONFIG_SAMSUNG_DEV_PWM
1095static struct resource samsung_pwm_resource[] = {
1096 DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
1097};
1098
1099struct platform_device samsung_device_pwm = {
1100 .name = "samsung-pwm",
1101 .id = -1,
1102 .num_resources = ARRAY_SIZE(samsung_pwm_resource),
1103 .resource = samsung_pwm_resource,
1104};
1105
1106void __init samsung_pwm_set_platdata(struct samsung_pwm_variant *pd)
1107{
1108 samsung_device_pwm.dev.platform_data = pd;
1109}
1110#endif
1111
1112
1113
1114#ifdef CONFIG_PLAT_S3C24XX
1115static struct resource s3c_rtc_resource[] = {
1116 [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
1117 [1] = DEFINE_RES_IRQ(IRQ_RTC),
1118 [2] = DEFINE_RES_IRQ(IRQ_TICK),
1119};
1120
1121struct platform_device s3c_device_rtc = {
1122 .name = "s3c2410-rtc",
1123 .id = -1,
1124 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1125 .resource = s3c_rtc_resource,
1126};
1127#endif
1128
1129#ifdef CONFIG_S3C_DEV_RTC
1130static struct resource s3c_rtc_resource[] = {
1131 [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
1132 [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
1133 [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
1134};
1135
1136struct platform_device s3c_device_rtc = {
1137 .name = "s3c64xx-rtc",
1138 .id = -1,
1139 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1140 .resource = s3c_rtc_resource,
1141};
1142#endif
1143
1144
1145
1146#ifdef CONFIG_PLAT_S3C24XX
1147static struct resource s3c_sdi_resource[] = {
1148 [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
1149 [1] = DEFINE_RES_IRQ(IRQ_SDI),
1150};
1151
1152struct platform_device s3c_device_sdi = {
1153 .name = "s3c2410-sdi",
1154 .id = -1,
1155 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
1156 .resource = s3c_sdi_resource,
1157};
1158
1159void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
1160{
1161 s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
1162 &s3c_device_sdi);
1163}
1164#endif
1165
1166
1167
1168#ifdef CONFIG_PLAT_S3C24XX
1169static struct resource s3c_spi0_resource[] = {
1170 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
1171 [1] = DEFINE_RES_IRQ(IRQ_SPI0),
1172};
1173
1174struct platform_device s3c_device_spi0 = {
1175 .name = "s3c2410-spi",
1176 .id = 0,
1177 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
1178 .resource = s3c_spi0_resource,
1179 .dev = {
1180 .dma_mask = &samsung_device_dma_mask,
1181 .coherent_dma_mask = DMA_BIT_MASK(32),
1182 }
1183};
1184
1185static struct resource s3c_spi1_resource[] = {
1186 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
1187 [1] = DEFINE_RES_IRQ(IRQ_SPI1),
1188};
1189
1190struct platform_device s3c_device_spi1 = {
1191 .name = "s3c2410-spi",
1192 .id = 1,
1193 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
1194 .resource = s3c_spi1_resource,
1195 .dev = {
1196 .dma_mask = &samsung_device_dma_mask,
1197 .coherent_dma_mask = DMA_BIT_MASK(32),
1198 }
1199};
1200#endif
1201
1202
1203
1204#ifdef CONFIG_PLAT_S3C24XX
1205static struct resource s3c_ts_resource[] = {
1206 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
1207 [1] = DEFINE_RES_IRQ(IRQ_TC),
1208};
1209
1210struct platform_device s3c_device_ts = {
1211 .name = "s3c2410-ts",
1212 .id = -1,
1213 .dev.parent = &s3c_device_adc.dev,
1214 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1215 .resource = s3c_ts_resource,
1216};
1217
1218void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
1219{
1220 s3c_set_platdata(hard_s3c2410ts_info,
1221 sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
1222}
1223#endif
1224
1225#ifdef CONFIG_SAMSUNG_DEV_TS
1226static struct resource s3c_ts_resource[] = {
1227 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
1228 [1] = DEFINE_RES_IRQ(IRQ_TC),
1229};
1230
1231static struct s3c2410_ts_mach_info default_ts_data __initdata = {
1232 .delay = 10000,
1233 .presc = 49,
1234 .oversampling_shift = 2,
1235};
1236
1237struct platform_device s3c_device_ts = {
1238 .name = "s3c64xx-ts",
1239 .id = -1,
1240 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1241 .resource = s3c_ts_resource,
1242};
1243
1244void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
1245{
1246 if (!pd)
1247 pd = &default_ts_data;
1248
1249 s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
1250 &s3c_device_ts);
1251}
1252#endif
1253
1254
1255
1256#ifdef CONFIG_S5P_DEV_TV
1257
1258static struct resource s5p_hdmi_resources[] = {
1259 [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
1260 [1] = DEFINE_RES_IRQ(IRQ_HDMI),
1261};
1262
1263struct platform_device s5p_device_hdmi = {
1264 .name = "s5p-hdmi",
1265 .id = -1,
1266 .num_resources = ARRAY_SIZE(s5p_hdmi_resources),
1267 .resource = s5p_hdmi_resources,
1268};
1269
1270static struct resource s5p_sdo_resources[] = {
1271 [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
1272 [1] = DEFINE_RES_IRQ(IRQ_SDO),
1273};
1274
1275struct platform_device s5p_device_sdo = {
1276 .name = "s5p-sdo",
1277 .id = -1,
1278 .num_resources = ARRAY_SIZE(s5p_sdo_resources),
1279 .resource = s5p_sdo_resources,
1280};
1281
1282static struct resource s5p_mixer_resources[] = {
1283 [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
1284 [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
1285 [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
1286};
1287
1288struct platform_device s5p_device_mixer = {
1289 .name = "s5p-mixer",
1290 .id = -1,
1291 .num_resources = ARRAY_SIZE(s5p_mixer_resources),
1292 .resource = s5p_mixer_resources,
1293 .dev = {
1294 .dma_mask = &samsung_device_dma_mask,
1295 .coherent_dma_mask = DMA_BIT_MASK(32),
1296 }
1297};
1298#endif
1299
1300
1301
1302#ifdef CONFIG_S3C_DEV_USB_HOST
1303static struct resource s3c_usb_resource[] = {
1304 [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
1305 [1] = DEFINE_RES_IRQ(IRQ_USBH),
1306};
1307
1308struct platform_device s3c_device_ohci = {
1309 .name = "s3c2410-ohci",
1310 .id = -1,
1311 .num_resources = ARRAY_SIZE(s3c_usb_resource),
1312 .resource = s3c_usb_resource,
1313 .dev = {
1314 .dma_mask = &samsung_device_dma_mask,
1315 .coherent_dma_mask = DMA_BIT_MASK(32),
1316 }
1317};
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
1329{
1330 s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
1331 &s3c_device_ohci);
1332}
1333#endif
1334
1335
1336
1337#ifdef CONFIG_PLAT_S3C24XX
1338static struct resource s3c_usbgadget_resource[] = {
1339 [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
1340 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1341};
1342
1343struct platform_device s3c_device_usbgadget = {
1344 .name = "s3c2410-usbgadget",
1345 .id = -1,
1346 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
1347 .resource = s3c_usbgadget_resource,
1348};
1349
1350void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
1351{
1352 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
1353}
1354#endif
1355
1356
1357
1358#ifdef CONFIG_S3C_DEV_USB_HSOTG
1359static struct resource s3c_usb_hsotg_resources[] = {
1360 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
1361 [1] = DEFINE_RES_IRQ(IRQ_OTG),
1362};
1363
1364struct platform_device s3c_device_usb_hsotg = {
1365 .name = "s3c-hsotg",
1366 .id = -1,
1367 .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
1368 .resource = s3c_usb_hsotg_resources,
1369 .dev = {
1370 .dma_mask = &samsung_device_dma_mask,
1371 .coherent_dma_mask = DMA_BIT_MASK(32),
1372 },
1373};
1374
1375void __init s3c_hsotg_set_platdata(struct s3c_hsotg_plat *pd)
1376{
1377 struct s3c_hsotg_plat *npd;
1378
1379 npd = s3c_set_platdata(pd, sizeof(struct s3c_hsotg_plat),
1380 &s3c_device_usb_hsotg);
1381
1382 if (!npd->phy_init)
1383 npd->phy_init = s5p_usb_phy_init;
1384 if (!npd->phy_exit)
1385 npd->phy_exit = s5p_usb_phy_exit;
1386}
1387#endif
1388
1389
1390
1391#ifdef CONFIG_PLAT_S3C24XX
1392static struct resource s3c_hsudc_resource[] = {
1393 [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
1394 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1395};
1396
1397struct platform_device s3c_device_usb_hsudc = {
1398 .name = "s3c-hsudc",
1399 .id = -1,
1400 .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
1401 .resource = s3c_hsudc_resource,
1402 .dev = {
1403 .dma_mask = &samsung_device_dma_mask,
1404 .coherent_dma_mask = DMA_BIT_MASK(32),
1405 },
1406};
1407
1408void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
1409{
1410 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
1411}
1412#endif
1413
1414
1415
1416#ifdef CONFIG_S3C_DEV_WDT
1417static struct resource s3c_wdt_resource[] = {
1418 [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
1419 [1] = DEFINE_RES_IRQ(IRQ_WDT),
1420};
1421
1422struct platform_device s3c_device_wdt = {
1423 .name = "s3c2410-wdt",
1424 .id = -1,
1425 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
1426 .resource = s3c_wdt_resource,
1427};
1428#endif
1429
1430#ifdef CONFIG_S3C64XX_DEV_SPI0
1431static struct resource s3c64xx_spi0_resource[] = {
1432 [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
1433 [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
1434 [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
1435 [3] = DEFINE_RES_IRQ(IRQ_SPI0),
1436};
1437
1438struct platform_device s3c64xx_device_spi0 = {
1439 .name = "s3c6410-spi",
1440 .id = 0,
1441 .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
1442 .resource = s3c64xx_spi0_resource,
1443 .dev = {
1444 .dma_mask = &samsung_device_dma_mask,
1445 .coherent_dma_mask = DMA_BIT_MASK(32),
1446 },
1447};
1448
1449void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1450 int num_cs)
1451{
1452 struct s3c64xx_spi_info pd;
1453
1454
1455 if (!num_cs || src_clk_nr < 0) {
1456 pr_err("%s: Invalid SPI configuration\n", __func__);
1457 return;
1458 }
1459
1460 pd.num_cs = num_cs;
1461 pd.src_clk_nr = src_clk_nr;
1462 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
1463#if defined(CONFIG_PL330_DMA)
1464 pd.filter = pl330_filter;
1465#elif defined(CONFIG_S3C64XX_PL080)
1466 pd.filter = pl08x_filter_id;
1467#elif defined(CONFIG_S3C24XX_DMAC)
1468 pd.filter = s3c24xx_dma_filter;
1469#endif
1470
1471 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
1472}
1473#endif
1474
1475#ifdef CONFIG_S3C64XX_DEV_SPI1
1476static struct resource s3c64xx_spi1_resource[] = {
1477 [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
1478 [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
1479 [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
1480 [3] = DEFINE_RES_IRQ(IRQ_SPI1),
1481};
1482
1483struct platform_device s3c64xx_device_spi1 = {
1484 .name = "s3c6410-spi",
1485 .id = 1,
1486 .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
1487 .resource = s3c64xx_spi1_resource,
1488 .dev = {
1489 .dma_mask = &samsung_device_dma_mask,
1490 .coherent_dma_mask = DMA_BIT_MASK(32),
1491 },
1492};
1493
1494void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1495 int num_cs)
1496{
1497 struct s3c64xx_spi_info pd;
1498
1499
1500 if (!num_cs || src_clk_nr < 0) {
1501 pr_err("%s: Invalid SPI configuration\n", __func__);
1502 return;
1503 }
1504
1505 pd.num_cs = num_cs;
1506 pd.src_clk_nr = src_clk_nr;
1507 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
1508#if defined(CONFIG_PL330_DMA)
1509 pd.filter = pl330_filter;
1510#elif defined(CONFIG_S3C64XX_PL080)
1511 pd.filter = pl08x_filter_id;
1512#endif
1513
1514 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1);
1515}
1516#endif
1517
1518#ifdef CONFIG_S3C64XX_DEV_SPI2
1519static struct resource s3c64xx_spi2_resource[] = {
1520 [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
1521 [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
1522 [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
1523 [3] = DEFINE_RES_IRQ(IRQ_SPI2),
1524};
1525
1526struct platform_device s3c64xx_device_spi2 = {
1527 .name = "s3c6410-spi",
1528 .id = 2,
1529 .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
1530 .resource = s3c64xx_spi2_resource,
1531 .dev = {
1532 .dma_mask = &samsung_device_dma_mask,
1533 .coherent_dma_mask = DMA_BIT_MASK(32),
1534 },
1535};
1536
1537void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1538 int num_cs)
1539{
1540 struct s3c64xx_spi_info pd;
1541
1542
1543 if (!num_cs || src_clk_nr < 0) {
1544 pr_err("%s: Invalid SPI configuration\n", __func__);
1545 return;
1546 }
1547
1548 pd.num_cs = num_cs;
1549 pd.src_clk_nr = src_clk_nr;
1550 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
1551#if defined(CONFIG_PL330_DMA)
1552 pd.filter = pl330_filter;
1553#elif defined(CONFIG_S3C64XX_PL080)
1554 pd.filter = pl08x_filter_id;
1555#endif
1556
1557 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2);
1558}
1559#endif
1560
